From 2b254693bef4f1299de0afb231890fe348df11c6 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Thu, 22 Nov 2012 10:18:41 +0100 Subject: ARM i.MX6: remove gate_mask from pllv3 Now that the additional enable bits in the enet PLL are handled as gates, the gate_mask is identical for all plls. Remove the gate_mask from the code and use the BM_PLL_ENABLE bit for enabling/disabling the PLL. Signed-off-by: Sascha Hauer Acked-by: Shawn Guo --- arch/arm/mach-imx/clk.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'arch/arm/mach-imx/clk.h') diff --git a/arch/arm/mach-imx/clk.h b/arch/arm/mach-imx/clk.h index 5f2d8acca25f..9d1f3b99d1d3 100644 --- a/arch/arm/mach-imx/clk.h +++ b/arch/arm/mach-imx/clk.h @@ -22,8 +22,7 @@ enum imx_pllv3_type { }; struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name, - const char *parent_name, void __iomem *base, u32 gate_mask, - u32 div_mask); + const char *parent_name, void __iomem *base, u32 div_mask); struct clk *clk_register_gate2(struct device *dev, const char *name, const char *parent_name, unsigned long flags, -- cgit v1.2.3