From 66e40b3517f7de1b465d4ccc36587cf2ab70a94e Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Thu, 24 Oct 2019 00:13:29 +0200 Subject: ARM: dts: sunxi: h3/h5: Add MBUS controller node Both, H3 and H5, contain MBUS, which is the bus used by DMA devices to access system memory. MBUS controller is responsible for arbitration between channels based on set priority and can do some other things as well, like report bandwidth used. It also maps RAM region to different address than CPU. Acked-by: Maxime Ripard Signed-off-by: Jernej Skrabec Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sunxi-h3-h5.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi index 8df29cd05b83..510f83fb234b 100644 --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi @@ -109,6 +109,7 @@ compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; + dma-ranges; ranges; display_clocks: clock@1000000 { @@ -543,6 +544,14 @@ }; }; + mbus: dram-controller@1c62000 { + compatible = "allwinner,sun8i-h3-mbus"; + reg = <0x01c62000 0x1000>; + clocks = <&ccu 113>; + dma-ranges = <0x00000000 0x40000000 0xc0000000>; + #interconnect-cells = <1>; + }; + spi0: spi@1c68000 { compatible = "allwinner,sun8i-h3-spi"; reg = <0x01c68000 0x1000>; -- cgit v1.2.3 From 240a6438985cf05417ee840f07ba4ec243945592 Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Thu, 24 Oct 2019 00:13:32 +0200 Subject: dts: arm: sun8i: h3: Enable deinterlace unit Allwinner H3 SoC contains deinterlace unit, which can be used in combination with VPU unit to decode and process interlaced videos. Add a node for it. Acked-by: Maxime Ripard Signed-off-by: Jernej Skrabec Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-h3.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi index 78356db14fbb..fe773c72a69b 100644 --- a/arch/arm/boot/dts/sun8i-h3.dtsi +++ b/arch/arm/boot/dts/sun8i-h3.dtsi @@ -120,6 +120,19 @@ }; soc { + deinterlace: deinterlace@1400000 { + compatible = "allwinner,sun8i-h3-deinterlace"; + reg = <0x01400000 0x20000>; + clocks = <&ccu CLK_BUS_DEINTERLACE>, + <&ccu CLK_DEINTERLACE>, + <&ccu CLK_DRAM_DEINTERLACE>; + clock-names = "bus", "mod", "ram"; + resets = <&ccu RST_BUS_DEINTERLACE>; + interrupts = ; + interconnects = <&mbus 9>; + interconnect-names = "dma-mem"; + }; + syscon: system-control@1c00000 { compatible = "allwinner,sun8i-h3-system-control"; reg = <0x01c00000 0x1000>; -- cgit v1.2.3 From c85c5c53ffa2ea01d6d1f117aeb0b598b0abd8cd Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Thu, 31 Oct 2019 14:49:05 +0100 Subject: ARM: dts: sun6i: Remove useless reset-names The HDMI controller definition in the A31 DTSI has a reset-names property, yet the binding for that controller doesn't declare it. Remove it. Signed-off-by: Maxime Ripard Acked-by: Chen-Yu Tsai --- arch/arm/boot/dts/sun6i-a31.dtsi | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi index bbeb743633c6..6a5033785a8b 100644 --- a/arch/arm/boot/dts/sun6i-a31.dtsi +++ b/arch/arm/boot/dts/sun6i-a31.dtsi @@ -469,7 +469,6 @@ <&ccu CLK_PLL_VIDEO1_2X>; clock-names = "ahb", "mod", "ddc", "pll-0", "pll-1"; resets = <&ccu RST_AHB1_HDMI>; - reset-names = "ahb"; dma-names = "ddc-tx", "ddc-rx", "audio-tx"; dmas = <&dma 13>, <&dma 13>, <&dma 14>; status = "disabled"; -- cgit v1.2.3