From f17e2a31c2f1a1d64e5a9a1f4fc26c44a4c11f0e Mon Sep 17 00:00:00 2001 From: Troy Kisky Date: Thu, 12 Dec 2013 18:49:07 -0700 Subject: ARM: dts: imx6qdl-sabrelite: remove usdhc4 wp-gpio On Sabre Lite usdhc4 is a micro sd slot, which has no write protect. Signed-off-by: Troy Kisky Reviewed-by: Marek Vasut Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | 2 -- 1 file changed, 2 deletions(-) (limited to 'arch/arm/boot/dts/imx6qdl-sabrelite.dtsi') diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi index 2a0c5fbbf6cb..82b728375070 100644 --- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi @@ -115,7 +115,6 @@ pinctrl_hog: hoggrp { fsl,pins = < MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x80000000 - MX6QDL_PAD_NANDF_D7__GPIO2_IO07 0x80000000 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000 @@ -285,7 +284,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc4>; cd-gpios = <&gpio2 6 0>; - wp-gpios = <&gpio2 7 0>; vmmc-supply = <®_3p3v>; status = "okay"; }; -- cgit v1.2.3