From c6e66f5c21147567f0a09c1d0cbfc32fc894b083 Mon Sep 17 00:00:00 2001 From: Rajeshwari Ravindra Kamble Date: Fri, 7 May 2021 11:37:19 +0530 Subject: dt-bindings: thermal: tsens: Add compatible string to TSENS binding for SC7280 Adding compatible string in TSENS dt-bindings for SC7280. Signed-off-by: Rajeshwari Ravindra Kamble Reviewed-by: Matthias Kaehlcke Acked-by: Rob Herring Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/1620367641-23383-2-git-send-email-rkambl@codeaurora.org --- Documentation/devicetree/bindings/thermal/qcom-tsens.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml index 0242fd91b622..0d4cfe04648f 100644 --- a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml +++ b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml @@ -46,6 +46,7 @@ properties: - qcom,msm8996-tsens - qcom,msm8998-tsens - qcom,sc7180-tsens + - qcom,sc7280-tsens - qcom,sdm845-tsens - qcom,sm8150-tsens - qcom,sm8250-tsens -- cgit v1.2.3 From 1aab6b81af3c96e3181911140d2528e112335bef Mon Sep 17 00:00:00 2001 From: Dmitry Osipenko Date: Wed, 16 Jun 2021 22:04:12 +0300 Subject: dt-bindings: thermal: Add binding for Tegra30 thermal sensor All NVIDIA Tegra30 SoCs have on-chip sensors which monitor temperature and voltage of the SoC. Sensors also controls CPU x2 freq throttle and emits emergency shutdown signal. TSENSOR has has two separate channels for each sensor placed in a different parts of the SoC. Add binding for the sensor hardware. Reviewed-by: Rob Herring Signed-off-by: Dmitry Osipenko Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/20210616190417.32214-2-digetx@gmail.com --- .../bindings/thermal/nvidia,tegra30-tsensor.yaml | 73 ++++++++++++++++++++++ 1 file changed, 73 insertions(+) create mode 100644 Documentation/devicetree/bindings/thermal/nvidia,tegra30-tsensor.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/thermal/nvidia,tegra30-tsensor.yaml b/Documentation/devicetree/bindings/thermal/nvidia,tegra30-tsensor.yaml new file mode 100644 index 000000000000..a35da257b070 --- /dev/null +++ b/Documentation/devicetree/bindings/thermal/nvidia,tegra30-tsensor.yaml @@ -0,0 +1,73 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/thermal/nvidia,tegra30-tsensor.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NVIDIA Tegra30 Thermal Sensor + +maintainers: + - Dmitry Osipenko + - Jon Hunter + - Thierry Reding + +description: | + TSENSOR provides thermal and voltage sensors which monitor temperature + and voltage of the chip. Sensors are placed across the die to gauge the + temperature of the whole chip. The TSENSOR module: + + Generates an interrupt to SW to lower temperature via DVFS on reaching + a certain thermal/voltage threshold. + + Generates a signal to the CAR to reduce CPU frequency by half on reaching + a certain thermal/voltage threshold. + + Generates a signal to the PMC when the temperature reaches dangerously high + levels to reset the chip and sets a flag in the PMC. + + TSENSOR has two channels which monitor two different spots of the SoC. + +properties: + compatible: + const: nvidia,tegra30-tsensor + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + resets: + maxItems: 1 + + interrupts: + maxItems: 1 + + "#thermal-sensor-cells": + const: 1 + + assigned-clock-parents: true + assigned-clock-rates: true + assigned-clocks: true + +required: + - compatible + - reg + - clocks + - resets + - interrupts + - "#thermal-sensor-cells" + +additionalProperties: false + +examples: + - | + thermal-sensor@70014000 { + compatible = "nvidia,tegra30-tsensor"; + reg = <0x70014000 0x500>; + interrupts = <0 102 4>; + clocks = <&clk 100>; + resets = <&rst 100>; + + #thermal-sensor-cells = <1>; + }; -- cgit v1.2.3 From 7d70aa141ed2dcd36c93e070ba62d96613ccc06b Mon Sep 17 00:00:00 2001 From: Ezequiel Garcia Date: Thu, 6 May 2021 14:55:12 -0300 Subject: dt-bindings: thermal: convert rockchip-thermal to json-schema Convert Rockchip Thermal sensor dt-bindings to YAML. Signed-off-by: Ezequiel Garcia Reviewed-by: Rob Herring Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/20210506175514.168365-3-ezequiel@collabora.com --- .../bindings/thermal/rockchip-thermal.txt | 85 ------------------- .../bindings/thermal/rockchip-thermal.yaml | 95 ++++++++++++++++++++++ 2 files changed, 95 insertions(+), 85 deletions(-) delete mode 100644 Documentation/devicetree/bindings/thermal/rockchip-thermal.txt create mode 100644 Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt deleted file mode 100644 index 7f94669e9ebe..000000000000 --- a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt +++ /dev/null @@ -1,85 +0,0 @@ -* Temperature Sensor ADC (TSADC) on rockchip SoCs - -Required properties: -- compatible : should be "rockchip,-tsadc" - "rockchip,px30-tsadc": found on PX30 SoCs - "rockchip,rv1108-tsadc": found on RV1108 SoCs - "rockchip,rk3228-tsadc": found on RK3228 SoCs - "rockchip,rk3288-tsadc": found on RK3288 SoCs - "rockchip,rk3328-tsadc": found on RK3328 SoCs - "rockchip,rk3368-tsadc": found on RK3368 SoCs - "rockchip,rk3399-tsadc": found on RK3399 SoCs -- reg : physical base address of the controller and length of memory mapped - region. -- interrupts : The interrupt number to the cpu. The interrupt specifier format - depends on the interrupt controller. -- clocks : Must contain an entry for each entry in clock-names. -- clock-names : Shall be "tsadc" for the converter-clock, and "apb_pclk" for - the peripheral clock. -- resets : Must contain an entry for each entry in reset-names. - See ../reset/reset.txt for details. -- reset-names : Must include the name "tsadc-apb". -- pinctrl-names : The pin control state names; -- pinctrl-0 : The "init" pinctrl state, it will be set before device probe. -- pinctrl-1 : The "default" pinctrl state, it will be set after reset the - TSADC controller. -- pinctrl-2 : The "sleep" pinctrl state, it will be in for suspend. -- #thermal-sensor-cells : Should be 1. See Documentation/devicetree/bindings/thermal/thermal-sensor.yaml for a description. - -Optional properties: -- rockchip,hw-tshut-temp : The hardware-controlled shutdown temperature value. -- rockchip,hw-tshut-mode : The hardware-controlled shutdown mode 0:CRU 1:GPIO. -- rockchip,hw-tshut-polarity : The hardware-controlled active polarity 0:LOW - 1:HIGH. -- rockchip,grf : The phandle of the syscon node for the general register file. - -Exiample: -tsadc: tsadc@ff280000 { - compatible = "rockchip,rk3288-tsadc"; - reg = <0xff280000 0x100>; - interrupts = ; - clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>; - clock-names = "tsadc", "apb_pclk"; - resets = <&cru SRST_TSADC>; - reset-names = "tsadc-apb"; - pinctrl-names = "init", "default", "sleep"; - pinctrl-0 = <&otp_gpio>; - pinctrl-1 = <&otp_out>; - pinctrl-2 = <&otp_gpio>; - #thermal-sensor-cells = <1>; - rockchip,hw-tshut-temp = <95000>; - rockchip,hw-tshut-mode = <0>; - rockchip,hw-tshut-polarity = <0>; -}; - -Example: referring to thermal sensors: -thermal-zones { - cpu_thermal: cpu_thermal { - polling-delay-passive = <1000>; /* milliseconds */ - polling-delay = <5000>; /* milliseconds */ - - /* sensor ID */ - thermal-sensors = <&tsadc 1>; - - trips { - cpu_alert0: cpu_alert { - temperature = <70000>; /* millicelsius */ - hysteresis = <2000>; /* millicelsius */ - type = "passive"; - }; - cpu_crit: cpu_crit { - temperature = <90000>; /* millicelsius */ - hysteresis = <2000>; /* millicelsius */ - type = "critical"; - }; - }; - - cooling-maps { - map0 { - trip = <&cpu_alert0>; - cooling-device = - <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - }; - }; -}; diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml b/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml new file mode 100644 index 000000000000..8385e8ac03e8 --- /dev/null +++ b/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml @@ -0,0 +1,95 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/thermal/rockchip-thermal.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Temperature Sensor ADC (TSADC) on Rockchip SoCs + +maintainers: + - Heiko Stuebner + +properties: + compatible: + enum: + - rockchip,px30-tsadc # PX30 SoCs + - rockchip,rv1108-tsadc # RV1108 SoCs + - rockchip,rk3228-tsadc # RK3228 SoCs + - rockchip,rk3288-tsadc # RK3288 SoCs + - rockchip,rk3328-tsadc # RK3328 SoCs + - rockchip,rk3368-tsadc # RK3368 SoCs + - rockchip,rk3399-tsadc # RK3399 SoCs + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + minItems: 2 + maxItems: 2 + + clock-names: + items: + - const: tsadc + - const: apb_pclk + + resets: + maxItems: 1 + + reset-names: + items: + - const: tsadc-apb + + "#thermal-sensor-cells": + const: 1 + + rockchip,grf: + description: The phandle of the syscon node for the general register file. + $ref: /schemas/types.yaml#/definitions/phandle + + rockchip,hw-tshut-temp: + description: The hardware-controlled shutdown temperature value. + $ref: /schemas/types.yaml#/definitions/uint32 + + rockchip,hw-tshut-mode: + description: The hardware-controlled shutdown mode 0:CRU 1:GPIO. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + + rockchip,hw-tshut-polarity: + description: The hardware-controlled active polarity 0:LOW 1:HIGH. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - resets + - reset-names + - "#thermal-sensor-cells" + +additionalProperties: false + +examples: + - | + #include + #include + + tsadc: tsadc@ff280000 { + compatible = "rockchip,rk3288-tsadc"; + reg = <0xff280000 0x100>; + interrupts = ; + clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>; + clock-names = "tsadc", "apb_pclk"; + resets = <&cru SRST_TSADC>; + reset-names = "tsadc-apb"; + #thermal-sensor-cells = <1>; + rockchip,hw-tshut-temp = <95000>; + rockchip,hw-tshut-mode = <0>; + rockchip,hw-tshut-polarity = <0>; + }; -- cgit v1.2.3 From 4b14c055a6f644cbeb1156ba24647e92fe51ec69 Mon Sep 17 00:00:00 2001 From: Ezequiel Garcia Date: Thu, 6 May 2021 14:55:13 -0300 Subject: dt-bindings: rockchip-thermal: Support the RK3568 SoC compatible Add a new compatible for the thermal sensor device on RK3568 SoCs. Signed-off-by: Ezequiel Garcia Acked-by: Rob Herring Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/20210506175514.168365-4-ezequiel@collabora.com --- Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml b/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml index 8385e8ac03e8..b96ea277b558 100644 --- a/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml +++ b/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml @@ -19,6 +19,7 @@ properties: - rockchip,rk3328-tsadc # RK3328 SoCs - rockchip,rk3368-tsadc # RK3368 SoCs - rockchip,rk3399-tsadc # RK3399 SoCs + - rockchip,rk3568-tsadc # RK3568 SoCs reg: maxItems: 1 -- cgit v1.2.3 From 481bd297291b59480b87f88f88fbcff59455dcc3 Mon Sep 17 00:00:00 2001 From: Bjorn Andersson Date: Tue, 8 Jun 2021 13:16:38 -0700 Subject: dt-bindings: thermal: tsens: Add sc8180x compatible The Qualcomm sc8180x platform has the usual tsens blocks, add compatible for this. Signed-off-by: Bjorn Andersson Acked-by: Thara Gopinath Acked-by: Rob Herring Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/20210608201638.2136344-1-bjorn.andersson@linaro.org --- Documentation/devicetree/bindings/thermal/qcom-tsens.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml index 0d4cfe04648f..ccf70dd06d5b 100644 --- a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml +++ b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml @@ -47,6 +47,7 @@ properties: - qcom,msm8998-tsens - qcom,sc7180-tsens - qcom,sc7280-tsens + - qcom,sc8180x-tsens - qcom,sdm845-tsens - qcom,sm8150-tsens - qcom,sm8250-tsens -- cgit v1.2.3