From 026ef6354caa661ddd4c399590048e72a9d420bf Mon Sep 17 00:00:00 2001 From: Jordan Crouse Date: Fri, 19 Apr 2019 13:56:27 -0600 Subject: dt-bindings: drm/msm/a6xx: Document interconnect properties for GPU Add documentation for the interconnect and interconnect-names bindings for the GPU node as detailed by bindings/interconnect/interconnect.txt. Signed-off-by: Jordan Crouse Reviewed-by: Douglas Anderson Reviewed-by: Rob Herring Acked-by: Georgi Djakov Signed-off-by: Rob Clark --- Documentation/devicetree/bindings/display/msm/gpu.txt | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation/devicetree/bindings/display') diff --git a/Documentation/devicetree/bindings/display/msm/gpu.txt b/Documentation/devicetree/bindings/display/msm/gpu.txt index aad1aef682f7..c04614c63ea9 100644 --- a/Documentation/devicetree/bindings/display/msm/gpu.txt +++ b/Documentation/devicetree/bindings/display/msm/gpu.txt @@ -22,6 +22,8 @@ Required properties: - qcom,adreno-630.2 - iommus: optional phandle to an adreno iommu instance - operating-points-v2: optional phandle to the OPP operating points +- interconnects: optional phandle to an interconnect provider. See + ../interconnect/interconnect.txt for details. - qcom,gmu: For GMU attached devices a phandle to the GMU device that will control the power for the GPU. Applicable targets: - qcom,adreno-630.2 @@ -70,6 +72,8 @@ Example a6xx (with GMU): operating-points-v2 = <&gpu_opp_table>; + interconnects = <&rsc_hlos MASTER_GFX3D &rsc_hlos SLAVE_EBI1>; + qcom,gmu = <&gmu>; }; }; -- cgit v1.2.3