From f0e5405b9ebf084c34c41f5d38a0013bee166f4d Mon Sep 17 00:00:00 2001 From: Ulrich Hecht Date: Fri, 19 Jul 2019 11:50:16 +0200 Subject: arm64: dts: mt8173: Add capacity-dmips-mhz attributes Dhrystone benchmark on Acer Chromebook R13 CB5-312T: A72: 15698587 dps @ 1807 MHz A53: 7598784 dps @ 1703 MHz Signed-off-by: Ulrich Hecht Link: https://lore.kernel.org/r/1563529816-3992-1-git-send-email-uli@fpond.eu Signed-off-by: Matthias Brugger --- arch/arm64/boot/dts/mediatek/mt8173.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi index 02b5f7e4c4d9..f946cd079413 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi @@ -167,6 +167,7 @@ <&apmixedsys CLK_APMIXED_MAINPLL>; clock-names = "cpu", "intermediate"; operating-points-v2 = <&cluster0_opp>; + capacity-dmips-mhz = <526>; }; cpu1: cpu@1 { @@ -181,6 +182,7 @@ <&apmixedsys CLK_APMIXED_MAINPLL>; clock-names = "cpu", "intermediate"; operating-points-v2 = <&cluster0_opp>; + capacity-dmips-mhz = <526>; }; cpu2: cpu@100 { @@ -195,6 +197,7 @@ <&apmixedsys CLK_APMIXED_MAINPLL>; clock-names = "cpu", "intermediate"; operating-points-v2 = <&cluster1_opp>; + capacity-dmips-mhz = <1024>; }; cpu3: cpu@101 { @@ -209,6 +212,7 @@ <&apmixedsys CLK_APMIXED_MAINPLL>; clock-names = "cpu", "intermediate"; operating-points-v2 = <&cluster1_opp>; + capacity-dmips-mhz = <1024>; }; idle-states { -- cgit v1.2.3