From 784953a46589276b38d7e6dcb5ebf7e29db72ff1 Mon Sep 17 00:00:00 2001 From: Manasi Navare Date: Tue, 26 Jan 2021 10:52:24 -0800 Subject: drm/i915/display/vrr: Skip the VRR HW state readout on DSI transcoder MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit DSI transcoder does not support VRR and hence skip the HW state readout if its a DSI transcoder. Fixes: c7f0f4372b30 ("drm/i915/display: Add HW state readout for VRR") Cc: Ville Syrjälä Cc: Jani Nikula Cc: Vandita Kulkarni Signed-off-by: Manasi Navare Reviewed-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20210126185224.32340-1-manasi.d.navare@intel.com --- drivers/gpu/drm/i915/display/intel_display.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 7447ef3d9b70..b2b686f6f419 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -8981,7 +8981,7 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc, intel_get_transcoder_timings(crtc, pipe_config); } - if (HAS_VRR(dev_priv)) + if (HAS_VRR(dev_priv) && !transcoder_is_dsi(pipe_config->cpu_transcoder)) intel_vrr_get_config(crtc, pipe_config); intel_get_pipe_src_size(crtc, pipe_config); -- cgit v1.2.3