Age | Commit message (Collapse) | Author |
|
The SNDRV_PCM_INFO_BATCH will be added back based on the dmaengine driver's
capabilities.
Patches for edma dmaengine driver has been prepared to suppress the
interrupts. We can add this flag right away and have the benefit of not
having interrupts during audio activity when the edma and ASoC patches
are in the same tree.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Tested-by: Daniel Mack <daniel@zonque.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
|
|
In case of S24_LE/U24_LE modes we expect 24bits on the bus while the samples
are stored and transferred in memory on 32bits (lower 3 bytes of the 4
bytes).
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Tested-by: Daniel Mack <daniel@zonque.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
Do not fail if the exact BLCK rate can not be produced, just print a
warning. Check that sysclk frequency is set before implicitly setting
the BCLK divider.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
Fixes build with SND_DAVINCI_SOC or SND_OMAP_SOC alone and adds build
dependecy to SND_DAVINCI_SOC or SND_OMAP_SOC.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
In DIT (S/PDIF) mode, program the transmitted user bits to reflect the
configured sample rate, along with some other details.
Signed-off-by: Daniel Mack <zonque@gmail.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
asoc-next
|
|
No need to go via the CODEC to get a pointer to the card. This will help to
eventually remove the card field from the snd_soc_codec struct.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
Make including the omap-pcm.h outside sound/soc/omap more convenient.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
This codec requires I2C to be enabled, so any other option
that selects it should also depend on I2C.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Xia Kaixu <kaixu.xia@linaro.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
It allows to remove code from the cleanup paths.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
Remove the cleanup code related to the platform from the DAI drivers at the
same time to avoid breakage.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
Version 4 of McASP is using omap-pcm as platform driver and the omap-pcm
platform need to be registered using the cpu dai's device.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
This register is not defined in TI81xx and on AM335x/AM437x it is the
SYSCONFIG register which should not be touched by drivers since it is
related to PM and handled by the generic PM code.
This register write was there since the first time the davinci-mcasp driver
was appeared in the kernel.
The reason why it did not caused any issues on AM335x/AM437x is that it sets
bit 1 in SYSCONFIG register which in turn will enable the smart-idle mode.
This is the default mode and this is the mode McASP should be in also when
in use.
On TI81xx the register is not defined.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
To make the code look uniform.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
Configuration for LEFT_J format.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
The FS needs to be inverted in McASP compared to other supported formats.
Use a flag to indicate if the FS needs to be inverted.
At the same time fail when non supported format is asked since the default
case was anyways configuring McASP to a not valid format.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
FS polarity can be either rising or falling edge in McASP. Instead of
accessing the registers in every switch/case set a flag and write the
registers after the switch for the invert configuration.
This change will help when adding support for more formats also.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
DSP_A is like DSP_B mode but with one bit delay after the FS.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
Use intermediate variable for the data delay needed for the specific format
and write the register after the format configuration at once.
This will help to control the number of lines as support for more formats
going to be added.
Also fixes a case when we switch between two formats with different delay
requirements.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
When the AFIFO is not enabled but more than one serializers are used the DMA
need to transfer number of words equal to active serializers when a DMA
request is generated.
When configuring the burst for the DMA avoid using value '1' for the burst
since it is going to enable additional logic in the DMA drivers. Burst '1'
means that the DMA should send/receive one word per DMA requests.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
(dynamic depth)
Configure the AFIFO numevt parameter based on the requested tx/rx_numevt,
active serializers and period size in words.
In this way McASP can adopt it's (and the DMA) configuration runtime and
can pick the most optimal setup which satisfy the parameters.
This way we do not need to place any constraint on the stream itself,
allowing application greater freedom on how they want to set up ALSA.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
Move the dma_params->fifo_level and dma_data->maxburst configuration to the
mcasp_common_hw_param() function where we configure the AFIFO registers.
It makes the code regarding to AFIFO and DMA configuration more easy to
follow since it is now clear how the AFIFO and how the DMA is going to be
configured.
Previously this has been done in two functions using a bit different
calculation form - which ended up with the same result in both case at the
end, but it was confusing.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
We can have more linear code flow by using variables in
mcasp_common_hw_param() related to the AFIFO configuration.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
requred -> required
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
Set up the playback_dma_data/capture_dma_data for the dai at probe
time since the generic dmaengine PCM stack needs to have access to
this information early.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
To save drivers using davinci-pcm and edma-pcm the need to fiddle with
!CONFIG_SND_DAVINCI_SOC in their code.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
IB_NF, NB_IF and IB_IF configured the bc polarity incorrectly. The receive
polarity was set to the same edge as the TX in these cases.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
When we boot with non-DT mode the damengine will need the channel number and
a filter function in order to get the channel.
The filter_data is filled in the DAI driver while the filter_function will
be provided by the edma-pcm driver.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
Platform driver glue for SoC using eDMA3 to use dmaengine PCM.
The maximum number of periods need to be limited to 19 since the
edma dmaengine driver limits the paRAM slot use for audio at
in cyclic mode.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Reviewed-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
Machine level DAPM widgets and routes should be registered in the card's DAPM
context, rather than in the CODEC's context.
While we are at it also drop the snd_soc_dapm_enable_pin() calls, since pins are
enabled by default and also turn the snd_soc_dapm_disable_pin() calls into
snd_soc_dapm_nc_pin() calls for unconnected pins.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
It is quite confusing to name the pointer to davinci_pcm_dma_params as
dma_data. Rename the pointer to avoid confusion.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
Move the context register storage behind of a struct and use a pointer to
it in the suspend/resume callbacks to remove the long lines.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
Rename the struct for the platform data:
snd_platform_data -> davinci_mcasp_pdata
Since we have users under arch/arm/mach-davinci/ for this struct add
temporary define to avoid breakage. The arch code can be updated later to
use the new struct name.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
Rearrange the code in the function for readability.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
Handle the PM callbacks via the ASoC core instead of device core.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
Take the return value from mcasp_common_hw_param() and use that in case of
error.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into HEAD
|
|
Set snd_soc_pm_ops for the pm ops.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
The use of pm_runtime in trigger() callback is not correct and it will lead
to unbalanced power.usage_count.
The only place which might need to call pm_runtime is the set_fmt callback.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
These registers can be configured synchronously for playback and capture.
Furthermore when McASP is in master and sync mode the capture operation
needs the TX path to be configured in order to be able to provide the needed
clocks for the bus.
xxFMT and xxFMCT registers has been already configured for both TX and RX
other places in the driver.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
Instead of
davinci_hw_common_param - for common, I2S/DIT mode settings
davinci_hw_dit_param - for DIT protocol configuration
davinci_hw_param - for I2S (and compatible protocols)
Use the following names:
mcasp_common_hw_param, mcasp_dit_hw_param and mcasp_i2s_hw_param.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
Make BCLK divider setting implicite in hw_params call if McASP device
is the bit clock master on the audio serial bus.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
The referenced clock is used to get codec clock rate and the clock is
disabled and enabled in startup and shutdown snd_soc_ops call
backs. The change is also documented in DT bindigs document.
Signed-off-by: Jyri Sarha <jsarha@ti.com>
cc: bcousson@baylibre.com
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
The ASoC core assumes that the PCM component of the ASoC card transparently
moves data around and does not impose any restrictions on the memory layout or
the transfer speed. It ignores all fields from the snd_pcm_hardware struct for
the PCM driver that are related to this. Setting these fields in the PCM driver
might suggest otherwise though, so rather not set them.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
Optional DT property to specify the desired parent clock for the McASP fck
clock.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
An earlier patch overlooked this when the compatible has been changed from
omap2 -> am33x.
Rename omap2_mcasp_pdata to am33xx_mcasp_pdata.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
Instead of passing __iomem address (mcasp->base + register_offset) pass
the main mcasp structure and only access the mcasp->base in the low level
IO functions.
In most cases this helps with code readability and it will make it easier
to switch over to regmap in the future.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
The IP in DRA7xx is similar to the IP found in TI81xxAM3xxx/AM4xxx type of
SoCs but it is is integrated with sDMA instead of eDMA. The suitable pcm
driver for DRA7xx is the omap-pcm driver which is using dmaengine.
In the driver we can configure both dma related structures used for eDMA and
sDMA. The only thing we need to make sure that we set the correct dma_data
at startup with snd_soc_dai_set_dma_data()
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
|
In synchronous mode both transmit and receive sections are using the TX
clocks. In setup like this the TX clocks need to be enabled when capture
is running.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|