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path: root/include/video/imx-ipu-v3.h
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2020-10-26gpu: ipu-v3: remove unused functionsPhilipp Zabel
ipu_mbus_code_to_colorspace, ipu_stride_to_bytes, and ipu_pixelformat_is_planar are unused. Remove them. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
2019-06-14gpu: ipu-v3: ipu-ic: Fully describe colorspace conversionsSteve Longerbeam
Only providing the input and output RGB/YUV space to the IC task init functions is not sufficient. To fully characterize a colorspace conversion, the Y'CbCr encoding standard, and quantization also need to be specified. Define a 'struct ipu_ic_colorspace' that includes all the above. This allows to actually enforce the fact that the IC: - can only encode to/from YUV and RGB full range. A follow-up patch will remove this restriction. - can only encode using BT.601 standard. A follow-up patch will add Rec.709 encoding support. The determination of the CSC coefficients based on the input/output 'struct ipu_ic_colorspace' are moved to a new exported function ipu_ic_calc_csc(), and 'struct ic_csc_params' is exported as 'struct ipu_ic_csc_params'. ipu_ic_calc_csc() fills a 'struct ipu_ic_csc' with the input/output 'struct ipu_ic_colorspace' and the calculated 'struct ic_csc_params' from those input/output colorspaces. The functions ipu_ic_task_init(_rsc)() now take a filled 'struct ipu_ic_csc'. The existing CSC coefficient tables and ipu_ic_calc_csc() are moved to a new module ipu-ic-csc.c. This is in preparation for adding more coefficient tables for limited range quantization and more encoding standards. The existing ycbcr2rgb and inverse rgb2ycbcr tables defined the BT.601 Y'CbCr encoding coefficients. The rgb2ycbcr table specifically described the BT.601 encoding from full range RGB to full range YUV. Table comments have been added in ipu-ic-csc.c to make this more clear. The ycbcr2rgb inverse table described encoding YUV limited range to RGB full range. To be consistent with the rgb2ycbcr table, this table is converted to YUV full range to RGB full range, and the comments are expanded in ipu-ic-csc.c. The ic_csc_rgb2rgb table was just an identity matrix, so it is renamed 'identity' in ipu-ic-csc.c. Signed-off-by: Steve Longerbeam <slongerbeam@gmail.com> [p.zabel@pengutronix.de: removed a superfluous blank line] Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2019-03-09Merge tag 'media/v5.1-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media Pull media updates from Mauro Carvalho Chehab: - remove sensor drivers that got converted from soc_camera - remaining soc_camera drivers got moved to staging - some documentation cleanups and improvements - the imx staging driver now supports imx7 - the ov9640, mt9m001 and mt9m111 got converted from soc_camera - the vim2m driver now does what a m2m convert driver expects to do - epoll() fixes on media subsystems - several drivers fixes, typos, cleanups and improvements * tag 'media/v5.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media: (346 commits) media: dvb/earth-pt1: fix wrong initialization for demod blocks media: vim2m: Address some coding style issues media: vim2m: don't use BUG() media: vim2m: speedup passthrough copy media: vim2m: add an horizontal scaler media: vim2m: don't accept YUYV anymore as output format media: vim2m: add vertical linear scaler media: vim2m: better handle cap/out buffers with different sizes media: vim2m: use different framesizes for bayer formats media: vim2m: add support for VIDIOC_ENUM_FRAMESIZES media: vim2m: ensure that width is multiple of two media: vim2m: improve debug messages media: vim2m: add bayer capture formats media: a few more typos at staging, pci, platform, radio and usb media: Documentation: fix several typos media: staging: fix several typos media: include: fix several typos media: common: fix several typos media: v4l2-core: fix several typos media: usb: fix several typos ...
2019-02-22gpu: ipu-v3: prg: add function to get channel configure statusLucas Stach
This allows channels using the PRG to check if a requested configuration update has been applied or is still pending. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> [p.zabel@pengutronix.de: inverted logic: done -> pending] Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2019-01-16media: gpu: ipu-v3: Add planar support to interlaced scanSteve Longerbeam
To support interlaced scan with planar formats, cpmem SLUV must be programmed with the correct chroma line stride. For full and partial planar 4:2:2 (YUV422P, NV16), chroma line stride must be doubled. For full and partial planar 4:2:0 (YUV420, YVU420, NV12), chroma line stride must _not_ be doubled, since a single chroma line is shared by two luma lines. Signed-off-by: Steve Longerbeam <slongerbeam@gmail.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
2019-01-16media: gpu: ipu-csi: Swap fields according to input/output field typesSteve Longerbeam
The function ipu_csi_init_interface() was inverting the F-bit for NTSC case, in the CCIR_CODE_1/2 registers. The result being that for NTSC bottom-top field order, the CSI would swap fields and capture in top-bottom order. Instead, base field swap on the field order of the input to the CSI, and the field order of the requested output. If the input/output fields are sequential but different, swap fields, otherwise do not swap. This requires passing both the input and output mbus frame formats to ipu_csi_init_interface(). Move this code to a new private function ipu_csi_set_bt_interlaced_codes() that programs the CCIR_CODE_1/2 registers for interlaced BT.656 (and possibly interlaced BT.1120 in the future). When detecting input video standard from the input frame width/height, make sure to double height if input field type is alternate, since in that case input height only includes lines for one field. Signed-off-by: Steve Longerbeam <slongerbeam@gmail.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
2018-11-05gpu: ipu-v3: ipu-ic: allow to manually set resize coefficientsPhilipp Zabel
For tiled scaling, we want to compute the scaling coefficients externally in such a way that the interpolation overshoots tile boundaries and samples up to the first pixel of the next tile. Prepare to override the resizing coefficients from the image conversion code. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Steve Longerbeam <slongerbeam@gmail.com> Tested-by: Steve Longerbeam <slongerbeam@gmail.com>
2018-11-05gpu: ipu-v3: Add chroma plane offset overrides to ipu_cpmem_set_image()Steve Longerbeam
Allow the caller of ipu_cpmem_set_image() to override the latters calculation of the chroma plane offsets, by adding override U/V plane offsets to 'struct ipu_image'. Signed-off-by: Steve Longerbeam <slongerbeam@gmail.com> Tested-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2017-12-19gpu: ipu-v3: prg: add modifier supportLucas Stach
Allow to pass through the modifier to the PRE unit and extend the format check with the supported modifiers. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2017-06-08gpu: ipu-v3: Add support for double read/write reductionPhilipp Zabel
Allow to skip writing odd chroma rows by setting the RDRW bit for 4:2:0 chroma subsampled formats for any IDMAC write channel. This also allows to skip reading odd rows for the VDIC read channel. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2017-03-16gpu: ipu-v3: add driver for Prefetch Resolve GasketLucas Stach
This adds support for the i.MX6 QUadPlus PRG unit. It glues together the IPU and the PRE units. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> --- v4: add missing ipu_soc->prg_priv
2017-03-15gpu: ipu-v3: add support for separate alpha channelsPhilipp Zabel
The IPUv3 can read 8-bit alpha values from a separate IDMAC channel driven by the Alpha Transparency Controller (ATC) for the graphics IDMAC channels. This allows to reduce memory bandwidth via a conditional read mechanism or to support planar YUV formats with alpha transparency. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2017-03-15gpu: ipu-v3: add unsynchronised DP channel disablingPhilipp Zabel
When disabling the foreground DP channel during a modeset, the DC is already disabled without waiting for end of frame. There is no reason to wait for a frame boundary before updating the DP registers in that case. Add support to apply updates immediately. No functional changes, yet. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
2016-11-07gpu: ipu-v3: add ipu_csi_set_downsizePhilipp Zabel
Support downsizing to 1/2 width and/or height in the CSI. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-10-20gpu: ipu-cpmem: remove unused ipu_cpmem_set_yuv_planar functionPhilipp Zabel
ipu_cpmem_set_yuv_planar_full is only used directly, remove the wrapper. Suggested-by: Liu Ying <gnuiyl@gmail.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Liu Ying <gnuiyl@gmail.com>
2016-09-19gpu: ipu-v3: Add ipu_rot_mode_is_irt()Steve Longerbeam
Add a macro that returns boolean true if the given ipu_rotate_mode requires the use of the Image Rotator. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-08-29gpu: ipu-v3: Add FSU channel linking supportSteve Longerbeam
Adds functions to link and unlink source channels to sink channels in the FSU: int ipu_fsu_link(struct ipu_soc *ipu, int src_ch, int sink_ch); int ipu_fsu_unlink(struct ipu_soc *ipu, int src_ch, int sink_ch); The channels numbers are usually IDMAC channels, but they can also be channels that do not transfer data to or from memory. The following convenience functions can be used in place of ipu_fsu_link/unlink() when both source and sink channels are IDMAC channels: int ipu_idmac_link(struct ipuv3_channel *src, struct ipuv3_channel *sink); int ipu_idmac_unlink(struct ipuv3_channel *src, struct ipuv3_channel *sink); So far the following links are supported: IPUV3_CHANNEL_IC_PRP_ENC_MEM -> IPUV3_CHANNEL_MEM_ROT_ENC PUV3_CHANNEL_IC_PRP_VF_MEM -> IPUV3_CHANNEL_MEM_ROT_VF IPUV3_CHANNEL_IC_PP_MEM -> IPUV3_CHANNEL_MEM_ROT_PP IPUV3_CHANNEL_CSI_DIRECT -> IPUV3_CHANNEL_CSI_VDI_PREV More links can be added to the fsu_link_info[] array. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-08-29gpu: ipu-v3: Add Video Deinterlacer unitSteve Longerbeam
Adds the Video Deinterlacer (VDIC) unit. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-08-08gpu: ipu-v3: Add missing IDMAC channel namesPhilipp Zabel
This patch adds the remaining missing IDMAC channel names: VDIC channels for combining, the separate alpha channels for the MEM->IC and MEM->DC ASYNC channels, and the DC read, command, and output mask channels. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-08-08gpu: ipu-v3: Add VDI input IDMAC channelsSteve Longerbeam
Adds the VDIC field input IDMAC channels. These channels transfer fields F(n-1), F(n), and F(N+1) from memory to the VDIC (channels 8, 9, 10 respectively). Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-08-08gpu: ipu-v3: Add ipu_get_num()Steve Longerbeam
Adds of-alias id to ipu_soc and retrieve with ipu_get_num(). Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-08-08gpu: ipu-cpmem: Add ipu_cpmem_get_burstsize()Steve Longerbeam
Adds ipu_cpmem_get_burstsize(). Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-08-08gpu: ipu-cpmem: Add ipu_cpmem_set_uv_offset()Steve Longerbeam
Adds ipu_cpmem_set_uv_offset(), to set planar U/V offsets. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-07-12gpu: ipu-v3: ipu-dmfc: Use static DMFC FIFO allocation mechanismLiu Ying
For all video modes we support currently, we always get 2 slots for a plane by using the current existing dynamic DMFC FIFO allocation mechanism. So, let's change to use the static one to simplify the code. This also makes it easier to implement the atomic mode setting as we don't need to handle allocation failure cases then. Signed-off-by: Liu Ying <gnuiyl@gmail.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-05-23drm/imx: Match imx-ipuv3-crtc components using device node in platform dataPhilipp Zabel
The component master driver imx-drm-core matches component devices using their of_node. Since commit 950b410dd1ab ("gpu: ipu-v3: Fix imx-ipuv3-crtc module autoloading"), the imx-ipuv3-crtc dev->of_node is not set during probing. Before that, of_node was set and caused an of: modalias to be used instead of the platform: modalias, which broke module autoloading. On the other hand, if dev->of_node is not set yet when the imx-ipuv3-crtc probe function calls component_add, component matching in imx-drm-core fails. While dev->of_node will be set once the next component tries to bring up the component master, imx-drm-core component binding will never succeed if one of the crtc devices is probed last. Add of_node to the component platform data and match against the pdata->of_node instead of dev->of_node in imx-drm-core to work around this problem. Cc: <stable@vger.kernel.org> # 4.4.x Fixes: 950b410dd1ab ("gpu: ipu-v3: Fix imx-ipuv3-crtc module autoloading") Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Tested-by: Fabio Estevam <fabio.estevam@nxp.com> Tested-by: Lothar Waßmann <LW@KARO-electronics.de> Tested-by: Heiko Schocher <hs@denx.de> Tested-by: Chris Ruehl <chris.ruehl@gtsys.com.hk>
2016-03-31gpu: ipu-v3: ipu-dmfc: Rename ipu_dmfc_init_channel to ipu_dmfc_config_wait4eotLiu Ying
The function name 'ipu_dmfc_config_wait4eot' matches the implementation of the function better than 'ipu_dmfc_init_channel', since it only touches the wait4eot bits. Signed-off-by: Liu Ying <gnuiyl@gmail.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-03-31gpu: ipu-v3: ipu-dmfc: Make function ipu_dmfc_init_channel() return voidLiu Ying
Since the function ipu_dmfc_init_channel() always returns zero, we may change the return type to void to simplify the code. Signed-off-by: Liu Ying <gnuiyl@gmail.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-03-31gpu: ipu-cpmem: modify ipu_cpmem_set_yuv_planar_full for better controlPhilipp Zabel
Let ipu_cpmem_set_yuv_planar_full take a DRM_FORMAT instead of a V4L2_PIXFMT and allow better control over U/V stride, U offset and V offset settings in the CPMEM. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-11-24gpu: ipu-v3: drop unused dmfc field from client platform dataPhilipp Zabel
This field is never used, drop it. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-03-31drm/imx: consolidate bus format variable namesPhilipp Zabel
This patch consolidates the different interface_pix_fmt, pixel_fmt, pix_fmt, and pixfmt variables to a common name "bus_format" wherever they describe the pixel format on the bus between display controller and encoder hardware. At the same time, it renames imx_drm_panel_format to imx_drm_set_bus_format. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Tested-by: Emil Renner Berthing <kernel@esmil.dk>
2015-01-07gpu: ipu-v3: Use videomode in struct ipu_di_signal_cfgSteve Longerbeam
This patch changes struct ipu_di_signal_cfg to use struct videomode to define video timings and flags. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-01-07gpu: ipu-di: Add ipu_di_adjust_videomode()Jiada Wang
On some monitors, high resolution modes are not working, exhibiting pixel column truncation problems (for example, 1280x1024 displays as 1280x1022). The function ipu_di_adjust_videomode() aims to fix these issues by adjusting a passed videomode to IPU restrictions. The function can be called from the drm_crtc_helper_funcs->mode_fixup() methods. Signed-off-by: Jiada Wang <jiada_wang@mentor.com> Signed-off-by: Deepak Das <deepak_das@mentor.com> Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02gpu: ipu-v3: Add ipu_dump()Steve Longerbeam
Adds ipu_dump() which dumps IPU register state to debug. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02gpu: ipu-cpmem: Add ipu_cpmem_dump()Steve Longerbeam
Adds ipu_cpmem_dump() which dumps a channel's cpmem to debug. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02gpu: ipu-cpmem: Add second buffer support to ipu_cpmem_set_image()Steve Longerbeam
Add a second buffer physaddr to struct ipu_image, for double-buffering support. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02gpu: ipu-cpmem: Add ipu_cpmem_set_rotation()Steve Longerbeam
Adds ipu_cpmem_set_rotation(). Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02gpu: ipu-cpmem: Add ipu_cpmem_set_axi_id()Steve Longerbeam
Adds ipu_cpmem_set_axi_id() to set which AXI bus master the channel will use to transfer data onto AXI bus. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02gpu: ipu-cpmem: Add ipu_cpmem_set_block_mode()Steve Longerbeam
Adds ipu_cpmem_set_block_mode(). Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02gpu: ipu-v3: Add ipu_idmac_lock_enable()Steve Longerbeam
Adds ipu_idmac_lock_enable(), which enables or disables channel burst locking. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02gpu: ipu-v3: Add ipu_idmac_enable_watermark()Steve Longerbeam
Adds the function ipu_idmac_enable_watermark(), which enables or disables watermarking in the IDMAC channel. Enabling watermarking can increase a channel's AXI bus arbitration priority. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02gpu: ipu-v3: Add ipu_stride_to_bytes()Steve Longerbeam
Adds ipu_stride_to_bytes(), which converts a pixel stride to bytes, suitable for passing to cpmem. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02gpu: ipu-v3: Add ipu_idmac_clear_buffer()Steve Longerbeam
Add the reverse of ipu_idmac_select_buffer(), that is, clear a buffer ready status in a channel. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02gpu: ipu-v3: Add ipu_idmac_buffer_is_ready()Steve Longerbeam
Add ipu_idmac_buffer_is_ready(), returns true if the given buffer in the given channel is set ready (owned by IPU), or false if not ready (owned by CPU core). Support has been added for third buffer, there is no support yet for triple-buffering in idmac channels, but this function checks buffer-ready for third buffer in case this support is added later. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02gpu: ipu-v3: Move IDMAC channel names to imx-ipu-v3.hSteve Longerbeam
Move the IDMAC channel names to imx-ipu-v3.h, to make the names available outside IPU. Add a couple new channels in the process (async display BG/FG, channels 24 and 29). Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02gpu: ipu-v3: Add helper function checking if pixfmt is planarSteve Longerbeam
Add simple helper function returning true if passed pixel format is one of supported planar ones. Signed-off-by: Dmitry Eremin-Solenikov <dmitry_eremin@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02gpu: ipu-v3: Add rotation mode conversion utilitiesSteve Longerbeam
Add two functions: - ipu_degrees_to_rot_mode(): converts a degrees, hflip, and vflip setting to an IPU rotation mode. - ipu_rot_mode_to_degrees(): converts an IPU rotation mode with given hflip and vflip settings to degrees. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02gpu: ipu-v3: Add ipu_mbus_code_to_colorspace()Steve Longerbeam
Add ipu_mbus_code_to_colorspace() to find ipu_color_space from a media bus pixel format code. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02gpu: ipu-v3: smfc: Add ipu_smfc_set_watermark()Steve Longerbeam
Adds ipu_smfc_set_watermark() which programs a channel's SMFC FIFO levels at which the watermark signal is set and cleared. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02gpu: ipu-v3: smfc: Convert to per-channelSteve Longerbeam
Convert the smfc object to be specific to a single smfc channel. Add ipu_smfc_{get|put} to retrieve and release a single smfc channel for exclusive use, and add use counter to ipu_smfc_{enable|disable}. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-09-02gpu: ipu-v3: Add Image Converter unitSteve Longerbeam
Adds the Image Converter (IC) unit. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Condensed the three CSC setup functions into a single one that uses static tables to set up the CSC task parameters. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>