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path: root/include/uapi/drm/radeon_drm.h
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2016-05-13drm/radeon: add extern C guard for the UAPI headerEmil Velikov
Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-12-10radeon_drm.h: use __u32 and __u64 from linux/types.hMikko Rapeli
Fixes userspace compiler error: drm/radeon_drm.h:794:2: error: unknown type name ‘uint64_t’ Signed-off-by: Mikko Rapeli <mikko.rapeli@iki.fi>
2015-07-29drm/radeon: Drop drm/ prefix for including drm.h in radeon_drm.hMichel Dänzer
This allows radeon_drm.h to be reused verbatim in libdrm. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
2015-06-26Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linuxLinus Torvalds
Pull drm updates from Dave Airlie: "This is the main drm pull request for v4.2. I've one other new driver from freescale on my radar, it's been posted and reviewed, I'd just like to get someone to give it a last look, so maybe I'll send it or maybe I'll leave it. There is no major nouveau changes in here, Ben was working on something big, and we agreed it was a bit late, there wasn't anything else he considered urgent to merge. There might be another msm pull for some bits that are waiting on arm-soc, I'll see how we time it. This touches some "of" stuff, acks are in place except for the fixes to the build in various configs,t hat I just applied. Summary: New drivers: - virtio-gpu: KMS only pieces of driver for virtio-gpu in qemu. This is just the first part of this driver, enough to run unaccelerated userspace on. As qemu merges more we'll start adding the 3D features for the virgl 3d work. - amdgpu: a new driver from AMD to driver their newer GPUs. (VI+) It contains a new cleaner userspace API, and is a clean break from radeon moving forward, that AMD are going to concentrate on. It also contains a set of register headers auto generated from AMD internal database. core: - atomic modesetting API completed, enabled by default now. - Add support for mode_id blob to atomic ioctl to complete interface. - bunch of Displayport MST fixes - lots of misc fixes. panel: - new simple panels - fix some long-standing build issues with bridge drivers radeon: - VCE1 support - add a GPU reset counter for userspace - lots of fixes. amdkfd: - H/W debugger support module - static user-mode queues - support killing all the waves when a process terminates - use standard DECLARE_BITMAP i915: - Add Broxton support - S3, rotation support for Skylake - RPS booting tuning - CPT modeset sequence fixes - ns2501 dither support - enable cmd parser on haswell - cdclk handling fixes - gen8 dynamic pte allocation - lots of atomic conversion work exynos: - Add atomic modesetting support - Add iommu support - Consolidate drm driver initialization - and MIC, DECON and MIPI-DSI support for exynos5433 omapdrm: - atomic modesetting support (fixes lots of things in rewrite) tegra: - DP aux transaction fixes - iommu support fix msm: - adreno a306 support - various dsi bits - various 64-bit fixes - NV12MT support rcar-du: - atomic and misc fixes sti: - fix HDMI timing complaince tilcdc: - use drm component API to access tda998x driver - fix module unloading qxl: - stability fixes" * 'drm-next' of git://people.freedesktop.org/~airlied/linux: (872 commits) drm/nouveau: Pause between setting gpu to D3hot and cutting the power drm/dp/mst: close deadlock in connector destruction. drm: Always enable atomic API drm/vgem: Set unique to "vgem" of: fix a build error to of_graph_get_endpoint_by_regs function drm/dp/mst: take lock around looking up the branch device on hpd irq drm/dp/mst: make sure mst_primary mstb is valid in work function of: add EXPORT_SYMBOL for of_graph_get_endpoint_by_regs ARM: dts: rename the clock of MIPI DSI 'pll_clk' to 'sclk_mipi' drm/atomic: Don't set crtc_state->enable manually drm/exynos: dsi: do not set TE GPIO direction by input drm/exynos: dsi: add support for MIC driver as a bridge drm/exynos: dsi: add support for Exynos5433 drm/exynos: dsi: make use of array for clock access drm/exynos: dsi: make use of driver data for static values drm/exynos: dsi: add macros for register access drm/exynos: dsi: rename pll_clk to sclk_clk drm/exynos: mic: add MIC driver of: add helper for getting endpoint node of specific identifiers drm/exynos: add Exynos5433 decon driver ...
2015-06-18drm/radeon: Add RADEON_INFO_VA_UNMAP_WORKING queryMichel Dänzer
This tells userspace that it's safe to use the RADEON_VA_UNMAP operation of the DRM_RADEON_GEM_VA ioctl. Cc: stable@vger.kernel.org (NOTE: Backporting this commit requires at least backports of commits 26d4d129b6042197b4cbc8341c0618f99231af2f, 48afbd70ac7b6aa62e8d452091023941d8085f8a and c29c0876ec05d51a93508a39b90b92c29ba6423d as well, otherwise using RADEON_VA_UNMAP runs into trouble) Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com>
2015-05-26drm/radeon: add a GPU reset counter queryable by userspaceMarek Olšák
Userspace will be able to tell whether a GPU reset occured by comparing an old referece value of the counter with a new value. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-03-19drm/radeon: add support for read reg query from radeon info ioctlAlex Deucher
This allows us to query certain registers from userspace for profiling and harvest configuration. E.g., it can be used by the GALLIUM_HUD for profiling the status of various gfx blocks. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-03-19drm/radeon: add INFO query for current sclk/mclkAlex Deucher
Allow the UMDs to query the current sclk/mclk for profiling, etc. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-03-19drm/radeon: add INFO query for GPU temperatureAlex Deucher
Useful for profiling. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-09-10drm/radeon: add RADEON_GEM_NO_CPU_ACCESS BO creation flag (v4)Alex Deucher
Allows pinning of buffers in the non-CPU visible portion of vram. v2: incorporate Michel's comments. v3: rebase on Michel's patch v4: rebase on Michel's v2 patch Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-09-10drm/radeon: Add RADEON_GEM_CPU_ACCESS BO creation flagMichel Dänzer
This flag is a hint that userspace expects the BO to be accessed by the CPU. We can use that hint to prevent such BOs from ever being stored in the CPU inaccessible part of VRAM. Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-08-26Merge branch 'drm-next-3.18' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie
into drm-next radeon userptr support. * 'drm-next-3.18' of git://people.freedesktop.org/~agd5f/linux: drm/radeon: allow userptr write access under certain conditions drm/radeon: add userptr flag to register MMU notifier v3 drm/radeon: add userptr flag to directly validate the BO to GTT drm/radeon: add userptr flag to limit it to anonymous memory v2 drm/radeon: add userptr support v8 Conflicts: drivers/gpu/drm/radeon/radeon_prime.c
2014-08-18drm/radeon: properly document reloc priority maskChristian König
Instead of hard coding the value properly document that this is an userspace interface. No intended functional change. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2014-08-11drm/radeon: add userptr flag to register MMU notifier v3Christian König
Whenever userspace mapping related to our userptr change we wait for it to become idle and unmap it from GTT. v2: rebased, fix mutex unlock in error path v3: improve commit message Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-08-11drm/radeon: add userptr flag to directly validate the BO to GTTChristian König
This way we test userptr availability at BO creation time instead of first use. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-08-11drm/radeon: add userptr flag to limit it to anonymous memory v2Christian König
Avoid problems with writeback by limiting userptr to anonymous memory. v2: add commit and code comments Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-08-11drm/radeon: add userptr support v8Christian König
This patch adds an IOCTL for turning a pointer supplied by userspace into a buffer object. It imposes several restrictions upon the memory being mapped: 1. It must be page aligned (both start/end addresses, i.e ptr and size). 2. It must be normal system memory, not a pointer into another map of IO space (e.g. it must not be a GTT mmapping of another object). 3. The BO is mapped into GTT, so the maximum amount of memory mapped at all times is still the GTT limit. 4. The BO is only mapped readonly for now, so no write support. 5. List of backing pages is only acquired once, so they represent a snapshot of the first use. Exporting and sharing as well as mapping of buffer objects created by this function is forbidden and results in an -EPERM. v2: squash all previous changes into first public version v3: fix tabs, map readonly, don't use MM callback any more v4: set TTM_PAGE_FLAG_SG so that TTM never messes with the pages, pin/unpin pages on bind/unbind instead of populate/unpopulate v5: rebased on 3.17-wip, IOCTL renamed to userptr, reject any unknown flags, better handle READONLY flag, improve permission check v6: fix ptr cast warning, use set_page_dirty/mark_page_accessed on unpin v7: add warning about it's availability in the API definition v8: drop access_ok check, fix VM mapping bits Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v4) Reviewed-by: Jérôme Glisse <jglisse@redhat.com> (v4) Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-08-05drm/radeon: Pass GART page flags to radeon_gart_set_page() explicitlyMichel Dänzer
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-06-09drm/radeon: add query for number of active CUsAlex Deucher
Query to find out how many compute units on a GPU. Useful for OpenCL usermode drivers. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-03-03drm/radeon: track memory statistics about VRAM and GTT usage and buffer moves v2Marek Olšák
The statistics are: - VRAM usage in bytes - GTT usage in bytes - number of bytes moved by TTM The last one is actually a counter, so you need to sample it before and after command submission and take the difference. This is useful for finding performance bottlenecks. Userspace queries are also added. v2: use atomic64_t Signed-off-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2014-03-03drm/radeon: add a way to get and set initial buffer domains v2Marek Olšák
When passing buffers between processes, the receiving process needs to know the original buffer domain, so that it doesn't accidentally move the buffer. v2: reserve the buffer Signed-off-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2014-02-18drm/radeon: add VCE version parsing and checkingChristian König
Also make the result available to userspace. Signed-off-by: Christian König <christian.koenig@amd.com>
2014-02-18drm/radeon: initial VCE support v4Christian König
Only VCE 2.0 support so far. v2: squashing multiple patches into this one v3: add IRQ support for CIK, major cleanups, basic code documentation v4: remove HAINAN from chipset list Signed-off-by: Christian König <christian.koenig@amd.com>
2014-01-20drm/radeon: add query to fetch the max engine clock (v2)Alex Deucher
This is needed for reporting the max GPU engine clock in OpenCL. This just reports the max possible engine clock, it does not take into account current conditions that may limit that clock. v2: fix query number for merge with 3.13 Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-12-23drm/radeon: expose render backend mask to the userspaceMarek Olšák
This will allow userspace to correctly program the PA_SC_RASTER_CONFIG register, so it can be considered a fix. Signed-off-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2013-11-18drm/radeon/cik: Add macrotile mode array queryMichel Dänzer
This is required to properly calculate the tiling parameters in userspace. Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-09-20drm/radeon/cik: Add tiling mode index for 1D tiled depth/stencil surfacesMichel Dänzer
CIK uses a different index for 1D DST surfaces compared to SI. Expose the new index so libdrm_radeon can use it properly for userspace drivers. Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30drm/radeon/si: Add support for CP DMA to CS checker for compute v2Tom Stellard
Also add a new RADEON_INFO query to check that CP DMA packets are supported on the compute ring. CP DMA has been supported since the 3.8 kernel, but due to an oversight we forgot to teach the CS checker that the CP DMA packet was legal for the compute ring on Southern Islands GPUs. This patch fixes a bug where the radeon driver will incorrectly reject a legal CP DMA packet from user space. I would like to have the patch backported to stable so that we don't have to require Mesa users to use a bleeding edge kernel in order to take advantage of this feature which is already present in the stable kernels (3.8 and newer). v2: - Don't bump kms version, so this patch can be backported to stable kernels. Cc: stable@vger.kernel.org Signed-off-by: Tom Stellard <thomas.stellard@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-04-11drm/radeon: add si tile mode array query v3Jerome Glisse
Allow userspace to query for the tile mode array so userspace can properly compute surface pitch and alignment requirement depending on tiling. v2: Make strict aliasing safer by casting to char when copying v3: merge fix from Christian Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-04-11drm/radeon: add ring working queryChristian König
Add new ioctl option and bumb minor version number. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-04-09drm/radeon: UVD bringup v8Christian König
Just everything needed to decode videos using UVD. v6: just all the bugfixes and support for R7xx-SI merged in one patch v7: UVD_CGC_GATE is a write only register, lockup detection fix v8: split out VRAM fallback changes, remove support for RV770, add support for HEMLOCK, add buffer sizes checks Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-04-09drm/radeon: Use direct mapping for fast fb access on RS690Samuel Li
This patch allows the CPU to map the stolen vram segment directly rather than going through the PCI BAR. This significantly improves performance for certain workloads with a properly patched ddx. Use radeon.fastfb=1 to enable it (disabled by default). Currently only supported on RS690, but support for RS780/880 and newer APUs may be added eventually. Signed-off-by: Samuel Li <samuel.li@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-12-14drm/radeon: enable the async DMA rings in the CS ioctlAlex Deucher
This enables the functionality added in the previous patches. Userspace acceleration drivers can use the CS ioctl to submit command buffers to the async DMA rings. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-12-07drm/radeon: add new INFO ioctl requestsAlex Deucher
Add requests to get the number of shader engines (SE) and the number of SH per SE. These are needed for geometry and tesselation shaders in the 3D driver as well as setting up PA_SC_RASTER_CONFIG on SI asics. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-12-07drm/radeon: add a CS flag END_OF_FRAMEMarek Olšák
No version bump is required because setting the flag on older DRM has no effect. This only reserves the bit and doesn't use it. I assume we will use it for buffer eviction heuristics. Signed-off-by: Marek Olšák <maraeo@gmail.com>
2012-10-04UAPI: (Scripted) Disintegrate include/drmDavid Howells
Signed-off-by: David Howells <dhowells@redhat.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Michael Kerrisk <mtk.manpages@gmail.com> Acked-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Acked-by: Dave Jones <davej@redhat.com>