| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2016-11-30 | soc: Support for NPS HW scheduling | Noam Camus | |
| This new header file is for NPS400 SoC (part of ARC architecture). The header file includes macros for save/restore of HW scheduling. The control of HW scheduling is achieved by writing core registers. This code was moved from arc/plat-eznps so it can be used from drivers/clocksource/, available only for CONFIG_EZNPS_MTM_EXT. Signed-off-by: Noam Camus <noamca@mellanox.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> | |||
| 2016-05-09 | soc: Support for EZchip SoC | Noam Camus | |
| This header file is for NPS400 SoC. It includes macros for accessing memory mapped registers. These are functional registers that core can use to configure SoC. Signed-off-by: Noam Camus <noamc@ezchip.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Vineet Gupta <vgupta@synopsys.com> | |||
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