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2018-03-22cxgb4: Add support to initialise/read SRQ entriesRaju Rangoju
- This patch adds support to initialise srq table and read srq entries Signed-off-by: Raju Rangoju <rajur@chelsio.com> Reviewed-by: Steve Wise <swise@opengridcomputing.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-22cxgb4: Adds CPL support for Shared Receive QueuesRaju Rangoju
- Add srq table query cpl support for srq - Add cpl_abort_req_rss6 and cpl_abort_rpl_rss6 structs. - Add accessors, macros to get the SRQ IDX value. Signed-off-by: Raju Rangoju <rajur@chelsio.com> Reviewed-by: Steve Wise <swise@opengridcomputing.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-22r8169: add helper tp_to_devHeiner Kallweit
In several places struct device is referenced by using &tp->pci_dev->dev. Add helper tp_to_dev() to improve code readability. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-22r8169: change type of argument in rtl_disable/enable_clock_requestHeiner Kallweit
Changing the argument type to struct rtl8169_private * is more in line with the other functions in the driver and it allows to reduce the code size. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-22r8169: change type of first argument in rtl_tx_performance_tweakHeiner Kallweit
Changing the type of the first argument to struct rtl8169_private * is more in line with the other functions in the driver and it allows to reduce the code size. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-22r8169: simplify rtl_set_mac_addressHeiner Kallweit
Replace open-coded functionality with eth_mac_addr(). Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-20net: dsa: mv88e6xxx: Fix interrupt name for g2 irqUwe Kleine-König
This changes the respective line in /proc/interrupts from 49: x x mv88e6xxx-g1 7 Edge mv88e6xxx-g1 to 49: x x mv88e6xxx-g1 7 Edge mv88e6xxx-g2 which makes more sense. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-20net: dsa: mv88e6xxx: Fix typo in a commentUwe Kleine-König
Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-20net: dsa: mv88e6xxx: Fix name of switch 88E6141Uwe Kleine-König
The switch name is emitted in the kernel log, so having the right name there is nice. Fixes: 1558727a1c1b ("net: dsa: mv88e6xxx: Add support for ethernet switch 88E6141") Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-20mlxsw: spectrum_acl: Do not invalidate already invalid ACL groupsIdo Schimmel
When a new ACL group is created its region (ACL) list is initially empty. Thus, the call to mlxsw_sp_acl_tcam_group_update() would basically invalidate an already invalid (non-existent) group. Remove the unnecessary call and make the function symmetric to its del() counterpart. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-20mlxsw: spectrum_acl: Adapt ACL configuration to new firmware versionsIdo Schimmel
The driver currently creates empty ACL groups, binds them to the requested port and then fills them with actual ACLs that point to TCAM regions. However, empty ACL groups are considered invalid and upcoming firmware versions are going to forbid their binding. Work around this limitation by only performing the binding after the first ACL was added to the group. Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-20mlxsw: spectrum: Reserved field in mbox profile shouldn't be setTal Bar
There is no need to set some of the fields within 'mbox_config_profile', since they are reserved and capability mask should be set to zero. Signed-off-by: Tal Bar <talb@mellanox.com> Acked-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-20mlxsw: pci: Set mbox dma addresses to zero when not usedShalom Toledo
Some of the opcodes don't use in, out or both mboxes. In such cases, the mbox address is a reserved field and FW expects it to be zero. Signed-off-by: Shalom Toledo <shalomt@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-20mlx5: Remove call to ida_pre_getMatthew Wilcox
The mlx5 driver calls ida_pre_get() in a loop for no readily apparent reason. The driver uses ida_simple_get() which will call ida_pre_get() by itself and there's no need to use ida_pre_get() unless using ida_get_new(). Signed-off-by: Matthew Wilcox <mawilcox@microsoft.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-19i40e: Fix the polling mechanism of GLGEN_RSTAT.DEVSTATEPaweł Jabłoński
This fixes the polling mechanism of GLGEN_RSTAT.DEVSTATE in the PF Reset path when Global Reset is in progress. While the driver is polling for the end of the PF Reset and the Global Reset is triggered, abandon the PF Reset path and prepare for the upcoming Global Reset. Signed-off-by: Paweł Jabłoński <pawel.jablonski@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2018-03-19i40evf: remove flags that are never usedJacob Keller
These flags were defined, but there is no use within the driver code, so we don't need to keep them. Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2018-03-19i40e: Prevent setting link speed on I40E_DEV_ID_25G_BPatryk Małek
Setting link settings on backplane devices shouldn't be allowed. This patch adds one more device id to the list which we check that against. Signed-off-by: Patryk Małek <patryk.malek@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2018-03-19i40e: Fix incorrect return typesDoug Dziggel
Fix return types from i40e_status to enum i40e_status_code. Signed-off-by: Doug Dziggel <douglas.a.dziggel@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2018-03-19i40e: add doxygen comment for new mode parameterJacob Keller
A recent patch updated the signature for i40e_aq_set_switch_config() to add a new parameter 'mode'. It forgot to document the parameter in the doxygen function header comment. Add the parameter to the function description now. Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2018-03-19i40e: Close client on suspend and restore client MSIx on resumeShiraz Saleem
During suspend client MSIx vectors are freed while they are still in use causing a crash on entering S3. Fix this calling client close before freeing up its MSIx vectors. Also update the client MSIx vectors on resume before client open is called. Fixes commit b980c0634fe5 ("i40e: shutdown all IRQs and disable MSI-X when suspended") Reported-by: Stefan Assmann <sassmann@redhat.com> Signed-off-by: Shiraz Saleem <shiraz.saleem@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2018-03-19i40e: Prevent setting link speed on KX_X722Patryk Małek
Setting link settings on backplane devices shouldn't be allowed. This patch adds one more device id to the list which we check that against. Signed-off-by: Patryk Małek <patryk.malek@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2018-03-19i40e: Properly check allowed advertisement capabilitiesJan Sokolowski
The i40e_set_link_ksettings and i40e_get_link_ksettings use different codepaths to check available and supported advertisement modes. This creates scenarios where it's possible to set a mode that's not allowed, resulting in a link down. Fix setting advertisement in i40e_set_link_ksettings by calling i40e_get_link_ksettings to check what modes are allowed. Signed-off-by: Jan Sokolowski <jan.sokolowski@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2018-03-19i40evf: Reorder configure_clsflower to avoid deadlock on errorAlexander Duyck
While doing some code review I noticed that we can get into a state where we exit with the "IN_CRITICAL_TASK" bit set while notifying the PF of flower filters. This patch is meant to address that plus tweak the ordering of the while loop waiting on it slightly so that we don't wait an extra period after we have failed for the last time. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2018-03-18net: dsa: mv88e6xxx: Add MDIO interrupts for internal PHYsAndrew Lunn
When registering an MDIO bus, it is possible to pass an array of interrupts, one per address on the bus. phylib will then associate the interrupt to the PHY device, if no other interrupt is provided. Some of the global2 interrupts are PHY interrupts. Place them into the MDIO bus structure. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-18net: dsa: mv88e6xxx: Add number of internal PHYsAndrew Lunn
Add to the info structure the number of internal PHYs, if they generate interrupts. Some of the older generations of switches have internal PHYs, but no interrupt registers. In this case, set the count to zero. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-18net: dsa: mv88e6xxx: Add missing g1 IRQ numbersAndrew Lunn
With the recent change to polling for interrupts, it is important that the number of global 1 interrupts is listed. Without it, the driver requests an interrupt domain for zero interrupts, which returns EINVAL, and the probe fails. Add two missing entries. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-18net: dsa: mv88e6xxx: Fix missing register lock in serdes_get_statsFlorian Fainelli
We can hit the register lock not held assertion with the following path: [ 34.170631] mv88e6085 0.1:00: Switch registers lock not held! [ 34.176510] CPU: 0 PID: 950 Comm: ethtool Not tainted 4.16.0-rc4 #143 [ 34.182985] Hardware name: Freescale Vybrid VF5xx/VF6xx (Device Tree) [ 34.189519] Backtrace: [ 34.192033] [<8010c4b4>] (dump_backtrace) from [<8010c788>] (show_stack+0x20/0x24) [ 34.199680] r6:9f5dc010 r5:00000011 r4:9f5dc010 r3:00000000 [ 34.205434] [<8010c768>] (show_stack) from [<80679d38>] (dump_stack+0x24/0x28) [ 34.212719] [<80679d14>] (dump_stack) from [<804844a8>] (mv88e6xxx_read+0x70/0x7c) [ 34.220376] [<80484438>] (mv88e6xxx_read) from [<804870dc>] (mv88e6xxx_port_get_cmode+0x34/0x4c) [ 34.229257] r5:a09cd128 r4:9ee31d07 [ 34.232880] [<804870a8>] (mv88e6xxx_port_get_cmode) from [<80487e6c>] (mv88e6352_port_has_serdes+0x24/0x64) [ 34.242690] r4:9f5dc010 [ 34.245309] [<80487e48>] (mv88e6352_port_has_serdes) from [<804880b8>] (mv88e6352_serdes_get_stats+0x28/0x12c) [ 34.255389] r4:00000001 [ 34.257973] [<80488090>] (mv88e6352_serdes_get_stats) from [<804811e8>] (mv88e6xxx_get_ethtool_stats+0xb0/0xc0) [ 34.268156] r10:00000000 r9:00000000 r8:00000000 r7:a09cd020 r6:00000001 r5:9f5dc01c [ 34.276052] r4:9f5dc010 [ 34.278631] [<80481138>] (mv88e6xxx_get_ethtool_stats) from [<8064f740>] (dsa_slave_get_ethtool_stats+0xbc/0xc4) mv88e6xxx_get_ethtool_stats() calls mv88e6xxx_get_stats() which calls both chip->info->ops->stats_get_stats(), which holds the register lock, and chip->info->ops->serdes_get_stats() which does not. Have chip->info->ops->serdes_get_stats() be running with the register lock held to avoid such assertions. Fixes: 436fe17d273b ("net: dsa: mv88e6xxx: Allow the SERDES interfaces to have statistics") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-17net: dsa: mv88e6xxx: Fix IRQ when loading moduleAndrew Lunn
Handle polled interrupts correctly when loading the module. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Fixes: 294d711ee8c0 ("net: dsa: mv88e6xxx: Poll when no interrupt defined") Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-17ibmvnic: Remove unused TSO resources in TX pool structureThomas Falcon
Finally, remove the TSO-specific fields in the TX pool strcutures. These are no longer needed with the introduction of separate buffer pools for TSO transmissions. Signed-off-by: Thomas Falcon <tlfalcon@linux.vnet.ibm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-17ibmvnic: Update TX pool cleaning routineThomas Falcon
Update routine that cleans up any outstanding transmits that have not received completions when the device needs to close. Introduces a helper function that cleans one TX pool to make code more readable. Signed-off-by: Thomas Falcon <tlfalcon@linux.vnet.ibm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-17ibmvnic: Improve TX buffer accountingThomas Falcon
Improve TX pool buffer accounting to prevent the producer index from overruning the consumer. First, set the next free index to an invalid value if it is in use. If next buffer to be consumed is in use, drop the packet. Finally, if the transmit fails for some other reason, roll back the consumer index and set the free map entry to its original value. This should also be done if the DMA map fails. Signed-off-by: Thomas Falcon <tlfalcon@linux.vnet.ibm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-17ibmvnic: Update TX and TX completion routinesThomas Falcon
Update TX and TX completion routines to account for TX pool restructuring. TX routine first chooses the pool depending on whether a packet is GSO or not, then uses it accordingly. For the completion routine to know which pool it needs to use, set the most significant bit of the correlator index to one if the packet uses the TSO pool. On completion, unset the bit and use the correlator index to release the buffer pool entry. Signed-off-by: Thomas Falcon <tlfalcon@linux.vnet.ibm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-17ibmvnic: Update TX pool initialization routineThomas Falcon
Introduce function that initializes one TX pool. Use that to create each pool entry in both the standard TX pool and TSO pool arrays. Signed-off-by: Thomas Falcon <tlfalcon@linux.vnet.ibm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-17ibmvnic: Update release TX pool routineThomas Falcon
Introduce function that frees one TX pool. Use that to release each pool in both the standard TX pool and TSO pool arrays. Signed-off-by: Thomas Falcon <tlfalcon@linux.vnet.ibm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-17ibmvnic: Update and clean up reset TX pool routineThomas Falcon
Update TX pool reset routine to accommodate new TSO pool array. Introduce a function that resets one TX pool, and use that function to initialize each pool in both pool arrays. Signed-off-by: Thomas Falcon <tlfalcon@linux.vnet.ibm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-17ibmvnic: Generalize TX pool structureThomas Falcon
Remove some unused fields in the structure and include values describing the individual buffer size and number of buffers in a TX pool. This allows us to use these fields for TX pool buffer accounting as opposed to using hard coded values. Include a new pool array for TSO transmissions. Signed-off-by: Thomas Falcon <tlfalcon@linux.vnet.ibm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-17hv_netvsc: add trace pointsStephen Hemminger
This adds tracepoints to the driver which has proved useful in debugging startup and shutdown race conditions. Signed-off-by: Stephen Hemminger <sthemmin@microsoft.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-17hv_netvsc: pass netvsc_device to rndis haltStephen Hemminger
The caller has a valid pointer, pass it to rndis_filter_halt_device and avoid any possible RCU races here. Signed-off-by: Stephen Hemminger <sthemmin@microsoft.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-17net: ethernet: ti: cpsw: enable vlan rx vlan offloadGrygorii Strashko
In VLAN_AWARE mode CPSW can insert VLAN header encapsulation word on Host port 0 egress (RX) before the packet data if RX_VLAN_ENCAP bit is set in CPSW_CONTROL register. VLAN header encapsulation word has following format: HDR_PKT_Priority bits 29-31 - Header Packet VLAN prio (Highest prio: 7) HDR_PKT_CFI bits 28 - Header Packet VLAN CFI bit. HDR_PKT_Vid bits 27-16 - Header Packet VLAN ID PKT_Type bits 8-9 - Packet Type. Indicates whether the packet is VLAN-tagged, priority-tagged, or non-tagged. 00: VLAN-tagged packet 01: Reserved 10: Priority-tagged packet 11: Non-tagged packet This feature can be used to implement TX VLAN offload in case of VLAN-tagged packets and to insert VLAN tag in case Non-tagged packet was received on port with PVID set. As per documentation, CPSW never modifies packet data on Host egress (RX) and as result, without this feature enabled, Host port will not be able to receive properly packets which entered switch non-tagged through external Port with PVID set (when non-tagged packet forwarded from external Port with PVID set to another external Port - packet will be VLAN tagged properly). Implementation details: - on RX driver will check CPDMA status bit RX_VLAN_ENCAP BIT(19) in CPPI descriptor to identify when VLAN header encapsulation word is present. - PKT_Type = 0x01 or 0x02 then ignore VLAN header encapsulation word and pass packet as is; - if HDR_PKT_Vid = 0 then ignore VLAN header encapsulation word and pass packet as is; - In dual mac mode traffic is separated between ports using default port vlans, which are not be visible to Host and so should not be reported. Hence, check for default port vlans in dual mac mode and ignore VLAN header encapsulation word; - otherwise fill SKB with VLAN info using __vlan_hwaccel_put_tag(); - PKT_Type = 0x00 (VLAN-tagged) then strip out VLAN header from SKB. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-17cxgb4: Fix queue free path of ULD driversArjun Vynipadath
Setting sge_uld_rxq_info to NULL in free_queues_uld(). We are referencing sge_uld_rxq_info in cxgb_up(). This will fix a panic when interface is brought up after a ULDq creation failure. Fixes: 94cdb8bb993a (cxgb4: Add support for dynamic allocation of resources for ULD) Signed-off-by: Arjun Vynipadath <arjun@chelsio.com> Signed-off-by: Casey Leedom <leedom@chelsio.com> Signed-off-by: Ganesh Goudhar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-16liquidio: Simplified napi pollIntiyaz Basha
1) Moved interrupt enable related code from octeon_process_droq_poll_cmd() to separate function octeon_enable_irq(). 2) Removed wrapper function octeon_process_droq_poll_cmd(), and directlyi using octeon_droq_process_poll_pkts(). 3) Removed unused macros POLL_EVENT_XXX. Signed-off-by: Intiyaz Basha <intiyaz.basha@cavium.com> Signed-off-by: Felix Manlunas <felix.manlunas@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-16cxgb4: notify fatal error to uld driversGanesh Goudar
notify uld drivers if the adapter encounters fatal error. Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-16net: macb: Add phy-handle DT supportBrad Mouring
This optional binding (as described in the ethernet DT bindings doc) directs the netdev to the phydev to use. This is useful for a phy chip that has >1 phy in it, and two netdevs are using the same phy chip (i.e. the second mac's phy lives on the first mac's MDIO bus) The devicetree snippet would look something like this: ethernet@feedf00d { ... phy-handle = <&phy0> // the first netdev is physically wired to phy0 ... phy0: phy@0 { ... reg = <0x0> // MDIO address 0 ... } phy1: phy@1 { ... reg = <0x1> // MDIO address 1 ... } ... } ethernet@deadbeef { ... phy-handle = <&phy1> // tells the driver to use phy1 on the // first mac's mdio bus (it's wired thusly) ... } The work done to add the phy_node in the first place (dacdbb4dfc1a1: "net: macb: add fixed-link node support") will consume the device_node (if found). Signed-off-by: Brad Mouring <brad.mouring@ni.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-16net: macb: Remove redundant poll irq assignmentBrad Mouring
In phy_device's general probe, this device will already be set for phy register polling, rendering this code redundant. Signed-off-by: Brad Mouring <brad.mouring@ni.com> Suggested-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-16net: macb: Reorganize macb_mii bringupBrad Mouring
The macb mii setup (mii_probe() and mii_init()) previously was somewhat interspersed, likely a result of organic growth and hacking. This change moves mii bus registration into mii_init and probing the bus for devices into mii_probe. Signed-off-by: Brad Mouring <brad.mouring@ni.com> Suggested-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-16enic: drop IP proto check for vxlan tunnel deleteGovindarajulu Varadarajan
Commit d11790941dd3 ("enic: Add vxlan offload support for IPv6 pkts") added vxlan offload support for IPv6 pkts. Required change in enic_udp_tunnel_del was not made. This creates a bug where once user adds IPv6 tunnel, hw offload for that cannot be deleted. This patch removes check for IP proto in tunnel delete path. Driver need not check for IP proto since same UDP port cannot be used to create two tunnels. Fixes: d11790941dd3 ("enic: Add vxlan offload support for IPv6 pkts") Signed-off-by: Govindarajulu Varadarajan <gvaradar@cisco.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-15net: drivers/net: Remove unnecessary skb_copy_expand OOM messagesJoe Perches
skb_copy_expand without __GFP_NOWARN already does a dump_stack on OOM so these messages are redundant. Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-14i40e: restore TCPv4 input set when re-enabling ATRJacob Keller
When we re-enable ATR we need to restore the input set for TCPv4 filters, in order for ATR to function correctly. We already do this for the normal case of re-enabling ATR when disabling ntuple support. However, when re-enabling ATR after the last TCPv4 filter is removed (but when ntuple support is still active), we did not restore the TCPv4 filter input set. This can cause problems if the TCPv4 filters from FDir had changed the input set, as ATR will no longer behave as expected. When clearing the ATR auto-disable flag, make sure we restore the TCPv4 input set to avoid this. Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2018-03-14i40e: fix for wrong partition id calculation on OCP mezz cardsMariusz Stachura
This patch overwrites number of ports for X722 devices with support for OCP PHY mezzanine. The old method with checking if port is disabled in the PRTGEN_CNF register cannot be used in this case. When the OCP is removed, ports were seen as disabled, which resulted in wrong calculation of partition id, that caused WoL to be disabled on certain ports. Signed-off-by: Mariusz Stachura <mariusz.stachura@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2018-03-14i40e: factor out re-enable functions for ATR and SBJacob Keller
A future patch needs to expand on the logic for re-enabling ATR. Doing so would cause some code to break the 80-character line limit. To reduce the level of indentation, factor out helper functions for re-enabling ATR and SB rules. Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>