summaryrefslogtreecommitdiff
path: root/drivers
AgeCommit message (Collapse)Author
2020-03-05scsi: qedf: Use pci_get_dsn()Jacob Keller
Replace the open-coded implementation for reading the PCIe DSN with pci_get_dsn(). The original code used a for-loop that looped over each of the 8 bytes and copied them into a temporary buffer. pci_get_dsn() uses two calls to pci_read_config_dword, and correctly bitwise ORs them into a u64. Thus, we can simplify the snprintf significantly using %016llX on a u64 value. Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05bnxt_en: Use pci_get_dsn()Jacob Keller
Replace the open-coded implementation for reading the PCIe DSN with pci_get_dsn(). Use of put_unaligned_le64 should be correct. pci_get_dsn() will perform two pci_read_config_dword calls. The first dword will be placed in the first 32 bits of the u64, while the second dword will be placed in the upper 32 bits of the u64. On Little Endian systems, the least significant byte comes first, which will be the least significant byte of the first dword, followed by the least significant byte of the second dword. Since the _le32 variations do not perform byte swapping, we will correctly copy the dwords into the dsn[] array in the same order as before. On Big Endian systems, the most significant byte of the second dword will come first. put_unaligned_le64 will perform a CPU_TO_LE64, which will swap things correctly before copying. This should also end up with the correct bytes in the dsn[] array. While at it, fix a small typo in the netdev_info error message when the DSN cannot be read. Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Cc: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05PCI: Introduce pci_get_dsnJacob Keller
Several device drivers read their Device Serial Number from the PCIe extended config space. Introduce a new helper function, pci_get_dsn(). This function reads the eight bytes of the DSN and returns them as a u64. If the capability does not exist for the device, the function returns 0. Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Cc: Michael Chan <michael.chan@broadcom.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05ibmveth: Remove unused page_offset macroMatthew Wilcox (Oracle)
We already have a function called page_offset(), and this macro is unused, so just delete it. Signed-off-by: Matthew Wilcox (Oracle) <willy@infradead.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05ptp: add VMware virtual PTP clock driverVivek Thampi
Add a PTP clock driver called ptp_vmw, for guests running on VMware ESXi hypervisor. The driver attaches to a VMware virtual device called "precision clock" that provides a mechanism for querying host system time. Similar to existing virtual PTP clock drivers (e.g. ptp_kvm), ptp_vmw utilizes the kernel's PTP hardware clock API to implement a clock device that can be used as a reference in Chrony for synchronizing guest time with host. The driver is only applicable to x86 guests running in VMware virtual machines with precision clock virtual device present. It uses a VMware specific hypercall mechanism to read time from the device. Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com> Signed-off-by: Vivek Thampi <vithampi@vmware.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05Merge tag 'wireless-drivers-next-2020-03-05' of ↵David S. Miller
git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/wireless-drivers-next Kalle Valo says: ==================== wireless-drivers-next patches for v5.7 First set of patches for v5.7. Lots of mt76 patches as they missed the v5.6 deadline and hence they were postponed to the next version. Otherwise nothing special standing out. mt76 Major changes: * dual-band concurrent support for MT7615 * fixes for rx path race conditions * coverage class support for MT7615 * beacon fixes for USB devices * MT7615 LED support * set_antenna support for MT7615 * tracing improvements * preparation for supporting new USB devices * tx power fixes brcmfmac * support BRCM 4364 found in MacBook Pro 15,2 ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05bcm63xx_enet: remove redundant variable definitionstangbin
in this function,‘ret’ is always assigned,so this's definition 'ret = 0' make no sense. Signed-off-by: tangbin <tangbin@cmss.chinamobile.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05net: tulip: Replace zero-length array with flexible-array memberGustavo A. R. Silva
The current codebase makes use of the zero-length array language extension to the C90 standard, but the preferred mechanism to declare variable-length types such as these ones is a flexible array member[1][2], introduced in C99: struct foo { int stuff; struct boo array[]; }; By making use of the mechanism above, we will get a compiler warning in case the flexible array does not occur last in the structure, which will help us prevent some kind of undefined behavior bugs from being inadvertently introduced[3] to the codebase from now on. Also, notice that, dynamic memory allocations won't be affected by this change: "Flexible array members have incomplete type, and so the sizeof operator may not be applied. As a quirk of the original implementation of zero-length arrays, sizeof evaluates to zero."[1] This issue was found with the help of Coccinelle. [1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html [2] https://github.com/KSPP/linux/issues/21 [3] commit 76497732932f ("cxgb3/l2t: Fix undefined behaviour") Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05mlxsw: spectrum_qdisc: Support offloading of FIFO QdiscPetr Machata
There are two peculiarities about offloading FIFO: - sometimes the qdisc has an unspecified handle (it is "invisible") - it may be created before the qdisc that it will be a child of These features make the offload a bit more tricky. The approach chosen in this patch is to make note of all the FIFOs that needed to be rejected because their parents were not known. Later when the parent is created, they are offloaded FIFO is only offloaded for its counters, queue length is ignored. Signed-off-by: Petr Machata <petrm@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Acked-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05mlxsw: spectrum_qdisc: Add handle parameter to ..._ops.replacePetr Machata
PRIO and ETS will need to check the value of qdisc handle in their handlers. Add it to the callback and propagate through. Signed-off-by: Petr Machata <petrm@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Acked-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05mlxsw: spectrum_qdisc: Introduce struct mlxsw_sp_qdisc_statePetr Machata
In order to have a tidy structure where to put information related to Qdisc offloads, introduce a new structure. Move there the two existing pieces of data: root_qdisc and tclass_qdiscs. Embed them directly, because there's no reason to go through pointer anymore. Convert users, update init/fini functions. Signed-off-by: Petr Machata <petrm@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Acked-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05virtio_net: reject unsupported coalescing paramsJakub Kicinski
Set ethtool_ops->supported_coalesce_params to let the core reject unsupported coalescing parameters. This driver correctly rejects all unsupported parameters. As a side effect of these changes the error code for unsupported params changes from EINVAL to EOPNOTSUPP. v2: correctly handle rx-frames (and adjust the commit msg) v3: adjust commit message for new error code and member name Signed-off-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05e1000e: reject unsupported coalescing paramsJakub Kicinski
Set ethtool_ops->supported_coalesce_params to let the core reject unsupported coalescing parameters. This driver did not previously reject unsupported parameters. v3: adjust commit message for new member name Signed-off-by: Jakub Kicinski <kuba@kernel.org> Acked-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05mlx5: reject unsupported coalescing paramsJakub Kicinski
Set ethtool_ops->supported_coalesce_params to let the core reject unsupported coalescing parameters. This driver did not previously reject unsupported parameters. v3: adjust commit message for new member name Signed-off-by: Jakub Kicinski <kuba@kernel.org> Acked-by: Saeed Mahameed <saeedm@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05bnxt: reject unsupported coalescing paramsJakub Kicinski
Set ethtool_ops->supported_coalesce_params to let the core reject unsupported coalescing parameters. This driver did not previously reject unsupported parameters. v3: adjust commit message for new member name Signed-off-by: Jakub Kicinski <kuba@kernel.org> Reviewed-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05ice: let core reject the unsupported coalescing parametersJakub Kicinski
Set ethtool_ops->supported_coalesce_params to let the core reject unsupported coalescing parameters. This driver correctly rejects all unsupported parameters. As a side effect of these changes the info message about the bad parameter will no longer be printed. We also always reject the tx_coalesce_usecs_high param, even if the target queue pair does not have a TX queue. Error code changes from EINVAL to EOPNOTSUPP. v2: allow adaptive TX v3: adjust commit message for new error code and member name Signed-off-by: Jakub Kicinski <kuba@kernel.org> Acked-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Reviewed-by: Jacob Keller <jacob.e.keller@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05hisilicon: let core reject the unsupported coalescing parametersJakub Kicinski
Set ethtool_ops->supported_coalesce_params to let the core reject unsupported coalescing parameters. This driver correctly rejects all unsupported parameters. No functional changes. v3: adjust commit message for new error code and member name Signed-off-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05ionic: let core reject the unsupported coalescing parametersJakub Kicinski
Set ethtool_ops->supported_coalesce_params to let the core reject unsupported coalescing parameters. This driver correctly rejects all unsupported parameters. As a side effect of these changes the error code for unsupported params changes from EINVAL to EOPNOTSUPP. v3: adjust commit message for new error code and member name Signed-off-by: Jakub Kicinski <kuba@kernel.org> Acked-by: Shannon Nelson <snelson@pensando.io> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05nfp: let core reject the unsupported coalescing parametersJakub Kicinski
Set ethtool_ops->supported_coalesce_params to let the core reject unsupported coalescing parameters. This driver correctly rejects all unsupported parameters. No functional changes. v3: adjust commit message for new error code and member name Signed-off-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05stmmac: let core reject the unsupported coalescing parametersJakub Kicinski
Set ethtool_ops->supported_coalesce_params to let the core reject unsupported coalescing parameters. This driver correctly rejects all unsupported parameters. No functional changes. v3: adjust commit message for new error code and member name Signed-off-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05enic: let core reject the unsupported coalescing parametersJakub Kicinski
Set ethtool_ops->supported_coalesce_params to let the core reject unsupported coalescing parameters. This driver correctly rejects all unsupported parameters. The error code changes from EINVAL to EOPNOTSUPP. v3: adjust commit message for new error code and member name Signed-off-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05xgbe: let core reject the unsupported coalescing parametersJakub Kicinski
Set ethtool_ops->supported_coalesce_params to let the core reject unsupported coalescing parameters. This driver correctly rejects all unsupported parameters. We are only losing the error print. v3: adjust commit message for new error code and member name Signed-off-by: Jakub Kicinski <kuba@kernel.org> Acked-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05net: rmnet: use GFP_KERNEL instead of GFP_ATOMICTaehee Yoo
In the current code, rmnet_register_real_device() and rmnet_newlink() are using GFP_ATOMIC. But, these functions are allowed to sleep. So, GFP_KERNEL can be used. Signed-off-by: Taehee Yoo <ap420073@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05net: rmnet: print error message when command failsTaehee Yoo
When rmnet netlink command fails, it doesn't print any error message. So, users couldn't know the exact reason. In order to tell the exact reason to the user, the extack error message is used in this patch. Signed-off-by: Taehee Yoo <ap420073@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-05net: rmnet: add missing module aliasTaehee Yoo
In the current rmnet code, there is no module alias. So, RTNL couldn't load rmnet module automatically. Test commands: ip link add dummy0 type dummy modprobe -rv rmnet ip link add rmnet0 link dummy0 type rmnet mux_id 1 Signed-off-by: Taehee Yoo <ap420073@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-04net: phy: marvell10g: place in powersave mode at probeRussell King
Place the 88x3310 into powersaving mode when probing, which saves 600mW per PHY. For both PHYs on the Macchiatobin double-shot, this saves about 10% of the board idle power. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-04net: phy: marvell10g: add energy detect power down tunableRussell King
Add support for the energy detect power down tunable, which saves around 600mW when the link is down. The 88x3310 supports off, rx-only and NLP every second. Enable EDPD by default for 88x3310. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-04net: phy: marvell10g: add mdix controlRussell King
Add support for controlling the MDI-X state of the PHY. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-04PCI: pci-bridge-emul: Use new constant PCI_STATUS_ERROR_BITSHeiner Kallweit
Use new constant PCI_STATUS_ERROR_BITS to simplify the code. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-04net: skfp: use new constant PCI_STATUS_ERROR_BITSHeiner Kallweit
Use new PCI core constant PCI_STATUS_ERROR_BITS to simplify the code. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-04net: sun: use pci_status_get_and_clear_errorsHeiner Kallweit
Use new helper pci_status_get_and_clear_errors() to simplify the code. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-04r8169: use pci_status_get_and_clear_errorsHeiner Kallweit
Use new helper pci_status_get_and_clear_errors() to simplify the code. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-04PCI: Add pci_status_get_and_clear_errorsHeiner Kallweit
Several drivers use the following code sequence: 1. Read PCI_STATUS 2. Mask out non-error bits 3. Action based on error bits set 4. Write back set error bits to clear them As this is a repeated pattern, add a helper to the PCI core. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-04PCI: Add constant PCI_STATUS_ERROR_BITSHeiner Kallweit
This collection of PCI error bits is used in more than one driver, so move it to the PCI core. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-04r8169: add PCI_STATUS_PARITY to PCI status error bitsHeiner Kallweit
In preparation of factoring out PCI_STATUS error bit handling let drivers use the same collection of error bits. To facilitate bisecting we do this in a separate patch per affected driver. For the r8169 driver we have to add PCI_STATUS_PARITY to the error bits. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-04net: skfp: add PCI_STATUS_REC_TARGET_ABORT to PCI status error bitsHeiner Kallweit
In preparation of factoring out PCI_STATUS error bit handling let drivers use the same collection of error bits. To facilitate bisecting we do this in a separate patch per affected driver. For the skfp driver we have to add PCI_STATUS_REC_TARGET_ABORT to the error bits. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-04net: marvell: add PCI_STATUS_SIG_TARGET_ABORT to PCI status error bitsHeiner Kallweit
In preparation of factoring out PCI_STATUS error bit handling let drivers use the same collection of error bits. To facilitate bisecting we do this in a separate patch per affected driver. For the Marvell drivers we have to add PCI_STATUS_SIG_TARGET_ABORT to the error bits. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-04net: dsa: felix: Allow unknown unicast traffic towards the CPU port moduleVladimir Oltean
Compared to other DSA switches, in the Ocelot cores, the RX filtering is a much more important concern. Firstly, the primary use case for Ocelot is non-DSA, so there isn't any secondary Ethernet MAC [the DSA master's one] to implicitly drop frames having a DMAC we are not interested in. So the switch driver itself needs to install FDB entries towards the CPU port module (PGID_CPU) for the MAC address of each switch port, in each VLAN installed on the port. Every address that is not whitelisted is implicitly dropped. This is in order to achieve a behavior similar to N standalone net devices. Secondly, even in the secondary use case of DSA, such as illustrated by Felix with the NPI port mode, that secondary Ethernet MAC is present, but its RX filter is bypassed. This is because the DSA tags themselves are placed before Ethernet, so the DMAC that the switch ports see is not seen by the DSA master too (since it's shifter to the right). So RX filtering is pretty important. A good RX filter won't bother the CPU in case the switch port receives a frame that it's not interested in, and there exists no other line of defense. Ocelot is pretty strict when it comes to RX filtering: non-IP multicast and broadcast traffic is allowed to go to the CPU port module, but unknown unicast isn't. This means that traffic reception for any other MAC addresses than the ones configured on each switch port net device won't work. This includes use cases such as macvlan or bridging with a non-Ocelot (so-called "foreign") interface. But this seems to be fine for the scenarios that the Linux system embedded inside an Ocelot switch is intended for - it is simply not interested in unknown unicast traffic, as explained in Allan Nielsen's presentation [0]. On the other hand, the Felix DSA switch is integrated in more general-purpose Linux systems, so it can't afford to drop that sort of traffic in hardware, even if it will end up doing so later, in software. Actually, unknown unicast means more for Felix than it does for Ocelot. Felix doesn't attempt to perform the whitelisting of switch port MAC addresses towards PGID_CPU at all, mainly because it is too complicated to be feasible: while the MAC addresses are unique in Ocelot, by default in DSA all ports are equal and inherited from the DSA master. This adds into account the question of reference counting MAC addresses (delayed ocelot_mact_forget), not to mention reference counting for the VLAN IDs that those MAC addresses are installed in. This reference counting should be done in the DSA core, and the fact that it wasn't needed so far is due to the fact that the other DSA switches don't have the DSA tag placed before Ethernet, so the DSA master is able to whitelist the MAC addresses in hardware. So this means that even regular traffic termination on a Felix switch port happens through flooding (because neither Felix nor Ocelot learn source MAC addresses from CPU-injected frames). So far we've explained that whitelisting towards PGID_CPU: - helps to reduce the likelihood of spamming the CPU with frames it won't process very far anyway - is implemented in the ocelot driver - is sufficient for the ocelot use cases - is not feasible in DSA - breaks use cases in DSA, in the current status (whitelisting enabled but no MAC address whitelisted) So the proposed patch allows unknown unicast frames to be sent to the CPU port module. This is done for the Felix DSA driver only, as Ocelot seems to be happy without it. [0]: https://www.youtube.com/watch?v=B1HhxEcU7Jg Suggested-by: Allan W. Nielsen <allan.nielsen@microchip.com> Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Allan W. Nielsen <allan.nielsen@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-04net: mscc: ocelot: eliminate confusion between CPU and NPI portVladimir Oltean
Ocelot has the concept of a CPU port. The CPU port is represented in the forwarding and the queueing system, but it is not a physical device. The CPU port can either be accessed via register-based injection/extraction (which is the case of Ocelot), via Frame-DMA (similar to the first one), or "connected" to a physical Ethernet port (called NPI in the datasheet) which is the case of the Felix DSA switch. In Ocelot the CPU port is at index 11. In Felix the CPU port is at index 6. The CPU bit is treated special in the forwarding, as it is never cleared from the forwarding port mask (once added to it). Other than that, it is treated the same as a normal front port. Both Felix and Ocelot should use the CPU port in the same way. This means that Felix should not use the NPI port directly when forwarding to the CPU, but instead use the CPU port. This patch is fixing this such that Felix will use port 6 as its CPU port, and just use the NPI port to carry the traffic. Therefore, eliminate the "ocelot->cpu" variable which was holding the index of the NPI port for Felix, and the index of the CPU port module for Ocelot, so the variable was actually configuring different things for different drivers and causing at least part of the confusion. Also remove the "ocelot->num_cpu_ports" variable, which is the result of another confusion. The 2 CPU ports mentioned in the datasheet are because there are two frame extraction channels (register based or DMA based). This is of no relevance to the driver at the moment, and invisible to the analyzer module. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Suggested-by: Allan W. Nielsen <allan.nielsen@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-03gianfar: remove unnecessary zeroing coalesce settingsJakub Kicinski
Core already zeroes out the struct ethtool_coalesce structure, drivers don't have to set every field to 0 individually. Signed-off-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-03net: dsa: felix: Wire up the ocelot cls_flower methodsVladimir Oltean
Export the cls_flower methods from the ocelot driver and hook them up to the DSA passthrough layer. Tables for the VCAP IS2 parameters, as well as half key packing (field offsets and lengths) need to be defined for the VSC9959 core, as they are different from Ocelot, mainly due to the different port count. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-03net: mscc: ocelot: parameterize the vcap_is2 propertiesVladimir Oltean
Remove the definitions for the VCAP IS2 table from ocelot_ace.c, since it is specific to VSC7514. The VSC9959 VCAP IS2 table supports more rules (1024 instead of 64) and has a different width for the action (89 bits instead of 99). Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-03net: mscc: ocelot: remove port_pcs_init indirection for VSC7514Vladimir Oltean
The Felix driver is now using its own PHYLINK instance, not calling into ocelot_adjust_link. So the port_pcs_init function pointer is an unnecessary indirection. Remove it. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Allan W. Nielsen <allan.nielsen@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-03net: mscc: ocelot: don't rely on preprocessor for vcap key/action packingVladimir Oltean
The IGR_PORT_MASK key width is different between the 11-port VSC7514 and the 6-port VSC9959 switches. And since IGR_PORT_MASK is one of the first fields of a VCAP key entry, it means that all further field offset/length pairs are shifted between the 2. The ocelot driver performs packing of VCAP half keys with the help of some preprocessor macros: - A set of macros for defining the HKO (Half Key Offset) and HKL (Half Key Length) of each possible key field. The offset of each field is defined as the sum between the offset and the sum of the previous field. - A set of accessors on top of vcap_key_set for shorter (aka less typing) access to the HKO and HKL of each key field. Since the field offsets and lengths are different between switches, defining them through the preprocessor isn't going to fly. So introduce a structure holding (offset, length) pairs and instantiate it in ocelot_board.c for VSC7514. In a future patch, a similar structure will be instantiated in felix_vsc9959.c for NXP LS1028A. The accessors also need to go. They are based on macro name concatenation, which is horrible to understand and follow. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-03net: mscc: ocelot: spell out full "ocelot" name instead of "oc"Vladimir Oltean
This is a cosmetic patch that makes the name of the driver private variable be used uniformly in ocelot_ace.c as in the rest of the driver. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-03net: mscc: ocelot: return directly in ocelot_cls_flower_{replace, destroy}Vladimir Oltean
There is no need to check the "ret" variable, one can just return the function result back to the caller. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Allan W. Nielsen <allan.nielsen@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-03net: mscc: ocelot: replace "rule" and "ocelot_rule" variable names with "ace"Vladimir Oltean
The "ocelot_rule" variable name is both annoyingly long trying to distinguish itself from struct flow_rule *rule = flow_cls_offload_flow_rule(f), as well as actually different from the "ace" variable name which is used all over the place in ocelot_ace.c and is referring to the same structure. And the "rule" variable name is, confusingly, different from f->rule, but sometimes one has to look up to the beginning of the function to get an understanding of what structure type is actually being handled. So let's use the "ace" name wherever possible ("Access Control Entry"). Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Allan W. Nielsen <allan.nielsen@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-03net: mscc: ocelot: simplify tc-flower offload structuresVladimir Oltean
The ocelot tc-flower offload binds a second flow block callback (apart from the one for matchall) just because it uses a different block private structure (ocelot_port_private for matchall, ocelot_port_block for flower). But ocelot_port_block just appears to be boilerplate, and doesn't help with anything in particular at all, it's just useless glue between the (global!) struct ocelot_acl_block *block pointer, and a per-netdevice struct ocelot_port_private *priv. So let's just simplify that, and make struct ocelot_port_private be the private structure for the block offload. This makes us able to use the same flow callback as in the case of matchall. This also reveals that the struct ocelot_acl_block *block is used rather strangely, as mentioned above: it is defined globally, allocated at probe time, and freed at unbind time. So just move the structure to the main ocelot structure, which gives further opportunity for simplification. Also get rid of backpointers from struct ocelot_acl_block and struct ocelot_ace_rule back to struct ocelot, by reworking the function prototypes, where necessary, to use a more DSA-friendly "struct ocelot *ocelot, int port" format. And finally, remove the debugging prints that were added during development, since they provide no useful information at this point. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Allan W. Nielsen <allan.nielsen@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-03net: mscc: ocelot: make ocelot_ace_rule support multiple portsYangbo Lu
The ocelot_ace_rule is port specific now. Make it flexible to be able to support multiple ports too. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Allan W. Nielsen <allan.nielsen@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-03net/freescale: Don't set zero if FW iand bus not-available in gianfarLeon Romanovsky
Rely on ethtool to properly present the fact that FW and bus are not available for the gianfar driver. Signed-off-by: Leon Romanovsky <leonro@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>