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2018-04-11drm/amdgpu: Use dpm_enabled as dpm state flagRex Zhu
driver will set dpm_enabled to true only when module parameter amdgpu_dpm not equal to 0 and smu hw initialize successfully. Reviewed-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-11drm/amd/pp: Use release_firmware directly in powerplayRex Zhu
Use kernel api directly so we can deprecate the cgs interface. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-11drm/amd/pp: Save vf state in pp contextRex Zhu
Store vf state in pp_context so we can deprecate the cgs interface. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-11drm/amd/pp: Lock pm_funcs when set pp tableRex Zhu
unlock mutex until set pp table completely to avoid conflict if other pp functions were called simultaneously. use hwmgr_handle_task instand of pp_dpm_dispatch_tasks. It is not make sense that call pp_functions in ip_functions. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-11drm/amd/pp: Add hwmgr_sw_init/fini functioinsRex Zhu
Clean up pp ip functions Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-11drm/amd/pp: Remove useless fw load error handler on PolarisRex Zhu
Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-11drm/amd/display: Move commit_planes_to_stream to amdgpu_dmHarry Wentland
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-11drm/amd/display: Only program MSA_TIMING_PARAM if it changedAnthony Koo
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-11drm/amd/display: Add double buffer machanism to OCSCXingyue Tao
- Added double buffer mechanism to output CSC so that there's no tearing when adjusting brightness from Radeon settings Signed-off-by: Xingyue Tao <xingyue.tao@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-11drm/amd/display: Add vline IRQ programming for DCNSivapiriyanKumarasamy
Signed-off-by: SivapiriyanKumarasamy <sivapiriyan.kumarasamy@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-11drm/amd/display: Rename encoder_info_packet to dc_info_packetAnthony Koo
Move this out of the HW includes to dc_types.h Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-11drm/amd/display: Couple bug fixes in stats moduleAnthony Koo
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-11drm/amd/display: Add double buffer machanism to ICSCXingyue Tao
- Video playback shows tearing when adjusting brightness through radeon custom settings. - Now added double buffer mechanism to switch input CSC from register buffer ICSC and COMA - Improved tab alignment Signed-off-by: Xingyue Tao <xingyue.tao@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-11drm/amd/display: Add num_active_wb to DMLEric Bernstein
Signed-off-by: Eric Bernstein <eric.bernstein@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-11drm/amd/display: Correct print types in DC_LOGSBhawanpreet Lakha
Correct the types used for printing in logs. This is needed for adding dynamic printing (LINUX), otherwise we get warnings. Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-11drm/amd/display: Add dc_lut_mode enumVitaly Prosyak
Signed-off-by: Vitaly Prosyak <vitaly.prosyak@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-11drm/amd/display: hide inconsistent mpcc programming from dtn logDmytro Laktyushkin
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-11drm/amd/display: Only update mpc blend config if not full updateEric Yang
The current mpcc insert/remove logic does not support updating only a single mpcc. So when pixel alpha changed but no full update we can mistakenly shuffle the mpcc layering order. With this change we will only insert/remove mpcc if there is full update. Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-11drm/amd/display: Separate mem input constuctors for dce 112 and 120Mikita Lipski
Override the memory input functions for dce120 not to program new registers on dce112. This will fix warnings thrown on Polaris asics. Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-11drm/amd/display: add assert in enable FBCRoman Li
Adding assert to prevent possible null deref warning. Only can happen under abnormal circumstances. Signed-off-by: Roman Li <Roman.Li@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-11drm/amd/display: align dtn logs and add mpc idle bit printDmytro Laktyushkin
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-11drm/amd/display: dal 3.1.40Tony Cheng
Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-11drm/amd/display: Implementing new bandwidth registers for DCE120Mikita Lipski
Registers are added and defined. Programmed to default values. Stutter level watermark register is being set to calculated value. Urgent level registers are programmed to the same as urgency. The programming of the registers is not expected to have any functional difference in performance. Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-11drm/amd/display: drop dc_validate_guaranteedJulian Parkin
Block FP16 scaling in validate_resources codepath. Signed-off-by: Julian Parkin <jparkin@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-11drm/amd/display: Change wb_h/vratio to doubleEric Bernstein
Signed-off-by: Eric Bernstein <eric.bernstein@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-11drm/amd/display: Adding stutter entry wm to dce bw structMikita Lipski
Adding the stutter_entry_wm object to dce_bw_output struct and populating it with bw calculations data Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-11drm/amd/display: Don't call amdgpu_dm_display_resume as it doesn't existMikita Lipski
amdgpu_dm_display_resume was merged into dm_resume. No need to call these functions separately. Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-11drm/amd/display: Add debug prints for bandwidth calculationsBhawanpreet Lakha
Using the three functions we can print the dceip, vbios and data struct for bandwidth calculations. This is useful for debugging bandwidth calculation issues without a debugger Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-11drm/amd/display: add mpc to dtn logDmytro Laktyushkin
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Wesley Chalmers <Wesley.Chalmers@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-11drm/amd/display: Don't read EDID in atomic_checkHarry Wentland
We shouldn't attempt to read EDID in atomic_check. We really shouldn't even be modifying the connector object, or any other non-state object, but this is a start at least. Moving EDID cleanup to dm_dp_mst_connector_destroy from dm_dp_destroy_mst_connector to ensure the EDID is still available for headless mode. Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-11drm/amd/display: Rename feature-specific register address init macroNikola Cornij
Signed-off-by: Nikola Cornij <nikola.cornij@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-11drm/amd/display: fix Polaris 12 bw bounding boxDmytro Laktyushkin
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-11drm/amd/display: Update ASIC header filesNikola Cornij
Also separate register address initialization between ASICs for the registers that were removed in scaled-down variation of the ASIC. Signed-off-by: Nikola Cornij <nikola.cornij@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-11drm/amd/display: Retry when read dpcd caps failed.Yongqiang Sun
Some DP panel not detected intermittently due to read dpcd caps failed when doing hot plug. [root cause] DC_HPD_CONNECT_INT_DELAY is set to 0, not delay after HPD toggle and read dpcd data, while some panel need 4ms defer to read. [solution] Add a retry when read failed. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-11drm/amd/display: dal 3.1.39Tony Cheng
Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-11drm/amd/display: correct the condition in setting cursor not visible beyond ↵Martin Tsai
left edge Signed-off-by: Martin Tsai <martin.tsai@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-11drm/amdgpu: Add CM_TEST_DEBUG regs for DCNHarry Wentland
We'd like to use them for reading DCN debug status. Signed-off-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-03drm/amdgpu: Fix memory leaks at amdgpu_init() error pathTakashi Iwai
amdgpu driver checks vgacon_text_force() after some initializations but without cleaning up. This will result in leaks. Move the check of vgacon_text_force() to the beginning of amdgpu_init() for fixing it and also for optimization. Signed-off-by: Takashi Iwai <tiwai@suse.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-03drm/amdgpu: Fix PCIe lane width calculationAlex Deucher
The calculation of the lane widths via ATOM_PPLIB_PCIE_LINK_WIDTH_MASK and ATOM_PPLIB_PCIE_LINK_WIDTH_SHIFT macros did not increment the resulting value, per the comment in pptable.h ("lanes - 1"), and per usage elsewhere. Port of the radeon fix to amdgpu. Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Chunming Zhou <david1.zhou@amd.com> Bug: https://bugs.freedesktop.org/show_bug.cgi?id=102553 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2018-04-03drm/radeon: Fix PCIe lane width calculationPaul Parsons
Two years ago I tried an AMD Radeon E8860 embedded GPU with the drm driver. The dmesg output included driver warnings about an invalid PCIe lane width. Tracking the problem back led to si_set_pcie_lane_width_in_smc(). The calculation of the lane widths via ATOM_PPLIB_PCIE_LINK_WIDTH_MASK and ATOM_PPLIB_PCIE_LINK_WIDTH_SHIFT macros did not increment the resulting value, per the comment in pptable.h ("lanes - 1"), and per usage elsewhere. Applying the increment silenced the warnings. The code has not changed since, so either my analysis was incorrect or the bug has gone unnoticed. Hence submitting this as an RFC. Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Paul Parsons <lost.distance@yahoo.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2018-04-03drm/amdgpu/si: implement get/set pcie_lanes asic callbackAlex Deucher
Required for dpm setup on some asics. Fixes a NULL dereference on asics that require it. Acked-by: Christian König <christian.koenig@amd.com> Bug: https://bugs.freedesktop.org/show_bug.cgi?id=102553 Tested-by: Abel Garcia Dorta <mercuriete@yahoo.es> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2018-04-03drm/amdgpu: Add support for SRBM selection v3Andrey Grodzovsky
Also remove code duplication in write and read regs functions. This also fixes potential missing unlock in amdgpu_debugfs_regs_write in case get_user would fail. v2: Add SRBM mutex locking. v3: Fix TO counter and fix comment location. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-03Revert "drm/amdgpu: Don't change preferred domian when fallback GTT v5"Chunming Zhou
This reverts commit bbaf1871ea1d7b7021e350a3e8bb1ec8408c2030. Felix reports this commit causes regression. Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-03drm/amd/powerply: fix power reading on FijiEric Huang
Power value is wrong reported by customer. It is a regression by commit a7c7bc4c0c47eaac77b8fa92f0672032df7f4254 Author: Rex Zhu <Rex.Zhu@amd.com> Date: Mon Mar 27 15:32:59 2017 +0800 drm/amd/powerplay: reduce sample period time for power readings. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> The theoretical sampling period is from 50ms to 4sec, original 2sec is long but correct, and 20ms is too short. change it to more reasonable 200ms. Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-03drm/amd/powerplay: Enable ACG SS featureKenneth Feng
Port the atomfirmware.h and populates the updated pptable to SMU.With the new parameters in the new pptable, the ACG SS feature is enabled. Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-03drm/amdgpu/sdma: fix mask in emit_pipeline_syncAlex Deucher
Needs to be a 32 bit mask. Acked-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2018-04-03drm/amdgpu: Fix KIQ hang on bare metal for device unbind/bind back v2.Andrey Grodzovsky
Problem: When unbind and then bind back the device KIQ hangs on Vega after mapping KCQs request. Fix: Adding deinitialzie code from CAIL during HW fini solves the hang. v2: use srbm_mutex around soc15_grbm_select() Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-03drm/amd/pp: Clean header file in vega12_smumgr.cRex Zhu
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-03drm/amd/pp: Remove Dead functions on Vega12Rex Zhu
Remove Vega12 DIDT config functions. Reviewed-by: Huang Rui <ray.huang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-04-03drm/amd/pp: silence a static checker warningDan Carpenter
This has a static checker warning because "frev" and "crev" can be uninitialized if "info" is NULL. I just changed the order of the checks so that we check "info" first. Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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