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2020-12-15drm/amdgpu: Fix spelling mistake "Heterogenous" -> "Heterogeneous"Colin Ian King
There is a spelling mistake in a comment in the Kconfig. Fix it. Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-15drm/amdgpu: fix regression in vbios reservation handling on headlessAlex Deucher
We need to move the check under the non-headless case, otherwise we always reserve the VGA save size. Fixes: 157fe68d74c2ad ("drm/amdgpu: fix size calculation with stolen vga memory") Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-15drm/amdgpu/SRIOV: Extend VF reset request wait periodJiange Zhao
In Virtualization case, when one VF is sending too many FLR requests, hypervisor would stop responding to this VF's request for a long period of time. This is called event guard. During this period of cooling time, guest driver should wait instead of doing other things. After this period of time, guest driver would resume reset process and return to normal. Currently, guest driver would wait 12 seconds and return fail if it doesn't get response from host. Solution: extend this waiting time in guest driver and poll response periodically. Poll happens every 6 seconds and it will last for 60 seconds. v2: change the max repetition times from number to macro. Signed-off-by: Jiange Zhao <Jiange.Zhao@amd.com> Acked-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-15drm/amdkfd: correct amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu log.Yifan Zhang
it could also be insufficient vram that makes amdgpu_amdkfd_reserve_mem_limit fail. Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-15drm/amd/display: Adding prototype for dccg21_update_dpp_dto()Souptick Joarder
Kernel test robot throws below warning -> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn21/dcn21_dccg.c:46:6: warning: no previous prototype for 'dccg21_update_dpp_dto' [-Wmissing-prototypes] Adding prototype for dccg21_update_dpp_dto(). Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Souptick Joarder <jrdr.linux@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-15drm/amdgpu: print what method we are using for runtime pmAlex Deucher
So we know when it's enabled and what method we are using. Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-15drm/amdgpu: simplify logic in atpx resume handlingAlex Deucher
Simplify the logic in the runtime resume handling for atpx Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-15drm/amdgpu: no need to call pci_ignore_hotplug for _PR3Alex Deucher
The platform knows it's doing d3cold. Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-15drm/amdgpu: support runtime pm for GPUs that support BOCOAlex Deucher
Enable runtime pm on non HG/PX BOCO capable boards. Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-15drm/amdgpu: update amdgpu_device_supports_boco()Alex Deucher
Change it to check if the device has ACPI power resources. Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-15drm/amdgpu: add check for ACPI power resourcesAlex Deucher
Check if the device has ACPI power resources so we can enable runtime pm if so. Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-15drm/amdgpu: split BOCO and ATPX handlingAlex Deucher
In preparation for systems that support d3cold on dGPUs independent of PX/HG. No functional change intended. Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-15drm/amd/display: Fixed kernel test robot warningSouptick Joarder
Kernel test robot throws below warning -> drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:5349:5: warning: no previous prototype for 'amdgpu_dm_crtc_atomic_set_property' [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:5349:5: warning: no previous prototype for function 'amdgpu_dm_crtc_atomic_set_property' [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:5373:5: warning: no previous prototype for 'amdgpu_dm_crtc_atomic_get_property' [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:5373:5: warning: no previous prototype for function 'amdgpu_dm_crtc_atomic_get_property' [-Wmissing-prototypes] As these functions are only used inside amdgpu_dm.c, these can be made static. Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Souptick Joarder <jrdr.linux@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-15drm/amd/display: 3.2.116Aric Cyr
Signed-off-by: Aric Cyr <aric.cyr@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-15drm/amd/display: [FW Promotion] Release 0.0.46Anthony Koo
- Add new aux_channel_type - Changed port_index to instance in dmub_cmd_dp_aux_control_data - Change aux_return_code_type to sync up with driver - param for ramping abm based on backlight level Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-15drm/amd/display: Fix cleanup typo in MPCC visual confirmAric Cyr
[Why] Typo in MPCC visual confirmation. [How] Fix to correct values. Signed-off-by: Aric Cyr <aric.cyr@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-15drm/amd/display: Fix OGAM LUT calculation precisionFelipe
[Why] The OGAM LUT precision was accumulating too much error in the higher end. [How] Instead of calculating all points of the LUT in relation to the previous ones, perform a full calculation in one of the intermediate segments to stop error propagation. Signed-off-by: Felipe Clark <Felipe.Clark@amd.com> Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-15drm/amd/display: Only update FP2 for full updatesAric Cyr
[Why] FP2 is not double buffered and must wait for VACTIVE before programming. [How] Only update when there is a full update we should change FP2 to avoid delay every flip. Signed-off-by: Aric Cyr <aric.cyr@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-15drm/amd/display: updated wm table for RenoirJake Wang
[Why] For certain timings, Renoir may underflow due to sr exit latency being too slow. [How] Updated wm table for renoir. Signed-off-by: Jake Wang <haonan.wang2@amd.com> Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-15drm/amd/display: delay fp2 programming until vactive before lockMartin Leung
[Why] race condition of programming FP2 wrt pipe locking and vactive state can cause underflow/black screen [How] Enforce the FP2 is only programmed during vactive, and unlock pipe soon afterwards. Signed-off-by: Martin Leung <martin.leung@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-15drm/amd/display: Add DP info frame update for dcn30Leo (Hanghong) Ma
[Why] We are missing the DP info frame update on dcn30, and this will lead to DP SDPs not being sent; [How] Add the DP info frame update for dcn30; Signed-off-by: Leo (Hanghong) Ma <hanghong.ma@amd.com> Reviewed-by: Roman Li <Roman.Li@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-15drm/amd/display: add dcn30_link_encoder_validate_output_with_stream to headerEric Bernstein
[Why] dcn30_link_encoder_validate_output_with_stream was a static function. [How] remove the static define and include it in the header. Signed-off-by: Eric Bernstein <eric.bernstein@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-15drm/amd/display: Fix to be able to stop crc calculationWayne Lin
[Why] Find out when we try to disable CRC calculation, crc generation is still enabled. Main reason is that dc_stream_configure_crc() will never get called when the source is AMDGPU_DM_PIPE_CRC_SOURCE_NONE. [How] Add checking condition that when source is AMDGPU_DM_PIPE_CRC_SOURCE_NONE, we should also call dc_stream_configure_crc() to disable crc calculation. Also, clean up crc window when disable crc calculation. Signed-off-by: Wayne Lin <Wayne.Lin@amd.com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-15drm/amd/display: HP Reverb G2 VR fails to light upAric Cyr
[Why] Many VR headsets require a HSYNC width of 4, but DCN has default minimum of 8. [How] Change the arbitrary minimum HSYNC width to 4 to match DCN20. Signed-off-by: Aric Cyr <aric.cyr@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-15drm/amd/display: Add missing DP_SEC register definitions and masksMax Tseng
[Why] some DP_SEC register defs and masks are missing. [How] add the missing defs and masks. Signed-off-by: Max Tseng <chuan-yu.tseng@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-15drm/amd/display: Change pstate expected timeout warning to 180us on linuxVictor Lu
[Why] There is a warning that triggers when pstate takes too long. Pstate can take up to ~200us on Linux without hanging but it is currently set to 40us. [How] Change the timeout for the warning to be 180us on Linux. Signed-off-by: Victor Lu <victorchengchi.lu@amd.com> Reviewed-by: Roman Li <Roman.Li@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-15drm/amdgpu: skip load smu and sdma microcode on sriov for SIENNA_CICHLIDStanley.Yang
skip load smu and sdma fw on sriov due to sos, ta and asd fw have been skipped for SIENNA_CICHLID. V2: move asic check into smu11 Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-15drm/amd/display: drop retired CONFIG_DRM_AMD_DC_DCN3_0Flora Cui
CONFIG_DRM_AMD_DC_DCN3_0 is retired. drop it Signed-off-by: Flora Cui <flora.cui@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-15drm/amdgpu: add judgement for suspend/resume sequenceLikun Gao
S0ix only makes sense on APUs since they are part of the platform, so only when the ASIC is APU should set amdgpu_acpi_is_s0ix_supported flag to deal with the related situation. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-15drm/amdgpu/sdma5.2: soft reset sdma blocks before setup and start sdmaXiaomeng Hou
Without doing the soft reset, register mmSDMA0_GFX_RB_WPTR's value could not be reset to 0 when sdma block resumes. That would cause the ring buffer's read and write pointers not equal and ring test fail. So add the soft reset step. Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-15drm/amd/pm: add deep sleep control for uclk and fclkEvan Quan
These are supported by Sienna Cichlid and should be taken into consideration during DS control. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-15drm/amd/pm: update the data strucutre for SMU metrics exchangeEvan Quan
This is needed for Sienna Cichlid. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-15drm/amd/pm: correct the data structure for activity monitor coeff exchangeEvan Quan
This is needed for Sienna Cichlid. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-15drm/amd/pm: fulfill the sienna cichlid UMD PSTATE profiling clocksEvan Quan
Fulfill the UMD PSTATE profiling clocks of sienna cichlid. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-10drm/amd/pm: inform SMU RLC status thus enable/disable DPM feature for vangoghXiaomeng Hou
RLC is halted when system suspend/shutdown. However, due to DPM enabled, PMFW is unaware of RLC being halted and will continue sending messages, which would eventually cause an ACPI hang. Use the system_feature_control interface to notify SMU the status of RLC (Normal/OFF) thus enable/disable DPM feature. Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Lazar Lijo <Lijo.Lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-10drm/amd/pm: update the smu v11.5 smc header for vangoghXiaomeng Hou
Add new PMFW message to notify RLC engine status. Signed-off-by: Xiaomeng Hou <Xiaomeng.Hou@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Lazar Lijo <Lijo.Lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-10drm/amdgpu/display: move link_bandwidth_kbps under CONFIG_DRM_AMD_DC_DCNAlex Deucher
It's only used when CONFIG_DRM_AMD_DC_DCN is set. Fixes and set but not used warning. Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-10drm/amd/pm: typo fix (CUSTOM -> COMPUTE)Evan Quan
The "COMPUTE" was wrongly spelled as "CUSTOM". Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-10drm/amd/pm: fulfill sienna cichlid 2nd usb2.0 port workaroundEvan Quan
Fulfill the 2nd usb2.0 port workaround for sienna cichlid. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-10drm/amd/pm: new SMC message for 2nd usb2.0 port workaroundEvan Quan
The workaround is needed by sienna cichlid. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-10drm/amdgpu: new macro for determining 2ND_USB20PORT supportEvan Quan
Used for determining 2ND_USB20PORT support from firmware_capability. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-10drm/amd/pm: expose the firmware_capability from firmware_info tableEvan Quan
That will help to determine whether 2ND_USB20_PORT workaround is needed for Sienna Cichlid. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-10drm/amd/pm: correct the gpo control for sienna cichlidEvan Quan
New SMC message was introduced for gpo control on sienna cichlid. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-10drm/amd/pm: correct power limit setting for SMU V11Evan Quan
Correct the power limit setting for SMU V11 asics. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-10drm/amd/pm: support power source switch on Sienna CichlidEvan Quan
Enable power source switch on Sienna Cichlid. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-10drm/amdkfd: correct pipe offset calculationJiansong Chen
Correct pipe offset calculation in is_pipe_enabled function, it should be done in queues. Signed-off-by: Jiansong Chen <Jiansong.Chen@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-10drm/amd/display: Drop unnecessary function callRodrigo Siqueira
After refactor our amdgpu_dm_atomic_commit, this function only invoke drm_atomic_helper_commit. For this reason, this commit drops amdgpu_dm_atomic_commit and add drm_atomic_helper_commit directly in the atomic_commit hook. v2: squash in warning fix (Alex) Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-10drm/amdgpu: limit the amdgpu_vm_update_ptes trace pointChristian König
The text output should not be more than a page, so only print the first 32 page table entries. If we need all of them we can still look into the binary trace. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Shashank Sharma <shashank.sharma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-10Merge tag 'amd-drm-next-5.11-2020-12-09' of ↵Dave Airlie
git://people.freedesktop.org/~agd5f/linux into drm-next amd-drm-next-5.11-2020-12-09: amdgpu: - SR-IOV fixes - Navy Flounder updates - Sienna Cichlid updates - Dimgrey Cavefish updates - Vangogh updates - Misc SMU fixes - Misc display fixes - Last big hunk of W=1 warning fixes - Cursor validation fixes - CI BACO updates From: Alex Deucher <alexdeucher@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20201210045344.21566-1-alexander.deucher@amd.com Signed-off-by: Dave Airlie <airlied@redhat.com>
2020-12-09drm/amdgpu: Initialise drm_gem_object_funcs for imported BOsAndrey Grodzovsky
For BOs imported from outside of amdgpu, setting of amdgpu_gem_object_funcs was missing in amdgpu_dma_buf_create_obj. Fix by refactoring BO creation and amdgpu_gem_object_funcs setting into single function called from both code paths. Fixes: d693def4fd1c ("drm: Remove obsolete GEM and PRIME callbacks from struct drm_driver") v2: Use use amdgpu_gem_object_create() directly v3: fix warning Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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