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2014-07-21i915: split some DP modesetting code into a separate functionDave Airlie
this is just prep work for mst support. Reviewed-by: Todd Previte <tprevite@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-07-21drm/i915: add some registers need for displayport MST support.Dave Airlie
These are just from the Haswell spec. Reviewed-by: Todd Previte <tprevite@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-07-21drm: gem_cma: Use ERR_CAST helperSachin Kamat
Makes the code a bit more readable. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Sachin Kamat <sachin.kamat@samsung.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-07-21drm/i915: fix psr match conditions screw ups.Dave Airlie
Not enough brown paper bags, you'll have to share one. (oops below). The initial match condition code was racy (locking is coming I hear). then along came: cd234b0bfd5ab012e42274b24aae420fa1823d58 drm/i915: Do not dereference NULL crtc or fb until after checking Chris made an attempt to fix it, Ben "reviewed" it. Daniel merged it. Then drm/i915: Make use of intel_fb_obj() (v2) 2ff8fde1ea0992dfd735dce94f8cae2aacff8e5c made it worse by removing the obj check later. All in all, my laptop can't barely turn off the display without hitting this. Posted to #intel-gfx out of niceness, but I've merged this already into drm-next. Here's an oops. [ 11.528185] BUG: unable to handle kernel NULL pointer dereference at 00000000000000d0 [ 11.528233] IP: [<ffffffffa0161fde>] intel_edp_psr_match_conditions+0x1e/0x2e0 [i915] [ 11.528294] PGD 35bc0067 PUD c997c067 PMD 0 [ 11.528321] Oops: 0000 [#1] SMP [ 11.528916] CPU: 3 PID: 244 Comm: kworker/3:2 Not tainted 3.16.0-rc4+ #17 [ 11.528949] Hardware name: LENOVO 20ARS25701/20ARS25701, BIOS GJET72WW (2.22 ) 02/21/2014 [ 11.529004] Workqueue: events intel_edp_psr_work [i915] [ 11.529031] task: ffff8803079fdaa0 ti: ffff8803079c4000 task.ti: ffff8803079c4000 [ 11.529067] RIP: 0010:[<ffffffffa0161fde>] [<ffffffffa0161fde>] intel_edp_psr_match_conditions+0x1e/0x2e0 [i915] [ 11.529129] RSP: 0018:ffff8803079c7d40 EFLAGS: 00010246 [ 11.529155] RAX: 0000000000000000 RBX: ffff88030c11c000 RCX: c000000000000000 [ 11.529189] RDX: 0000000000000001 RSI: 1df0000000000000 RDI: ffff88030c1190d8 [ 11.529222] RBP: ffff8803079c7d60 R08: ffffffff82691140 R09: 0000000000000000 [ 11.529256] R10: ffff8803079fdaa0 R11: 3e00000000000000 R12: ffff88030c11c728 [ 11.529290] R13: ffff88030c1190d8 R14: ffff88031e2d8e00 R15: 00000000000000c0 [ 11.529324] FS: 0000000000000000(0000) GS:ffff88031e2c0000(0000) knlGS:0000000000000000 [ 11.529361] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 [ 11.529389] CR2: 00000000000000d0 CR3: 00000000c8d9d000 CR4: 00000000001407e0 [ 11.529423] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 [ 11.529457] DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400 [ 11.529489] Stack: [ 11.529500] ffff88030c119000 ffff88030c11c728 ffff88030c1190d8 ffff88031e2d8e00 [ 11.529541] ffff8803079c7d88 ffffffffa01679b2 ffff880035b29a80 ffff880307909f00 [ 11.529583] ffff88031e2d4740 ffff8803079c7df8 ffffffff810a78ab ffffffff810a7849 [ 11.529624] Call Trace: [ 11.529654] [<ffffffffa01679b2>] intel_edp_psr_work+0x52/0x90 [i915] [ 11.529689] [<ffffffff810a78ab>] process_one_work+0x1db/0x540 [ 11.529719] [<ffffffff810a7849>] ? process_one_work+0x179/0x540 [ 11.529750] [<ffffffff810a81ed>] worker_thread+0x11d/0x520 [ 11.529779] [<ffffffff810a80d0>] ? create_and_start_worker+0x60/0x60 [ 11.529810] [<ffffffff810aeb04>] kthread+0xe4/0x100 [ 11.529836] [<ffffffff810aea20>] ? kthread_create_on_node+0x200/0x200 [ 11.529870] [<ffffffff81705ebc>] ret_from_fork+0x7c/0xb0 [ 11.529896] [<ffffffff810aea20>] ? kthread_create_on_node+0x200/0x200 [ 11.529926] Code: ba 31 13 f0 c9 85 f6 75 84 eb d0 66 90 0f 1f 44 00 00 55 48 89 e5 41 56 41 55 41 54 53 48 8b 87 68 ff ff ff 48 8b 9f 28 ff ff ff <48> 8b 80 d0 00 00 00 4c 8b 63 28 48 8b 40 48 48 85 c0 0f 84 1a [ 11.530110] RIP [<ffffffffa0161fde>] intel_edp_psr_match_conditions+0x1e/0x2e0 [i915] [ 11.530163] RSP <ffff8803079c7d40> [ 11.530180] CR2: 00000000000000d0 Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-07-19Merge tag 'topic/core-stuff-2014-07-18' of ↵Dave Airlie
git://anongit.freedesktop.org/drm-intel into drm-next misc core patches. * tag 'topic/core-stuff-2014-07-18' of git://anongit.freedesktop.org/drm-intel: drm: Check for connection_mutex in drm_select_eld drm/dp-mst-helper: Don't use uninitialized fields of the sideband message header drm/dp-mst-helper: Avoid reading uninitialized value drm/plane-helper: Use proper plane init function drivers/gpu/drm/drm_buffer.c: remove unnecessary null test before kfree drm: Fix function names in kerneldoc
2014-07-19Merge tag 'drm-intel-next-2014-07-11' of ↵Dave Airlie
git://anongit.freedesktop.org/drm-intel into drm-next - fbc improvements when stolen memory is tight (Ben) - cdclk handling improvements for vlv/chv (Ville) - proper fix for stuck primary planes on gmch platforms with cxsr (Imre&Ebgert Eich) - gen8 hw semaphore support (Ben) - more execlist prep work from Oscar Mateo - locking fixes for primary planes (Matt Roper) - code rework to support runtime pm for dpms on hsw/bdw (Paulo, Imre & me), but not yet enabled because some fixes from Paulo haven't made the cut - more gpu boost tuning from Chris - as usual piles of little things all over * tag 'drm-intel-next-2014-07-11' of git://anongit.freedesktop.org/drm-intel: (93 commits) drm/i915: Make the RPS interrupt generation mask handle the vlv wa drm/i915: Move RPS evaluation interval counters to i915->rps drm/i915: Don't cast a pointer to void* unnecessarily drm/i915: don't read LVDS regs at compute_config time drm/i915: check the power domains in intel_lvds_get_hw_state() drm/i915: check the power domains in ironlake_get_pipe_config() drm/i915: don't skip shared DPLL assertion on LPT drm/i915: Only touch WRPLL hw state in enable/disable hooks drm/i915: Switch to common shared dpll framework for WRPLLs drm/i915: ->enable hook for WRPLLs drm/i915: ->disable hook for WRPLLs drm/i915: State readout support for WRPLLs drm/i915: add POWER_DOMAIN_PLLS drm/i915: Document that the pll->mode_set hook is optional drm/i915: Basic shared dpll support for WRPLLs drm/i915: Precompute static ddi_pll_sel values in encoders drm/i915: BDW also has special-purpose DP DDI clocks drm/i915: State readout and cross-checking for ddi_pll_sel drm/i915: Move ddi_pll_sel into the pipe config drm/i915: Add a debugfs file for the shared dpll state ...
2014-07-18drm: Check for connection_mutex in drm_select_eldSean Paul
drm_select_eld should check for mode_config.connection_mutex as well as mode_config.mutex: We need that since this function checks conector->encoder links. Signed-off-by: Sean Paul <seanpaul@chromium.org> [danvet: Pimp commit message slightly.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-07-18drm/dp-mst-helper: Don't use uninitialized fields of the sideband message headerDamien Lespiau
We could be using uninitialized fields of the header in drm_dp_encode_sideband_msg_hdr(), for instance hdr->somt is set to 1 in the first patcket but never set to 0 otherwise. Always clear the header at the start then. Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-07-18drm/dp-mst-helper: Avoid reading uninitialized valueDamien Lespiau
A static analysis tool tells me that we could try to read an uninitialized 'ret' value. Plug that. Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-07-18drm/plane-helper: Use proper plane init functionMatt Roper
drm_plane_init() (the legacy plane initialization function) takes a bool as its final parameter; originally this indicated whether a plane was 'private' to the driver (before the DRM core understood non-overlay planes), now it indicates whether the plane is a primary plane (private planes were used by some drivers to represent primary planes internally). The newer drm_universal_plane_init() take an 'enum drm_plane_type' as its final parameter to allow the caller to specify the specific plane type desired (primary, cursor, or overlay). Due to a rebasing mistake, the primary plane helper is currently passing DRM_PLANE_TYPE_PRIMARY (enum value = 1) for drm_plane_init()'s boolean 'is_primary' parameter. This winds up giving the correct behavior since DRM_PLANE_TYPE_PRIMARY evaluates as true, but is confusing to anyone reading the code since we're passing an enum value (one of three possible values) for a boolean parameter. Replace the primary plane helper's call to drm_plane_init() with drm_universal_plane_init() so that the parameter and value types match up as expected. Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-07-18drivers/gpu/drm/drm_buffer.c: remove unnecessary null test before kfreeFabian Frederick
This patch removes special case of last element and loops from idx to 0. Cc: David Airlie <airlied@linux.ie> Cc: dri-devel@lists.freedesktop.org Signed-off-by: Fabian Frederick <fabf@skynet.be> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-07-18drm: Fix function names in kerneldocThierry Reding
The drm_property_create_enum(), drm_property_create_bitmask() and drm_property_create_range() contain the wrong name in the kerneldoc comment. This is probably simply a copy/paste mistake. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-07-18drm/radeon: use helpersRob Clark
Signed-off-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-07-18drm/i915: use helpersRob Clark
Signed-off-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-07-18drm/nouveau: use helpersRob Clark
Signed-off-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-07-18drm/vmwgfx: use helpersRob Clark
Signed-off-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-07-18drm/udl: use helpersRob Clark
Signed-off-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-07-18drm/mgag200: use helpersRob Clark
Signed-off-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-07-18drm/exynos: use helpersRob Clark
Signed-off-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-07-18drm/cirrus: use helpersRob Clark
Signed-off-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-07-18drm/bochs: use helpersRob Clark
Signed-off-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-07-18drm/ast: use helpersRob Clark
Signed-off-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-07-11drm/armada: register crtc with portRussell King
Register the CRTC with the port node so that the DRM OF helpers can find the appropriate CRTC. This is important so that encoders can identify their corresponding possible CRTCs. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-07-11drm/armada: permit CRTCs to be registered as separate devicesRussell King
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-07-11drm/armada: update Armada 510 (Dove) to use "ext_ref_clk1" as the clockRussell King
Remove the underscore between "clk" and "1" so that we match the name of the clock given in the documentation. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-07-11drm/armada: convert to componentized supportRussell King
Convert the Armada DRM driver to use the component helpers, which will permit us to clean up the driver and move towards an implementation which is compatible with a DT description of the hardware. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-07-11Merge branches 'drm-devel' and 'component-for-driver' into armada-drmRussell King
2014-07-11drm: add of_graph endpoint helper to find possible CRTCsRussell King
Add a helper to allow encoders to find their possible CRTCs from the OF graph without having to re-implement this functionality. We add a device_node to drm_crtc which corresponds with the port node in the DT description of the CRTC device. We can then scan the DRM device list for CRTCs to find their index, matching the appropriate CRTC using the port device_node, thus building up the possible CRTC mask. Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-07-10drm/i915: Make the RPS interrupt generation mask handle the vlv waChris Wilson
We can eliminate a lot of special case code by making the computation of the interrupt mask be correct for all callers. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-07-10drm/i915: Move RPS evaluation interval counters to i915->rpsChris Wilson
Place the RPS counters inside the RPS struct. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-07-10drm/i915: Don't cast a pointer to void* unnecessarilyDamien Lespiau
C is super happy to asign anything pointer to void *. Don't pretend otherwise. Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-07-10drm/i915: don't read LVDS regs at compute_config timePaulo Zanoni
We may reach this point while the machine is still runtime suspended, so we'll hit a WARN. The other encoders also don't touch registers at this point, so instead of waking the machine up, write some code to keep the register always at the same state, including after we runtime suspend/resume. Testcase: igt/pm_rpm Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=80463 Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-07-10drm/i915: check the power domains in intel_lvds_get_hw_state()Paulo Zanoni
Just like we do for the other encoders. This should fix some WARNs when running pm_rpm on SNB. Testcase: igt/pm_rpm Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=80463 Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-07-10drm/i915: check the power domains in ironlake_get_pipe_config()Paulo Zanoni
Just like we already do in haswell_get_pipe_config(). This should prevent some WARNs when we run pm_rpm on SNB. Testcase: igt/pm_rpm Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=80463 Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-07-10drm/i915: don't skip shared DPLL assertion on LPTPaulo Zanoni
Since we now have support for shared DPLLS. Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-07-10drm/i915: Only touch WRPLL hw state in enable/disable hooksDaniel Vetter
To be able to do this we need to separately keep track of how many crtcs need a given WRPLL and how many actually actively use it. The common shared dpll framework already has all this, including massive state readout and cross checking. Which allows us to do this switch in a fairly small patch. Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-07-10drm/i915: Switch to common shared dpll framework for WRPLLsDaniel Vetter
Mostly this patch is one big excersize in deleting code and asserts which are no longer needed. Note that we still abuse the shared dpll framework a bit since we call the enable/disable functions from the crtc mode_set and off hooks. But changing the actual hardware sequence will be done in the next step. Note that besides the massive amount of changes in this patch the places and order in which the low-level WRPLL code is called is absolutely unchanged. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> [imre: rebased on patchset version w/o pch/crt/fdi refactoring] Signed-off-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-07-10drm/i915: ->enable hook for WRPLLsDaniel Vetter
This time around another cute hack to pre-fill the pll->hw_state with the right values. And also remove a bunch of checks which will be replaced by lots more checks in the common framework. Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-07-10drm/i915: ->disable hook for WRPLLsDaniel Vetter
Currently still with a redudant WARN_ON in there, the common shared dpll code will take care of this in the future. Also we need to flip the switch for the transitional hack now to make sure that we disable the right pll. Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-07-10drm/i915: State readout support for WRPLLsDaniel Vetter
Still tacked onto the side, but slowly getting there. v2: Don't forget the debugfs file. v3 (from Paulo): Don't forget to check the power domains. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-07-10drm/i915: add POWER_DOMAIN_PLLSPaulo Zanoni
And get/put it when needed. The special thing about this commit is that it will now return false in ibx_pch_dpll_get_hw_state() in case the power domain is not enabled. This will fix some WARNs we have when we run pm_rpm on SNB. Testcase: igt/pm_rpm Bugzilla:https://bugs.freedesktop.org/show_bug.cgi?id=80463 Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-07-10drm/i915: Document that the pll->mode_set hook is optionalDaniel Vetter
The WRPLLs won't use them. Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-07-10drm/i915: Basic shared dpll support for WRPLLsDaniel Vetter
Just filing in names and ids, but not yet officially registering them so that the hw state cross checker doesn't completely freak out about them. Still since we do already read out and cross check config->shared_dpll the basics are now there to flesh out the wrpll shared dpll implementation. The idea is now to roll out all the callbacks step-by-step and then at the end switch to the shared dpll framework. This way hw and sw changes are clearly separated. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> [imre: added const to hsw_ddi_pll_names (Damien)] Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-07-10drm/i915: Precompute static ddi_pll_sel values in encodersDaniel Vetter
This way only the dynamic WRPLL selection for hdmi ddi mode is done in intel_ddi_pll_select. v2: Don't clobber the precomputed values when selecting clocks fro hdmi encoders. v3 (from Paulo): Rebase on top of the s/IS_HASWELL/HAS_DDI/ patch. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Paulo Zanoni <przanoni@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-07-10drm/i915: BDW also has special-purpose DP DDI clocksPaulo Zanoni
Don't let it fall in the HAS_PCH_SPLIT() case. Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-07-10drm/i915: State readout and cross-checking for ddi_pll_selDaniel Vetter
To make things a bit more manageable extract a new function for reading out common ddi port state. This means a bit of duplication between encoders and the core since both look at the same registers, but doesn't seem worth to make a fuzz about. We can also remove the state readout code in intel_ddi_setup_hw_pll_state. That code is only called from the hardware take over and not the cross check code, and only after the crtc state is reconstructed. So we can rely on an accurate value of crtc->config.ddi_pll_sel already. Compared to the old code also trust the hw state more and don't special-case port A - we want to cross-check the actual-state, not bake in our own assumptions about how this is supposed to all be linked up. v2: Make use of the read-out ddi_pll_sel in intel_ddi_clock_get. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> [imre: rebased on patchset version w/o pch/crt/fdi refactoring] Signed-off-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-07-10drm/i915: Move ddi_pll_sel into the pipe configDaniel Vetter
Just boring sed job for preparation. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> [imre: rebased on patchset version w/o pch/crt/fdi refactoring] Signed-off-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-07-10drm/i915: Add a debugfs file for the shared dpll stateDaniel Vetter
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-07-10drm/i915: Move SPLL disabling into hsw_crt_post_disableDaniel Vetter
Similar to how the ->crtc_mode_set hook should touch the hardware to enable anything the ->crtc_off hook should disable anything in the hardware. Otherwise runtime pm for dpms will not work. Currently the only things left int the haswell_crtc_off hook is disabling the ddi plls. We can't move the WRPLL enabling out yet because the current ddi pll sharing code used by the haswell code doesn't separately track active users and overall users. This must be fixed by porting it to the generic shared display pll framework, which is powerful enough. But the SPLL source is only used by the crt encoder and so can be moved already. We only need to make sure that the ddi port E is already off, which hsw_fdi_disable does by calling intel_ddi_post_disable. With this the code reorg to shuffle hsw fdi/lpt specific code into a new hsw-specific crt encoder type is now finally complete. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> [imre: rebased on patchset version w/o pch/crt/fdi refactoring] Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-07-10drm/i915: Move the SPLL enabling into hsw_crt_pre_enableDaniel Vetter
The call to intel_ddi_pll_enable in haswell_crtc_mode_set is the only function that still touches the hardware state from the crtc mode_set callback on hsw. Since the SPLL isn't ever shared we can easily take it out into the hsw crt encoder functions. Temporarily we'll loose a bit of WARN_ON coverage with this, but once the WRPLLs are switched over that will be restored. For the SPLL selection add a WARN in the hsw fdi link training code. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> [imre: rebased on patchset version w/o pch/crt/fdi refactoring] Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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