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2009-09-23drm/i915: Search harder for a reusable objectChris Wilson
As evict_something() is called by routines that do not repeatedly search again, try harder in the initial search to find an object that matches the request. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2009-09-23drm/i915: Clean up evict from list.Chris Wilson
First the routine attempted to unlock a mutex it did not own along the error path. Secondly the routine should never be called on any list but the inactive one, since we attempt to unbind those objects, so fix the calling semantics. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2009-09-23drm/i915: Add tracepointsChris Wilson
By adding tracepoint equivalents for WATCH_BUF/EXEC we are able to monitor the lifetimes of objects, requests and significant events. These events can then be probed using the tracing frameworks, such as systemtap and, in particular, perf. For example to record the stack trace for every GPU stall during a run, use $ perf record -e i915:i915_gem_request_wait_begin -c 1 -g And $ perf report to view the results. [Updated to fix compilation issues caused.] Cc: Arjan van de Ven <arjan@linux.intel.com> Cc: Ben Gamari <bgamari@gmail.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2009-09-21drm/i915: framebuffer compression for GM45+Jesse Barnes
Add support for framebuffer compression on GM45 and above. Removes some unnecessary I915_HAS_FBC checks as well (this is now part of the FBC display function). Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-09-21drm/i915: split display functions by chip typeJesse Barnes
This patch splits out several of the display functions into a separate display function table to avoid tons of chipset specific if..else if..else if blocks all over. There are more opportunities for this (some noted in the structure defintition); so more cleanup patches will follow. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-09-18drm/i915: Skip the sanity checks if the current relocation is validChris Wilson
If the presumed_offset as feed to userspace and returned to the kernel from a previous execbuffer is still valid, then we do not need to rewrite the relocation entry and may skip the offset sanity checks. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-18drm/i915: Check that the relocation points to within the targetChris Wilson
Eric noted a potential concern with the low bits not being strictly used as part of the absolute offset (instead part of the command stream to the GPU), but in practice that should not be an issue. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Tested-by: Andy Whitcroft <apw@canonical.com> Cc: Eric Anholt <eric@anholt.net> CC: stable@kernel.org Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-17drm/i915: correct FBC update when pipe base update occursJesse Barnes
We usually don't have an SAREA, and we always want to update the FBC status anyway, so move the update up above the various master/sarea checks. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-17drm/i915: blacklist Acer AspireOne lid statusJesse Barnes
It reports closed when open, leading to "no outputs found" at startup unless a VGA cable is plugged in. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-17drm/i915: prevent FIFO calculation overflows on 32 bits with high dotclocksJesse Barnes
A very high dotclock (e.g. 229500kHz as reported by Anton) can cause the entries_required variable to overflow, potentially leading to a FIFO watermark value that's too low to support the given mode. Split the division across the calculation to avoid this. Cc: stable@kernel.org Reported-by: Anton Khirnov <wyskas@gmail.com> Tested-by: Anton Khirnov <wyskas@gmail.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-17drm/i915: intel_display.c handle latency variable efficientlyJaswinder Singh Rajput
By handling latency variable efficiently we also get rid of this warning : CC [M] drivers/gpu/drm/i915/intel_display.o drivers/gpu/drm/i915/intel_display.c: In function ‘igd_enable_cxsr’: drivers/gpu/drm/i915/intel_display.c:1918: warning: ‘latency’ may be used uninitialized in this function Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-17drm/i915: remove restore in resumeZhenyu Wang
Don't need extra config restore like for intel_agp, which might cause resume hang issue found by Alan on 845G. Cc: Stable Team <stable@kernel.org> Cc: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-17drm/i915: Improve behaviour under memory pressureChris Wilson
Due to the necessity of having to take the struct_mutex, the i915 shrinker can not free the inactive lists if we fail to allocate memory whilst processing a batch buffer, triggering an OOM and an ENOMEM that is reported back to userspace. In order to fare better under such circumstances we need to manually retry a failed allocation after evicting inactive buffers. To do so involves 3 steps: 1. Marking the backing shm pages as NORETRY. 2. Updating the get_pages() callers to evict something on failure and then retry. 3. Revamping the evict something logic to be smarter about the required buffer size and prefer to use volatile or clean inactive pages. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-17drm/i915: Add ioctl to set 'purgeability' of objectsChris Wilson
Similar to the madvise() concept, the application may wish to mark some data as volatile. That is in the event of memory pressure the kernel is free to discard such buffers safe in the knowledge that the application can recreate them on demand, and is simply using these as a cache. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-17drm/i915: Register a shrinker to free inactive lists under memory pressureChris Wilson
This should help GEM handle memory pressure sitatuions more gracefully. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-17drm/i915: Include buffer size and dirty state in debugfs listsChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-17drm/i915: Remove stored gtt_alignmentChris Wilson
There is no need to store the gtt_alignment as it is either explicitly set according to the hardware requirements (e.g. scanout) or the minimum alignment is computed on demand. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-17drm/i915: Add buffer to inactive list immediately during faultChris Wilson
If we failed to set the domain, the buffer was no longer being tracked on any list. Cc: stable@kernel.org Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-17drm/i915: fix startup hang on some non-mobile platformsJesse Barnes
Due to a bogus FBC support check and failing to check for FBC support in the right places, mode setting on non-mobile platforms could fail and hang in the FBC disable routine. Fix it up. This fix highlights the need for cleanups in this area (function pointers and better feature support checks). Patches for that to follow. Tested-by: Kenny Graunke <kenny@whitecape.org> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-17drm/i915: fix suspend/resume breakage in lid notifierJesse Barnes
We now unconditionally restore the mode at lid open time since some platforms turn off the panel, pipes or other display elements when the lid is closed. There's a problem with doing this at resume time however. At resume time, we'll get a lid event, but restoring the mode at that time may not be safe (e.g. if we get the lid event before global state has been restored), so check the suspended state and make sure our restore is locked against other mode updates. Tested-by: Ben Gamari <bgamari.foss@gmail.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-17drm/i915: Make dev_priv->mm.wedged an atomic_tBen Gamari
There is a very real possibility that multiple CPUs will notice that the GPU is wedged. This introduces all sorts of potential race conditions. Make the wedged flag atomic to mitigate this risk. Signed-off-by: Ben Gamari <bgamari.foss@gmail.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-17drm/i915: Hookup chip reset in error handlerBen Gamari
This patch uses the previously introduced chip reset logic to reset the chip when an error event is detected. Signed-off-by: Ben Gamari <bgamari.foss@gmail.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-17drm/i915: Implement GPU reset on i965Ben Gamari
This patch puts in place the machinery to attempt to reset the GPU. This will be used when attempting to recover from a GPU hang. Signed-off-by: Owain G. Ainsworth <oga@openbsd.org> Signed-off-by: Ben Gamari <bgamari.foss@gmail.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-17drm/i915: Add hangcheck timerBen Gamari
We set a periodic timer to check on the GPU, resetting it every time a batch is completed. If the timer elapses, we check acthd. If acthd hasn't changed in two timer periods, we assume the chip is wedged. This is implemented in such a way that it leaves the option open to employ adaptive timer intervals in the future. One could wait until several timer periods have elapsed before declaring the chip dead. If the chip comes back after several periods but before the "dead" threshold, the timer interval or dead threshold could be raised. It is important to note that while checking for active requests, we need to account for the fact that requests are removed from the list (i.e. retired) in a deferred work queue handler. This means that merely checking for an empty request_list is insufficient; the list could be non-empty yet the GPU still idle, causing the hangcheck timer to incorrectly mark the GPU as wedged (it took me a while to figure that out---sigh...) Signed-off-by: Ben Gamari <bgamari.foss@gmail.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-17drm/i915: make i915_seqno_passed non-staticBen Gamari
We'll need it in i915_irq.c for checking whether there are outstanding requests. Also, the function really ought to return a bool, not an int. Signed-off-by: Ben Gamari <bgamari.foss@gmail.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-17drm/i915: Refactor save/restore codeBen Gamari
We move the display-specific code into it's own functions, called from the general GPU state save/restore functions. This will be needed later by the GPU reset code. Signed-off-by: Ben Gamari <bgamari.foss@gmail.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-17drm/i915: Check whether chip is wedged in i915_wait_request()Ben Gamari
i915_wait_request() only checks mm.wedged after it interacts with the hardware, generally causing the driver to lock up waiting for a wedged chip. Make sure we check mm.wedged as the first thing we do. Reported-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Ben Gamari <bgamari.foss@gmail.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-17drm/i915: fix opregion backlight chip detect and rangeLi Peng
BLC_PWM_CTL2 is for 965+ only, so add device model check for legacy backlight control. For native backlight control, it maps the backlight value (0~255) in opregion ASLE[BCLP] to backlight duty cycle (0~max_backlight) and set into control register. It also add support for IGD device, which follows opregion spec. Signed-off-by: Li Peng <peng.li@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-17drm/i915: Fix LVDS panel fitting on ArrandaleZhenyu Wang
Arrandale has new window based method for panel fitting. This one enables full screen aspect scaling on LVDS. It fixes standard mode display failure on LVDS for Arrandale. Cc: Stable Team <stable@kernel.org> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-17drm/i915: Remove DAC disable in CRT force detect on IGDNGZhenyu Wang
This is not required on newer stepping hardware to get reliable force detect status. Removing this fixes screen blank flicker in CRT detect on IGDNG. Cc: Stable Team <stable@kernel.org> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-17drm/i915: Fix SSC frequence for IGDNGZhenyu Wang
IGDNG LVDS SSC uses 120Mhz freq. This fixes one 1600x900 LVDS panel black issue on IGDNG with SSC enabled. Cc: Stable Team <stable@kernel.org> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-17drm/i915: Fix typo for wrong LVDS clock setting on IGDNGZhenyu Wang
New register for PCH LVDS on IGDNG should be used. This is a copy-n-paste typo. This fixes possible dual channel LVDS panel failure on IGDNG. Cc: Stable Team <stable@kernel.org> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-17drm/i915: fix typo in compressed buffer setupJesse Barnes
We want the compressed line length buffer address, not the framebuffer address. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-11drm/i915: Only destroy a constructed mmap offsetChris Wilson
drm_ht_remove_item() does not handle removing an absent item and the hlist in particular is incorrectly initialised. The easy remedy is simply skip calling i915_gem_free_mmap_offset() unless we have actually created the offset and associated ht entry. This also fixes the mishandling of a partially constructed offset which leaves pointers initialized after freeing them along the i915_gem_create_mmap_offset() error paths. In particular this should fix the oops found here: https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/415357/comments/8 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Eric Anholt <eric@anholt.net> Cc: stable@kernel.org
2009-09-11agp/intel: Fix the pre-9xx chipset flush.Eric Anholt
Ever since we enabled GEM, the pre-9xx chipsets (particularly 865) have had serious stability issues. Back in May a wbinvd was added to the DRM to work around much of the problem. Some failure remained -- easily visible by dragging a window around on an X -retro desktop, or by looking at bugzilla. The chipset flush was on the right track -- hitting the right amount of memory, and it appears to be the only way to flush on these chipsets, but the flush page was mapped uncached. As a result, the writes trying to clear the writeback cache ended up bypassing the cache, and not flushing anything! The wbinvd would flush out other writeback data and often cause the data we wanted to get flushed, but not always. By removing the setting of the page to UC and instead just clflushing the data we write to try to flush it, we get the desired behavior with no wbinvd. This exports clflush_cache_range(), which was laying around and happened to basically match the code I was otherwise going to copy from the DRM. Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Brice Goglin <Brice.Goglin@ens-lyon.org> Cc: stable@kernel.org
2009-09-10drm/i915: framebuffer compression for pre-GM45Jesse Barnes
This patch adds framebuffer compression (good for about ~0.5W power savings in the best case) support for pre-GM45 chips. GM45+ have a new, more flexible FBC scheme that will be added in a separate patch. FBC can't always be enabled: the compressed buffer must be physically contiguous and reside in stolen space. So if you have a large display and a small amount of stolen memory, you may not be able to take advantage of FBC. In some cases, a BIOS setting controls how much stolen space is available. Increasing this to 8 or 16M can help. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-09-10drm/i915: generate a KMS uevent at lid open/close timeJesse Barnes
With all the other lid pieces in place, it's easy to generate a uevent for the LVDS connector just like we do for other outputs. Should make lid open/close fit in with the rest of a userland based output reconfiguration scheme. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-09-10drm/i915: use ACPI LID status for LVDS ->detect hookJesse Barnes
We can't load or hotplug detect LVDS like we can other outputs, but if there's a lid device present we can use it as a proxy. This allows the LFP state to be determined at ->detect time, making configurations requiring manual intervention today "just work" assuming the lid device status is correct. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-09-10drm/i915: force mode set at lid open timeJesse Barnes
Some laptop platforms will disable pipes and/or planes at lid close time and not restore them when the lid is opened again. So catch the lid event, and if the lid was opened, force a mode restore. Fixes fdo bug #21230. Acked-by: Matthew Garrett <mjg@redhat.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-09-10ACPI button: provide lid status functionsJesse Barnes
Some drivers need to know when a lid event occurs and get the current status. This can be useful for when a platform firmware clobbers some hardware state at lid time, and a driver needs to restore things when the lid is opened again. Acked-by: Matthew Garrett <mjg59@srcf.ucam.org> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-09-10Add G33 series in VGA hotplug support categoryLi Peng
Test on the IGD chip, which is a G33-like graphic device. Signed-off-by: Li Peng <peng.li@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-09-10drm/i915: Write zero to DPLL_MD Reg for non-SDVO outputZhao Yakui
When the output device is LVDS, maybe the pixel clock of adjusted_mode will be less than that in mode. In such case it will set the incorrect multipler factor in DPLL_MD register. So the dpll_md_reg will be reset when the output type is non-SDVO https://bugs.freedesktop.org/show_bug.cgi?id=22761 Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Reviewd-by: Eric Anholt <eric@anholt.net> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-09-10drm/i915: Add the missing clone_mask for SDVO-VGA(RGB1)Zhao Yakui
Add the missing clone_mask for SDVO-VGA(RGB1) Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-09-10drm/i915: Add the brightness property for SDVO-LVDSZhao Yakui
When the sdvo device is detected as SDVO-LVDS, we will check whether the brightness is supported by issue SDVO enhancement command. If it is supported, we will add the brightness property and then brightness can be adjusted. Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-09-10drm/i915: Add the enhancement property for SDVO-TVZhao Yakui
When the sdvo device is detected as SDVO-TV, we will check whether the sepecific picture enhancement is supported. If it is supported, we will add the corresponnding property for SDVO-TV. We will add the following property for the SDVO-TV enhancements if they are supported: * Contrast/Brightness/Saturation/Hue. * left/right/top/bottom margin: This is implemented by using the horizontal/vertical overscan enhancements. When the overscan enhancements are supported, the above properties will be added. This is to be compatible with what we have done in integrated-TV. * horizontal pos/vertical pos. http://bugs.freedesktop.org/show_bug.cgi?id=22891 Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-09-09drm/i915: Zap mmaps of objects before unbinding them from the GTT.Eric Anholt
Otherwise, some other userland writing into its buffer may race to land writes either after the CPU thinks it's got a coherent view, or after its GTT entries have been redirected to point at the scratch page. Either result is unpleasant. Signed-off-by: Eric Anholt <eric@anholt.net>
2009-09-08drm/i915: add B43 chipset supportFabian Henze
Signed-off-by: Fabian Henze <hoacha@quantentunnel.de> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-09-08agp/intel: Add B43 chipset supportFabian Henze
Signed-off-by: Fabian Henze <hoacha@quantentunnel.de> [Fix reversed HB & IG ids for B43] Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-09-09drm/radeon/r600: use fence->timeout directlyAlex Deucher
Fixes fence timeouts on r6xx/r7xx. Noticed by taiu on IRC. Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2009-09-09drm/radeon/kms: re-apply 2007d633d639c896396e4c4b53b38068f3831307Alex Deucher
Got accidently reverted by c93bb85b5cba3e3a06f2cad8e9bc5c23d3d10aac Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@linux.ie>