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2015-06-11drm/msm: drop redundant debug outputNicholas Mc Guire
wait_for_completion_timeout returns 0 in case of timeout and never return < 0 so there is no additional information in printing the value of time_left here as it will always be 0, thus it can be dropped. Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11drm/msm: wait_for_completion_timeout return is never negativeNicholas Mc Guire
wait_for_completion_timeout returns >= 0 but never negative - so the error check should be against equality to 0 not <= 0. Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11drm/msm: match wait_for_completion_timeout return typeNicholas Mc Guire
return type of wait_for_completion_timeout is unsigned long not int, this patch assigns the return value of wait_for_completion_timeout to an appropriately typed and named variable. Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11drm/msm: dsi: Provide option to force continuous HS clockArchit Taneja
Some DSI peripherals rely on the HS clock on DSI clock lane as their clock source. If the clock lane transitions between HS and LP states, it can disrupt the functioning of such peripherals. The mipi dsi mode flag MIPI_DSI_CLOCK_NON_CONTINUOUS already exists for such peripheral drivers. Use it to configure the bit CLKLN_HS_FORCE_REQUEST in DSI_LANE_CTRL. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11drm/msm: Call drm_prime_gem_destroy to clean up imported GEM objectjilai wang
If the GEM object is imported, drm_prime_gem_destroy needs to be called to clean up dma buffer related information. Signed-off-by: Jilai Wang <jilaiw@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11drm/msm/edp: fix build warning - missing prototypeRob Clark
Fix build warning when building edp/edp_aux.o due to missing prototype for edp_aux_transfer. This function is only used in edp_aux.c so just make it static. Reported-by: Nicholas Mc Guire <hofrat@osadl.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11drm/msm: drop redundant output in debug messageNicholas Mc Guire
wait_for_completion_timeout returns 0 in case of timeout so printing the return value here will always yield 0 and is therefor redundant - dropped. Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11drm/msm: fix HZ dependency of timeoutNicholas Mc Guire
The timeout is passed as a constant which makes it HZ dependent because jiffies are expected so it should be converted to jiffies. The actual value is not clear from the code - my best guess is that this should be 300 milliseconds given that other timeouts are in milliseconds based on looking at other drm drivers (e.g. exynos_drm_dsi.c:356 300ms, tegra/dpaux.c:188 250ms) - this needs to be confirmed by someone who knows the details of the driver. Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11drm/msm: fixup wait_for_completion_timeout handlingNicholas Mc Guire
wait_for_completion_timeout return >= 0 but never negative so the check logic looks inconsistent. Further the return value of wait_for_completion_timeout was being passed up the call chain but the x call sites as drm_dp_i2c_do_msg()/drm_dp_dpcd_access() check for < 0 thus timeout was being treated as success case. <snip> drivers/gpu/drm/drm_dp_helper.c:drm_dp_i2c_do_msg() mutex_lock(&aux->hw_mutex); ret = aux->transfer(aux, msg); mutex_unlock(&aux->hw_mutex); if (ret < 0) { <snip> logic in edp_aux_transfer() seems incorrect as it could return 0 (timeout) but checks of <= 0 to indicate error so the return probably should be -ETIMEDOUT in case wait_for_completion_timeout returns 0 (timeout occurred). Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11drm/msm/mdp5: fix for crash in disable pathRob Clark
Seems like disable can race with complete_flip() in process of disabling a crtc, leading to: [ 49.065364] Call trace: [ 49.071441] [<ffffffc00041d5a0>] mdp5_ctl_blend+0x20/0x1c0 [ 49.073788] [<ffffffc00041ebcc>] mdp5_crtc_disable+0x3c/0xa8 [ 49.079348] [<ffffffc0003e7854>] disable_outputs.isra.4+0x11c/0x220 [ 49.085164] [<ffffffc0003e7afc>] drm_atomic_helper_commit_modeset_disables+0x14/0x38 [ 49.091155] [<ffffffc000425c80>] complete_commit+0x40/0xb8 [ 49.099136] [<ffffffc0004260ac>] msm_atomic_commit+0x364/0x398 [ 49.104430] [<ffffffc00040a614>] drm_atomic_commit+0x3c/0x70 [ 49.110249] [<ffffffc0003e67b8>] drm_atomic_helper_set_config+0x1b0/0x3e0 [ 49.116065] [<ffffffc0003f99bc>] drm_mode_set_config_internal+0x64/0xf8 [ 49.122746] [<ffffffc0003fa624>] drm_framebuffer_remove+0xe4/0x128 [ 49.129171] [<ffffffc0003feaf8>] drm_mode_rmfb+0xc0/0x100 [ 49.135420] [<ffffffc0003efba8>] drm_ioctl+0x258/0x4d0 [ 49.140889] [<ffffffc0001b0388>] do_vfs_ioctl+0x338/0x5d0 [ 49.145921] [<ffffffc0001b06a8>] SyS_ioctl+0x88/0xa0 It makes no sense to free the ctl without disabling all stages, so lets just move them together to avoid the crash. Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11drm/msm: workaround for missing irq on a306/8x16Rob Clark
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11drm/msm: adreno a306 supportRob Clark
As found in apq8016 (used in DragonBoard 410c) and msm8916. Note that numerically a306 is actually 307 (since a305c already claimed 306). Nice and confusing. Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11drm/msm: clarify downstream bus scalingRob Clark
A few spots in the driver have support for downstream android CONFIG_MSM_BUS_SCALING. This is mainly to simplify backporting the driver for various devices which do not have sufficient upstream kernel support. But the intentionally dead code seems to cause some confusion. Rename the #define to make this more clear. Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11drm/msm/mdp4: Support NV12MT format in mdp4Rob Clark
Using fb modifier flag, support NV12MT format in MDP4. v2: - rework the modifier's description [Daniel Vetter's comment] - drop .set_mode_config() callback [Rob Clark's comment] v3: - change VENDOR's name and restrict usage to NV12 [pointed by Daniel] Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11drm/msm: update generated headersRob Clark
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11drm/msm: add missing DRIVER_ATOMIC flagRob Clark
Somehow this got lost when msm atomic support was first merged. Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11drm/msm/adreno: dump scratch regs and other info on hangRob Clark
Dump a bit more info when the GPU hangs, without having hang_debug enabled (which dumps a *lot* of registers). Also dump the scratch registers, as they are useful for determining where in the cmdstream the GPU hung (and they seem always safe to read when GPU has hung). Note that the freedreno gallium driver emits increasing counter values to SCRATCH6 (to identify tile #) and SCRATCH7 (to identify draw #), so these two in particular can be used to "triangulate" where in the cmdstream the GPU hung. Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11drm/virtio: remove some dead codeDan Carpenter
The goto is correct, and we never reach the return statement so just delete the dead code. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-06-11drm/virtio: checking for NULL instead of IS_ERRDan Carpenter
virtio_gpu_alloc_object() returns an error pointer, it never returns NULL. Fixes: dc5698e80cf7 ('Add virtio gpu driver.') Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-06-10drm/amdgpu: fix a amdgpu_dpm=0 bugSonny Jiang
Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-10drm/amdgpu: don't enable/disable display twice on suspend/resumeAlex Deucher
We were doing it in the common code and in the IP specific code. Remove the IP specific code. The common code handles the ordering properly. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-10drm/amdgpu: fix UVD/VCE VM emulationChristian König
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-10drm/amdgpu: enable vce powergatingSonny Jiang
Enable VCE dpm and powergating. VCE dpm dynamically scales the VCE clocks on demand. Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2015-06-10drm/amdgpu/iceland: don't call smu_init on resumeAlex Deucher
smu_init allocates buffers and initializes them. It does not touch the hw. There is no need to do it again on resume. It should really be part of sw_init (and smu_fini should be part of sw_fini), but we need the firmware sizes from the other IPs for firmware loading so we have to wait until sw init is done for all other IPs. Reviewed-by: Sonny Jiang <Sonny.Jiang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-10drm/amdgpu/tonga: don't call smu_init on resumeAlex Deucher
smu_init allocates buffers and initializes them. It does not touch the hw. There is no need to do it again on resume. It should really be part of sw_init (and smu_fini should be part of sw_fini), but we need the firmware sizes from the other IPs for firmware loading so we have to wait until sw init is done for all other IPs. Reviewed-by: Sonny Jiang <Sonny.Jiang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-10drm/amdgpu/cz: don't call smu_init on resumeAlex Deucher
smu_init allocates buffers and initializes them. It does not touch the hw. There is no need to do it again on resume. It should really be part of sw_init (and smu_fini should be part of sw_fini), but we need the firmware sizes from the other IPs for firmware loading so we have to wait until sw init is done for all other IPs. Reviewed-by: Sonny Jiang <Sonny.Jiang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-10drm/amdgpu: update to latest gfx8 golden register settingsAlex Deucher
Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-10drm/amdgpu: whitespace cleanup in gmc8 golden regsAlex Deucher
Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-10drm/admgpu: move XDMA golden registers to dce codeAlex Deucher
Already moved other display registers. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-10drm/amdgpu: fix the build on big endianAlex Deucher
Some leftover copy and pastes from radeon that never got updated. Reviewed-by: Christian König <christian.koenig@amd.com> Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-10drm/amdgpu: remove the VI hardware semaphore in ring syncDavid Zhang
Signed-off-by: David Zhang <david1.zhang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2015-06-08drm/amdgpu: set the gfx config properly for all CZ variants (v2)Alex Deucher
Need to adjust the number of CUs and RBs. v2: get proper values Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-08drm/amdgpu: also print the pci revision when printing the pci idsAlex Deucher
The driver makes use of this information so print if to aid in debugging. Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-08drm/amdgpu: cleanup VA IOCTLChristian König
Remove the unnecessary returned status and make the IOCTL write only. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-08drm/amdgpu: fix saddr handling in amdgpu_vm_bo_unmapChristian König
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-08drm/amdgpu: fix amdgpu_vm_bo_mapChristian König
We need to reset the bo_va address, otherwise new mappings wouldn't be updated in the page table. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-05drm/amdgpu: disable user fence interrupt (v2)Chunming Zhou
amdgpu submits both kernel and user fences, but just need one interrupt, disable user fence interrupt and don't effect user fence. v2: fix merge error Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-05drm/amdgpu: fix user ptr race conditionChristian König
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: monk liu <monk.liu@amd.com>
2015-06-05drm/amdgpu: add zero timeout check in amdgpu_fence_wait_seq_timeoutJack Xiao
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-06-05Merge branch 'drm-next-4.2-amdgpu' of ↵Dave Airlie
git://people.freedesktop.org/~agd5f/linux into drm-next This is the big pull request for amdgpu, the new driver for VI+ AMD asics. I currently supports Tonga, Iceland, and Carrizo and also contains a Kconfig option to build support for CI parts for testing. All major functionality is supported (displays, gfx, compute, dma, video decode/encode, etc.). Power management is working on Carrizo, but is still being worked on for Tonga and Iceland. * 'drm-next-4.2-amdgpu' of git://people.freedesktop.org/~agd5f/linux: (106 commits) drm/amdgpu: only support IBs in the buffer list (v2) drm/amdgpu: add vram_type and vram_bit_width for interface query (v2) drm/amdgpu: add ib_size/start_alignment interface query drm/amdgpu: add me/ce/pfp_feature_version interface query drm/amdgpu add ce_ram_size for interface query drm/amdgpu add max_memory_clock for interface query (v2) drm/amdgpu: add hdp flush for gfx8 compute ring drm/amdgpu: fix no hdp flush for compute ring drm/amdgpu: add HEVC/H.265 UVD support drm/amdgpu: stop loading firmware with pm.mutex locked drm/amdgpu: remove mclk_lock drm/amdgpu: fix description of vm_size module parameter (v2) drm/amdgpu: remove all sh mem register modification in vm flush drm/amdgpu: rename GEM_OP_SET_INITIAL_DOMAIN -> GEM_OP_SET_PLACEMENT drm/amdgpu: fence should be added to shared slot drm/amdgpu: sync fence of clear_invalids (v2) drm/amdgpu: max_pde_used usage should be under protect drm/amdgpu: fix bug of vm_bo_map (v2) drm/amdgpu: implement the allocation range (v3) drm/amdgpu: rename amdgpu_ip_funcs to amd_ip_funcs (v2) ...
2015-06-05drm/qxl: Propagate correctly errors from qxlhw_handle_to_boFrediano Ziglio
This function could return a NULL pointer in case of handle not present and in case of out of memory conditions however caller function always returned EINVAL error hiding a possible ENOMEM. This patch change the function to return the error instead to be able to propagate the error instead of assuming EINVAL. Signed-off-by: Frediano Ziglio <fziglio@redhat.com> Reviewed-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-06-05drm/qxl: Simplify cleaning qxl processing commandFrediano Ziglio
In qxlhw_handle_to_bo we incremented counters twice, one time for release object and one for reloc_info. In the main function however reloc_info references was drop much earlier than release so keeping the pointer only on release is safe and make cleaning process easier. Signed-off-by: Frediano Ziglio <fziglio@redhat.com> Reviewed-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-06-05drm/qxl: Move main reference counter to GEM object instead of TTM onesFrediano Ziglio
qxl_bo structure has two reference counters, one in the GEM object and another in the TTM object. The GEM object keep a counter to the TTM object so when GEM counter reached zero the TTM counter (using qxl_bo_unref) was decremented. The qxl object is fully freed (both GEM and TTM part are cleaned) when the TTM counter reach zero. One issue was that surface idr structure has no owning on qxl_bo objects however it contains a pointer to qxl_bo object. This caused some nasty race condition for instance qxl_bo object was reaped even after counter was already zero. This patch fix these races moving main counter (the one used by qxl_bo_(un)ref) to GEM object which cleanup routine (qxl_gem_object_free) remove the idr pointer (using qxl_surface_evict) when the counters are still valid. Signed-off-by: Frediano Ziglio <fziglio@redhat.com> Reviewed-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-06-05drm/qxl: Remove format string errorsFrediano Ziglio
Enable format string checks for qxl_io_log and remove resulting warnings which could lead to memory errors on different platform or just printing wrong information. Signed-off-by: Frediano Ziglio <fziglio@redhat.com> Reviewed-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-06-05drm/qxl: Handle correctly failures in qxl_alloc_relase_reservedFrediano Ziglio
Free resources correctly if function fails Signed-off-by: Frediano Ziglio <fziglio@redhat.com> Reviewed-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-06-05drm/qxl: Fix return for qxl_release_allocFrediano Ziglio
This function return handle to allocated release object which is an int. Signed-off-by: Frediano Ziglio <fziglio@redhat.com> Reviewed-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-06-05drm/qxl: Handle all errors in qxl_surface_evictFrediano Ziglio
Only EBUSY error was handled. This could cause code to believe reserve was successful while it failed. Signed-off-by: Frediano Ziglio <fziglio@redhat.com> Reviewed-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-06-05drm/qxl: Avoid double free on errorFrediano Ziglio
Is we are not able to get source bo object from handle we free destination bo object and call cleanup code however destination object was already inserted in reloc_info array (num_relocs was already incremented) so on cleanup we free destination again. Signed-off-by: Frediano Ziglio <fziglio@redhat.com> Reviewed-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-06-05drm/qxl: Fix print statement not using uninitialized variableFrediano Ziglio
reloc_info[i] is not still initialized in the print statement. Signed-off-by: Frediano Ziglio <fziglio@redhat.com> Reviewed-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-06-05drm/qxl: Do not leak memory if qxl_release_list_add failsFrediano Ziglio
If the function fails reference counter to the object is not decremented causing leaks. This is hard to spot as it happens only on very low memory situations. Signed-off-by: Frediano Ziglio <fziglio@redhat.com> Cc: stable@vger.kernel.org Reviewed-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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