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2020-09-24spi: spi-zynqmp-gqspi: Update driver to use spi-mem frameworkAmit Kumar Mahapatra
Updated Zynqmp qspi controller driver to use spi-mem framework. Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/490a7642a975f4d3dd9618304e9e45f7e2414661.1600931476.git.michal.simek@xilinx.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-24spi: spi-zynqmp-gqspi: Fix kernel-doc warningsAmit Kumar Mahapatra
Fix kernel-doc warnings in ZynqMP qspi driver file. Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/ba5920c57eee06fafa6f9d1df9859e69819ac301.1600931476.git.michal.simek@xilinx.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-23spi: spi-imx: spi_imx_transfer(): add support for effective_speed_hzMarc Kleine-Budde
This patch implementes the reporting of the effectivly used speed_hz for the transfer by setting tfr->effective_speed_hz. See the following patch, which adds this feature to the SPI core for more information: 5d7e2b5ed585 spi: core: allow reporting the effectivly used speed_hz for a transfer Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Link: https://lore.kernel.org/r/20200917202420.1914104-1-mkl@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-22spi: omap2-mcspi: Improve performance waiting for CHSTATAswath Govindraju
This reverts commit 13d515c796 (spi: omap2-mcspi: Switch to readl_poll_timeout()). The amount of time spent polling for the MCSPI_CHSTAT bits to be set on AM335x-icev2 platform is less than 1us (about 0.6us) in most cases, with or without using DMA. So, in most cases the function need not sleep. Also, setting the sleep_usecs to zero would not be optimal here because ktime_add_us() used in readl_poll_timeout() is slower compared to the direct addition used after the revert. So, it is sub-optimal to use readl_poll_timeout in this case. When DMA is not enabled, this revert results in an increase of about 27% in throughput and decrease of about 20% in CPU usage. However, the CPU usage and throughput are almost the same when used with DMA. Therefore, fix this by reverting the commit which switched to using readl_poll_timeout(). Fixes: 13d515c796ad ("spi: omap2-mcspi: Switch to readl_poll_timeout()") Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Link: https://lore.kernel.org/r/20200910122624.8769-1-a-govindraju@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-22spi: npcm-fiu: simplify the return expression of npcm_fiu_probe()Qinglang Miao
Simplify the return expression. Signed-off-by: Qinglang Miao <miaoqinglang@huawei.com> Link: https://lore.kernel.org/r/20200921131106.93228-1-miaoqinglang@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-21spi/topcliff-pch: drop double zeroingJulia Lawall
sg_init_table zeroes its first argument, so the allocation of that argument doesn't have to. the semantic patch that makes this change is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression x,n,flags; @@ x = - kcalloc + kmalloc_array (n,sizeof(*x),flags) ... sg_init_table(x,n) // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@inria.fr> Link: https://lore.kernel.org/r/1600601186-7420-12-git-send-email-Julia.Lawall@inria.fr Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-17Merge series "spi: Fixes for FSI-attached controller" from Eddie James ↵Mark Brown
<eajames@linux.ibm.com>: This series implements a number of fixes for the FSI-attached SPI controller driver. Changes since v1: - Switch to a new compatible string for the restricted version of the SPI controller, rather than a new boolean parameter. Brad Bishop (3): spi: fsi: Handle 9 to 15 byte transfers lengths spi: fsi: Fix clock running too fast spi: fsi: Fix use of the bneq+ sequencer instruction Eddie James (3): dt-bindings: fsi: fsi2spi: Add compatible string for restricted version spi: fsi: Implement restricted size for certain controllers spi: fsi: Check mux status before transfers .../devicetree/bindings/fsi/ibm,fsi2spi.yaml | 1 + drivers/spi/spi-fsi.c | 139 ++++++++++++++---- 2 files changed, 109 insertions(+), 31 deletions(-) -- 2.26.2
2020-09-17spi: dw-pci: free previously allocated IRQs if desc->setup() failsJay Fang
Free previously allocated IRQs when return an error code of desc->setup() which is not always successful. And simplify the code by adding a goto label. Fixes: 8f5c285f3ef5 ("SPI: designware: pci: Switch over to MSI interrupts") CC: Felipe Balbi <felipe.balbi@linux.intel.com> Signed-off-by: Jay Fang <f.fangjian@huawei.com> Link: https://lore.kernel.org/r/1600132969-53037-1-git-send-email-f.fangjian@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-17spi: spi-nxp-fspi: Add ACPI supportkuldip dwivedi
Currently NXP fspi driver has support of DT only. Adding ACPI support to the driver so that it can be used by UEFI firmware booting in ACPI mode. This driver will be probed if any firmware will expose HID "NXP0009" in DSDT table. Signed-off-by: kuldip dwivedi <kuldip.dwivedi@puresoftware.com> Reviewed-by: Ashish Kumar <Ashish.Kumar@nxp.com> Link: https://lore.kernel.org/r/20200911130331.6313-1-kuldip.dwivedi@puresoftware.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-17spi: lantiq: remove redundant irqsave and irqrestore in hardIRQBarry Song
Running in hardIRQ, disabling irq is redundant. Signed-off-by: Barry Song <song.bao.hua@hisilicon.com> Link: https://lore.kernel.org/r/20200916101042.21860-1-song.bao.hua@hisilicon.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-17spi: xilinx: Fix info message during probeRicardo Ribalda
The info message was showing the mapped address of the device. To avoid security problems, all virtual addresses are converted to __ptrval__, so the message was useless/ugly: [ 2.304949] xilinx_spi b0010000.spi-flash: at 0xB0010000 mapped to 0x(____ptrval____), irq=37 Use %pR instead: [ 15.021354] xilinx_spi b0010000.spi-flash: at [mem 0xb0010000-0xb001ffff], irq=37 Signed-off-by: Ricardo Ribalda <ribalda@kernel.org> Acked-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/20200915112936.320647-1-ribalda@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-17spi: fsi: Check mux status before transfersEddie James
The SPI controllers are not accessible if the mux isn't set. Therefore, check the mux status before starting a transfer and fail out if it isn't set. Signed-off-by: Eddie James <eajames@linux.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20200909222857.28653-7-eajames@linux.ibm.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-17spi: fsi: Implement restricted size for certain controllersEddie James
Some of the FSI-attached SPI controllers cannot use the loop command in programming the sequencer due to security requirements. Check the devicetree compatibility that indicates this condition and restrict the size for these controllers. Also, add more transfers directly in the sequence up to the length of the sequence register. Fixes: bbb6b2f9865b ("spi: Add FSI-attached SPI controller driver") Signed-off-by: Eddie James <eajames@linux.ibm.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20200909222857.28653-6-eajames@linux.ibm.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-17spi: fsi: Fix use of the bneq+ sequencer instructionBrad Bishop
All of the switches in N2_count_control in the counter configuration are required to make the branch if not equal and increment command work. Set them when using bneq+. A side effect of this mode requires a dummy write to TDR when both transmitting and receiving otherwise the controller won't start shifting receive data. It is likely not possible to avoid TDR underrun errors in this mode and they are harmless, so do not check for them. Fixes: bbb6b2f9865b ("spi: Add FSI-attached SPI controller driver") Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com> Signed-off-by: Eddie James <eajames@linux.ibm.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20200909222857.28653-4-eajames@linux.ibm.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-17spi: fsi: Fix clock running too fastBrad Bishop
Use a clock divider tuned to a 200MHz FSI bus frequency (the maximum). Use of the previous divider at 200MHz results in corrupt data from endpoint devices. Ideally the clock divider would be calculated from the FSI clock, but that would require some significant work on the FSI driver. With FSI frequencies slower than 200MHz, the SPI clock will simply run slower, but safely. Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com> Signed-off-by: Eddie James <eajames@linux.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20200909222857.28653-3-eajames@linux.ibm.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-17spi: fsi: Handle 9 to 15 byte transfers lengthsBrad Bishop
The trailing <len> - 8 bytes of transfer data in this size range is no longer ignored. Fixes: bbb6b2f9865b ("spi: Add FSI-attached SPI controller driver") Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com> Signed-off-by: Eddie James <eajames@linux.ibm.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20200909222857.28653-2-eajames@linux.ibm.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-14spi: sprd: Simplify with dev_err_probe()Krzysztof Kozlowski
Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and the error value gets printed. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Chunyan Zhang <zhang.lyra@gmail.com> Link: https://lore.kernel.org/r/20200910160706.5883-1-krzk@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-14spi: spi-geni-qcom: Don't wait to start 1st transfer if transmittingDouglas Anderson
If we're sending bytes over SPI, we know the FIFO is empty at the start of the transfer. There's no reason to wait for the interrupt telling us to start--we can just start right away. Then if we transmit everything in one swell foop we don't even need to bother listening for TX interrupts. In a test of "flashrom -p ec -r /tmp/foo.bin" interrupts were reduced from ~30560 to ~29730, about a 3% savings. This patch looks bigger than it is because I moved a few functions rather than adding a forward declaration. The only actual change to geni_spi_handle_tx() was to make it return a bool indicating if there is more to tx. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Akash Asthana <akashast@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20200912111716.1.Ied5e843fad0d6b733a1fb8bcfb364dd2fa889eb3@changeid Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-14spi: bcm2835: Make polling_limit_us staticJason Yan
This eliminates the following sparse warning: drivers/spi/spi-bcm2835.c:78:14: warning: symbol 'polling_limit_us' was not declared. Should it be static? Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Jason Yan <yanaijie@huawei.com> Link: https://lore.kernel.org/r/20200912072211.602735-1-yanaijie@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-14spi: spi-fsl-dspi: use XSPI mode instead of DMA for DPAA2 SoCsVladimir Oltean
The arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi device tree lacks DMA channels for DSPI, so naturally, the driver fails to probe: [ 2.945302] fsl-dspi 2100000.spi: rx dma channel not available [ 2.951134] fsl-dspi 2100000.spi: can't get dma channels In retrospect, this should have been obvious, because LS2080A, LS2085A LS2088A and LX2160A don't appear to have an eDMA module at all. Looking again at their datasheets, the CTARE register (which is specific to XSPI functionality) seems to be documented, so switch them to XSPI mode instead. Fixes: 0feaf8f5afe0 ("spi: spi-fsl-dspi: Convert the instantiations that support it to DMA") Reported-by: Qiang Zhao <qiang.zhao@nxp.com> Tested-by: Qiang Zhao <qiang.zhao@nxp.com> Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Link: https://lore.kernel.org/r/20200910121532.1138596-1-olteanv@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-14spi: spi-geni-qcom: Don't program CS_TOGGLE again and againDouglas Anderson
We always toggle the chip select manually in spi-geni-qcom so that we can properly implement the Linux API. There's no reason to program this to the hardware on every transfer. Program it once at init and be done with it. This saves some part of a microsecond of overhead on each transfer. While not really noticeable on any real world benchmarks, we might as well save the time. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20200912140730.2.I33e571179986850b4ec17042e813d0b08fb1b9c1@changeid Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-14spi: spi-geni-qcom: Use the FIFO even moreDouglas Anderson
In commit 902481a78ee4 ("spi: spi-geni-qcom: Actually use our FIFO") I explained that the maximum size we could program the FIFO was "mas->tx_fifo_depth - 3" but that I chose "mas->tx_fifo_depth()" because I was worried about decreased bandwidth. Since that time: * All the interconnect patches have landed, making things run at the proper speed. * I've done more measurements. This lets me confirm that there's really no downside of using the FIFO more. Specifically I did "flashrom -p ec -r /tmp/foo.bin" on a Chromebook and averaged over several runs. Before: It took 6.66 seconds and 59669 interrupts fired. After: It took 6.66 seconds and 47992 interrupts fired. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20200912140730.1.Ie67fa32009b94702d56232c064f1d89065ee8836@changeid Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-14spi: spi-qcom-qspi: replace spin_lock_irqsave by spin_lock in hard IRQBarry Song
It is redundant to do irqsave and irqrestore in hardIRQ context. Cc: Andy Gross <agross@kernel.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Barry Song <song.bao.hua@hisilicon.com> Link: https://lore.kernel.org/r/20200910100246.32696-1-song.bao.hua@hisilicon.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-14spi: bcm-qspi: Clean up 7425, 7429, and 7435 settingsRay Jui
The Broadcom QSPI driver now falls back to no MSPI_DEV support as the default setting in the generic compatible string, explicit settings for STB chips 7425, 7429, and 7435 can be removed. Signed-off-by: Ray Jui <ray.jui@broadcom.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20200910152539.45584-4-ray.jui@broadcom.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-14spi: bcm-qspi: Fix probe regression on iProc platformsRay Jui
iProc chips have QSPI controller that does not have the MSPI_REV offset. Reading from that offset will cause a bus error. Fix it by having MSPI_REV query disabled in the generic compatible string. Fixes: 3a01f04d74ef ("spi: bcm-qspi: Handle lack of MSPI_REV offset") Link: https://lore.kernel.org/linux-arm-kernel/20200909211857.4144718-1-f.fainelli@gmail.com/T/#u Signed-off-by: Ray Jui <ray.jui@broadcom.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20200910152539.45584-3-ray.jui@broadcom.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-14spi: bcm-qspi: Add compatible string for BRCMSTB 7445 SoCsRay Jui
Add compatible string for BRCMSTB 7445 SoCs and indicate it has MSPI rev support. Signed-off-by: Ray Jui <ray.jui@broadcom.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20200910152539.45584-2-ray.jui@broadcom.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-14spi: qup: remove redundant assignment to variable retColin Ian King
The variable ret is being initialized with a value that is never read and it is being updated later with a new value. The initialization is redundant and can be removed. Addresses-Coverity: ("Unused value") Signed-off-by: Colin Ian King <colin.king@canonical.com> Link: https://lore.kernel.org/r/20200910150410.750959-1-colin.king@canonical.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-09Merge series "opp: Unconditionally call dev_pm_opp_of_remove_table()" from ↵Mark Brown
Viresh Kumar <viresh.kumar@linaro.org>: Hello, This cleans up some of the user code around calls to dev_pm_opp_of_remove_table(). All the patches can be picked by respective maintainers directly except for the last patch, which needs the previous two to get merged first. These are based for 5.9-rc1. Rajendra, Since most of these changes are related to qcom stuff, it would be great if you can give them a try. I wasn't able to test them due to lack of hardware. Ulf, I had to revise the sdhci patch, sorry about that. Please pick this one. Diff between V1 and V2 is mentioned in each of the patches separately. Viresh Kumar (8): cpufreq: imx6q: Unconditionally call dev_pm_opp_of_remove_table() drm/lima: Unconditionally call dev_pm_opp_of_remove_table() drm/msm: Unconditionally call dev_pm_opp_of_remove_table() mmc: sdhci-msm: Unconditionally call dev_pm_opp_of_remove_table() spi: spi-geni-qcom: Unconditionally call dev_pm_opp_of_remove_table() spi: spi-qcom-qspi: Unconditionally call dev_pm_opp_of_remove_table() tty: serial: qcom_geni_serial: Unconditionally call dev_pm_opp_of_remove_table() qcom-geni-se: remove has_opp_table drivers/cpufreq/imx6q-cpufreq.c | 10 ++-------- drivers/gpu/drm/lima/lima_devfreq.c | 6 +----- drivers/gpu/drm/lima/lima_devfreq.h | 1 - drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 14 +++++--------- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 1 - drivers/gpu/drm/msm/dsi/dsi_host.c | 8 ++------ drivers/mmc/host/sdhci-msm.c | 14 +++++--------- drivers/spi/spi-geni-qcom.c | 13 +++++-------- drivers/spi/spi-qcom-qspi.c | 15 ++++++--------- drivers/tty/serial/qcom_geni_serial.c | 13 +++++-------- include/linux/qcom-geni-se.h | 2 -- 11 files changed, 31 insertions(+), 66 deletions(-) base-commit: f4d51dffc6c01a9e94650d95ce0104964f8ae822 -- 2.25.0.rc1.19.g042ed3e048af
2020-09-09spi: spidev: Remove redundant initialization of variable statusJay Fang
In spidev_read() and spidev_write(), the variable status is being initialized with a value that is never read and it is being updated later with a new value. The initialization is redundant and can be removed. Signed-off-by: Jay Fang <f.fangjian@huawei.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/1599631704-53232-1-git-send-email-f.fangjian@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-09spi: spi-qcom-qspi: Unconditionally call dev_pm_opp_of_remove_table()Viresh Kumar
dev_pm_opp_of_remove_table() doesn't report any errors when it fails to find the OPP table with error -ENODEV (i.e. OPP table not present for the device). And we can call dev_pm_opp_of_remove_table() unconditionally here. While at it, create a new label and put clkname on errors. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Link: https://lore.kernel.org/r/b77aa0bbe82a580508e321a34da488b4b27966d0.1598594714.git.viresh.kumar@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-09spi: spi-geni-qcom: Unconditionally call dev_pm_opp_of_remove_table()Viresh Kumar
dev_pm_opp_of_remove_table() doesn't report any errors when it fails to find the OPP table with error -ENODEV (i.e. OPP table not present for the device). And we can call dev_pm_opp_of_remove_table() unconditionally here. While at it, create a new label and put clkname on errors. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Link: https://lore.kernel.org/r/ea0864d41277e61fa31d304fbd4cf9af6b314269.1598594714.git.viresh.kumar@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-08Merge series "spi: Adding support for Microchip Sparx5 SoC" from Lars ↵Mark Brown
Povlsen <lars.povlsen@microchip.com>: The series add support for the Sparx5 SoC SPI controller in the spi-dw-mmio.c spi driver. v5 changes: - rx-sample-delay-ns documentation changes from Rob Herring: - Drop superfluous type $ref - Add default value = 0 v4 changes: - Changed snps,rx-sample-delay-ns to snps,rx-sample-delay-ns suggested by Rob Herring (rockchip also has this property). - Added support for controller-level rx-sample-delay-ns value as well as per SPI slave value (rockchip has controller-level property). - Dropped internal mux in favor of suggested spi-mux to control bus inteface selection. v3 changes: - Added mux support for controlling SPI bus interface. This is new mux driver, bindings and added to sparx5 base DT. - Removed "microchip,spi-interface2" property in favour of "mux-controls" property in SPI controller (sparx5 only). - Changed dw_spi_sparx5_set_cs() to use the mux control instead of directly acessing "mux" register. Associated code/defines moved to mux driver. - Changed dw_spi_sparx5_set_cs() to match other similar functions in signature and avoid explicit CS toggling. - Spun off duplicated NAND device DT chunks into separate DT file. v2 changes: - Moved all RX sample delay into spi-dw-core.c, using the "snps,rx-sample-delay-ns" device property. - Integrated Sparx5 support directly in spi-dw-mmio.c - Changed SPI2 configuration to per-slave "microchip,spi-interface2" property. - Added bindings to existing snps,dw-apb-ssi.yaml file - Dropped patches for polled mode and SPI memory operations. Lars Povlsen (6): spi: dw: Add support for RX sample delay register spi: dw: Add Microchip Sparx5 support arm64: dts: sparx5: Add SPI controller and associated mmio-mux dt-bindings: snps,dw-apb-ssi: Add sparx5 support, plus rx-sample-delay-ns property arm64: dts: sparx5: Add spi-nor support arm64: dts: sparx5: Add spi-nand devices .../bindings/spi/snps,dw-apb-ssi.yaml | 21 ++++++ arch/arm64/boot/dts/microchip/sparx5.dtsi | 47 ++++++++++++- .../arm64/boot/dts/microchip/sparx5_nand.dtsi | 31 ++++++++ .../boot/dts/microchip/sparx5_pcb125.dts | 30 ++++++++ .../boot/dts/microchip/sparx5_pcb134.dts | 1 + .../dts/microchip/sparx5_pcb134_board.dtsi | 16 +++++ .../boot/dts/microchip/sparx5_pcb135.dts | 1 + .../dts/microchip/sparx5_pcb135_board.dtsi | 16 +++++ drivers/spi/spi-dw-core.c | 26 +++++++ drivers/spi/spi-dw-mmio.c | 70 ++++++++++++++++++- drivers/spi/spi-dw.h | 3 + 11 files changed, 260 insertions(+), 2 deletions(-) create mode 100644 arch/arm64/boot/dts/microchip/sparx5_nand.dtsi -- 2.27.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
2020-09-08spi: spi-mtk-nor: support standard spi propertiesIkjoon Jang
Use default supports_op() to support spi-[rt]x-bus-width properties. And check dummy op's byte length instead of its bus width for output. Signed-off-by: Ikjoon Jang <ikjn@chromium.org> Link: https://lore.kernel.org/r/20200826091852.519138-1-ikjn@chromium.org Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-08spi: tegra20: Simplify with dev_err_probe()Krzysztof Kozlowski
Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and the error value gets printed. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200901152713.18629-11-krzk@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-08spi: tegra114: Simplify with dev_err_probe()Krzysztof Kozlowski
Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and the error value gets printed. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200901152713.18629-10-krzk@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-08spi: synquacer: Simplify with dev_err_probe()Krzysztof Kozlowski
Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and the error value gets printed. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200901152713.18629-9-krzk@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-08spi: stm32: Simplify with dev_err_probe()Krzysztof Kozlowski
Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and the error value gets printed. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200901152713.18629-8-krzk@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-08spi: qcom-qspi: Simplify with dev_err_probe()Krzysztof Kozlowski
Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and the error value gets printed. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200901152713.18629-7-krzk@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-08spi: spi-mux: Simplify with dev_err_probe()Krzysztof Kozlowski
Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and the error value gets printed. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200901152713.18629-6-krzk@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-08spi: cadence-quadspi: Simplify with dev_err_probe()Krzysztof Kozlowski
Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and the error value gets printed. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200901152713.18629-5-krzk@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-08spi: bcm2835: Simplify with dev_err_probe()Krzysztof Kozlowski
Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and the error value gets printed. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20200901152713.18629-4-krzk@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-08spi: atmel: Simplify with dev_err_probe()Krzysztof Kozlowski
Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and the error value gets printed. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20200901152713.18629-3-krzk@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-08spi: sprd: Release DMA channel also on probe deferralKrzysztof Kozlowski
If dma_request_chan() for TX channel fails with EPROBE_DEFER, the RX channel would not be released and on next re-probe it would be requested second time. Fixes: 386119bc7be9 ("spi: sprd: spi: sprd: Add DMA mode support") Cc: <stable@vger.kernel.org> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Chunyan Zhang <zhang.lyra@gmail.com> Link: https://lore.kernel.org/r/20200901152713.18629-1-krzk@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-08spi: dw: Add Microchip Sparx5 supportLars Povlsen
This adds SPI support for the Sparx5 SoC, which is using the MMIO Designware SPI controller. The Sparx5 differs from the Ocelot version in these areas: * The CS override is controlled by a new set of registers for this purpose. * The Sparx5 SPI controller has the RX sample delay register, and it must be configured for the (SPI NAND) device on SPI2. * The Sparx5 SPI controller has 2 different SPI bus interfaces on the same controller (don't ask...). The "spi-mux" driver should be used in conjunction with the SPI driver to select the appropriate bus. Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> Link: https://lore.kernel.org/r/20200824203010.2033-3-lars.povlsen@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-08spi: dw: Add support for RX sample delay registerLars Povlsen
This add support for the RX_SAMPLE_DLY register. If enabled in the Designware IP, it allows tuning of the rx data signal by means of an internal rx sample fifo. The register is controlled by the rx-sample-delay-ns DT property, which is defined per SPI slave as well on controller level. The controller level rx-sample-delay-ns will apply to all slaves without the property explicitly defined. The register is located at offset 0xf0, and if the option is not enabled in the IP, changing the register will have no effect. The register will only be written if any slave defines a nonzero value (after scaling by the clock period). Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> Link: https://lore.kernel.org/r/20200824203010.2033-2-lars.povlsen@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-07spi: qup: Allow for compile-testing on !ARMAlex Dewar
There seems no reason to restrict testing to ARM, so remove this constraint to improve test coverage. Build-tested with allyesconfig on x86. Signed-off-by: Alex Dewar <alex.dewar90@gmail.com> Link: https://lore.kernel.org/r/20200904163709.110975-1-alex.dewar90@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-09-06Merge tag 'iommu-fixes-v5.9-rc3' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu Pull iommu fixes from Joerg Roedel: - three Intel VT-d fixes to fix address handling on 32bit, fix a NULL pointer dereference bug and serialize a hardware register access as required by the VT-d spec. - two patches for AMD IOMMU to force AMD GPUs into translation mode when memory encryption is active and disallow using IOMMUv2 functionality. This makes the AMDGPU driver work when memory encryption is active. - two more fixes for AMD IOMMU to fix updating the Interrupt Remapping Table Entries. - MAINTAINERS file update for the Qualcom IOMMU driver. * tag 'iommu-fixes-v5.9-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: iommu/vt-d: Handle 36bit addressing for x86-32 iommu/amd: Do not use IOMMUv2 functionality when SME is active iommu/amd: Do not force direct mapping when SME is active iommu/amd: Use cmpxchg_double() when updating 128-bit IRTE iommu/amd: Restore IRTE.RemapEn bit after programming IRTE iommu/vt-d: Fix NULL pointer dereference in dev_iommu_priv_set() iommu/vt-d: Serialize IOMMU GCMD register modifications MAINTAINERS: Update QUALCOMM IOMMU after Arm SMMU drivers move
2020-09-06Merge tag 'for-linus-5.9-rc4-tag' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip Pull xen updates from Juergen Gross: "A small series for fixing a problem with Xen PVH guests when running as backends (e.g. as dom0). Mapping other guests' memory is now working via ZONE_DEVICE, thus not requiring to abuse the memory hotplug functionality for that purpose" * tag 'for-linus-5.9-rc4-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip: xen: add helpers to allocate unpopulated memory memremap: rename MEMORY_DEVICE_DEVDAX to MEMORY_DEVICE_GENERIC xen/balloon: add header guard
2020-09-05Merge tags 'auxdisplay-for-linus-v5.9-rc4', ↵Linus Torvalds
'clang-format-for-linus-v5.9-rc4' and 'compiler-attributes-for-linus-v5.9-rc4' of git://github.com/ojeda/linux Pull misc fixes from Miguel Ojeda: "A trivial patch for auxdisplay: - Replace HTTP links with HTTPS ones (Alexander A. Klimov) The usual clang-format trivial update: - Update with the latest for_each macro list (Miguel Ojeda) And Luc requested me to pick a sparse fix on my queue, so here it goes along with other two trivial Compiler Attributes ones (also from Luc). - sparse: use static inline for __chk_{user,io}_ptr() (Luc Van Oostenryck) - Compiler Attributes: fix comment concerning GCC 4.6 (Luc Van Oostenryck) - Compiler Attributes: remove comment about sparse not supporting __has_attribute (Luc Van Oostenryck)" * tag 'auxdisplay-for-linus-v5.9-rc4' of git://github.com/ojeda/linux: auxdisplay: Replace HTTP links with HTTPS ones * tag 'clang-format-for-linus-v5.9-rc4' of git://github.com/ojeda/linux: clang-format: Update with the latest for_each macro list * tag 'compiler-attributes-for-linus-v5.9-rc4' of git://github.com/ojeda/linux: sparse: use static inline for __chk_{user,io}_ptr() Compiler Attributes: fix comment concerning GCC 4.6 Compiler Attributes: remove comment about sparse not supporting __has_attribute
2020-09-04Merge tag 'pm-5.9-rc4' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm Pull power management fixes from Rafael Wysocki: "These fix reference counting in the operating performance points (OPP) framework and address a few intel_pstate driver issues, mostly related to switching driver operation modes and similar with hardware-managed P-states (HWP) enabled. Specifics: - Fix reference counting of operating performance points (OPP) tables (Viresh Kumar). - Address intel_pstate driver interface issues, mostly related to switching operation modes and handling CPU offline and online and system-wide suspend/resume with hardware-managed P-states (HWP) enabled (Rafael Wysocki). - Fix the maximum frequency computation in the intel_pstate driver with turbo P-states disabled by the platform firmware and HWP enabled (Francisco Jerez)" * tag 'pm-5.9-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: cpufreq: intel_pstate: Fix intel_pstate_get_hwp_max() for turbo disabled cpufreq: intel_pstate: Free memory only when turning off cpufreq: intel_pstate: Add ->offline and ->online callbacks cpufreq: intel_pstate: Tweak the EPP sysfs interface cpufreq: intel_pstate: Update cached EPP in the active mode cpufreq: intel_pstate: Refuse to turn off with HWP enabled opp: Don't drop reference for an OPP table that was never parsed
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-24 13:38:52 +0000