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path: root/drivers/usb/dwc3
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2020-07-09usb: dwc3: pci: add support for the Intel Jasper LakeHeikki Krogerus
This patch adds the necessary PCI ID for Intel Jasper Lake devices. Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-07-09usb: dwc3: pci: add support for the Intel Tiger Lake PCH -H variantHeikki Krogerus
This patch adds the necessary PCI ID for TGP-H devices. Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-06-24Revert "usb: dwc3: exynos: Add support for Exynos5422 suspend clk"Anand Moon
This reverts commit 07f6842341abe978e6375078f84506ec3280ece5. Since SCLK_SCLK_USBD300 suspend clock need to be configured for phy module, I wrongly mapped this clock to DWC3 code. Cc: Felipe Balbi <balbi@kernel.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Anand Moon <linux.amoon@gmail.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-06-24usb: dwc3: pci: Fix reference count leak in dwc3_pci_resume_workAditya Pakki
dwc3_pci_resume_work() calls pm_runtime_get_sync() that increments the reference counter. In case of failure, decrement the reference before returning. Signed-off-by: Aditya Pakki <pakki001@umn.edu> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-05-29usb: dwc3: meson-g12a: fix USB2 PHY initialization on G12A and A1 SoCsMartin Blumenstingl
dwc3_meson_g12a_usb2_init_phy() crashes with NULL pointer on an SM1 board (which uses the same USB setup as G12A) dereference as reported by the Kernel CI bot. This is because of the following call flow: dwc3_meson_g12a_probe priv->drvdata->setup_regmaps dwc3_meson_g12a_setup_regmaps priv->usb2_ports is still 0 so priv->u2p_regmap[i] will be NULL dwc3_meson_g12a_get_phys initializes priv->usb2_ports priv->drvdata->usb_init dwc3_meson_g12a_usb_init dwc3_meson_g12a_usb_init_glue dwc3_meson_g12a_usb2_init priv->drvdata->usb2_init_phy dwc3_meson_g12a_usb2_init_phy dereferences priv->u2p_regmap[i] Call priv->drvdata->setup_regmaps only after dwc3_meson_g12a_get_phys so priv->usb2_ports is initialized and the regmaps will be set up correctly. This fixes the NULL dereference later on. Fixes: 013af227f58a97 ("usb: dwc3: meson-g12a: handle the phy and glue registers separately") Reported-by: "kernelci.org bot" <bot@kernelci.org> Acked-by: Felipe Balbi <balbi@kernel.org> Acked-by: Neil Armstrong <narmstron@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Link: https://lore.kernel.org/r/20200526202943.715220-3-martin.blumenstingl@googlemail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-05-29usb: dwc3: meson-g12a: fix error path when fetching the reset line failsMartin Blumenstingl
Disable and unprepare the clocks when devm_reset_control_get_shared() fails. This fixes the error path as this must disable the clocks which were previously enabled. Fixes: 1e355f21d3fb96 ("usb: dwc3: Add Amlogic A1 DWC3 glue") Cc: Yue Wang <yue.wang@amlogic.com> Cc: Hanjie Lin <hanjie.lin@amlogic.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Link: https://lore.kernel.org/r/20200526202943.715220-2-martin.blumenstingl@googlemail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-05-25Merge tag 'usb-for-v5.8' of ↵Greg Kroah-Hartman
git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next Felipe writes: USB: changes for v5.8 merge window Rather busy cycle. We have a total 99 non-merge commits going into v5.8 merge window. The majority of the changes are in dwc3 this around (31.7% of all changes). It's composed mostly Thinh's recent updates to get dwc3 to behave correctly with stream transfers. We have also have Roger's for Keystone platforms and Neil's updates for the meson glue layer. Apart from those, we have the usual set of non-critical fixes, new device IDs, spelling fixes all over the place. Signed-off-by: Felipe Balbi <balbi@kernel.org> * tag 'usb-for-v5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb: (99 commits) usb: dwc3: keystone: Turn on USB3 PHY before controller dt-bindings: usb: ti,keystone-dwc3.yaml: Add USB3.0 PHY property dt-bindings: usb: convert keystone-usb.txt to YAML usb: dwc3: gadget: Check for prepared TRBs usb: gadget: Fix issue with config_ep_by_speed function usb: cdns3: ep0: delete the redundant status stage usb: dwc2: Update Core Reset programming flow. usb: gadget: fsl: Fix a wrong judgment in fsl_udc_probe() usb: gadget: fix potential double-free in m66592_probe. usb: cdns3: Fix runtime PM imbalance on error usb: gadget: lpc32xx_udc: don't dereference ep pointer before null check usb: dwc3: Increase timeout for CmdAct cleared by device controller USB: dummy-hcd: use configurable endpoint naming scheme usb: cdns3: gadget: assign interrupt number to USB gadget structure usb: gadget: core: sync interrupt before unbind the udc arm64: dts: qcom: sc7180: Add interconnect properties for USB arm64: dts: qcom: sdm845: Add interconnect properties for USB dt-bindings: usb: qcom,dwc3: Introduce interconnect properties for Qualcomm DWC3 driver ARM: dts: at91: Remove the USB EP child node dt-bindings: usb: atmel: Mark EP child node as deprecated ...
2020-05-25usb: dwc3: keystone: Turn on USB3 PHY before controllerRoger Quadros
The Local Power Sleep Controller (LPSC) dependency on AM65 requires SERDES0 to be powered on before USB. We need to power up SERDES0 power domain and hold it on throughout the reset, init, power on sequence. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-05-25usb: dwc3: gadget: Check for prepared TRBsThinh Nguyen
There are cases where the endpoint needs to be restarted. For example, it may need to restart for NoStream rejection to reinitiate stream. If so, check and make sure we don't prepare beyond the current transfer when we restart the endpoint. DWC_usb32 internal burst transfer feature will look into TRBs beyond a transfer. Other controllers will stop on the last TRB, but not DWC_usb32. This may cause the controller to incorrectly process TRBs of a different transfer. Make sure to explicitly prevent preparing TRBs of a different transfer. This should only affect DWC_usb32 releases prior to v1.00a since it doesn't use SET_ENDPOINT_PRIME to reinitiate stream. However, it's better to be cautious in case users don't want to use SET_ENDPOINT_PRIME command. Also, it's possible other controller IPs may share the same features as DWC_usb32 in new releases. Signed-off-by: Thinh Nguyen <thinhn@synopsys.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-05-25usb: dwc3: Increase timeout for CmdAct cleared by device controllerYu Chen
If the SS PHY is in P3, there is no pipe_clk, HW may use suspend_clk for function, as suspend_clk is slow so EP command need more time to complete, e.g, imx8M suspend_clk is 32K, set ep configuration will take about 380us per below trace time stamp(44.286278 - 44.285897 = 0.000381): configfs_acm.sh-822 [000] d..1 44.285896: dwc3_writel: addr 000000006d59aae1 value 00000401 configfs_acm.sh-822 [000] d..1 44.285897: dwc3_readl: addr 000000006d59aae1 value 00000401 ... ... configfs_acm.sh-822 [000] d..1 44.286278: dwc3_readl: addr 000000006d59aae1 value 00000001 configfs_acm.sh-822 [000] d..1 44.286279: dwc3_gadget_ep_cmd: ep0out: cmd 'Set Endpoint Configuration' [401] params 00001000 00000500 00000000 --> status: Successful This was originally found on Hisilicon Kirin Soc that need more time for the device controller to clear the CmdAct of DEPCMD. Signed-off-by: Yu Chen <chenyu56@huawei.com> Signed-off-by: John Stultz <john.stultz@linaro.org> Signed-off-by: Li Jun <jun.li@nxp.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-05-25usb: dwc3: gadget: Use SET_EP_PRIME for NoStreamThinh Nguyen
DWC_usb32 v1.00a and later can use SET_EP_PRIME command to reinitiate a stream. Use the command to handle NoStream rejection instead of ending and restarting the endpoint. Signed-off-by: Thinh Nguyen <thinhn@synopsys.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-05-25usb: dwc3: gadget: Handle stream transfersThinh Nguyen
Overview of stream transfer requirement: * A transfer will have a set of TRBs of the same stream ID. * A transfer is started with a stream ID in START_TRANSFER command. * A new stream will only start when the previous completes. Overview of stream events: * A "prime" from host indicates that its endpoints are active (buffers prepared and ready to receive/transmit data). The controller automatically initiates stream if it sees this. * A "NoStream" rejection event indicates that the host isn't ready. Host will put the endpoint back to idle state. Device may need to reinitiate the stream to start transfer again. * A Stream Found event means host accepted device initiated stream. Nothing needs to be done from driver. To initiate a stream, the driver will issue START_TRANSFER command with a stream ID. To reinitiate the stream, the driver must issue END_TRANSFER and restart the transfer with START_TRANSFER command with the same stream ID. This implementation handles device-initated streams (e.g. UASP driver). It also handles some hosts' quirky behavior where they only prime each endpoint once. Signed-off-by: Thinh Nguyen <thinhn@synopsys.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-05-25usb: dwc3: gadget: Don't prepare beyond a transferThinh Nguyen
Don't prepare TRBs beyond a transfer. In DWC_usb32, its transfer burst capability may try to read and use TRBs beyond the active transfer. For other controllers, they don't process the next transfer TRBs until the current transfer is completed. Explicitly prevent preparing TRBs ahead for all controllers. Signed-off-by: Thinh Nguyen <thinhn@synopsys.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-05-25usb: dwc3: gadget: Wait for transfer completionThinh Nguyen
If a transfer is in-progress, any new request should not kick off another transfer. The driver needs to wait for the current transfer to complete before starting off the next transfer. Introduce a new flag DWC3_EP_WAIT_TRANSFER_COMPLETE for this. Signed-off-by: Thinh Nguyen <thinhn@synopsys.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-05-25usb: dwc3: gadget: Handle XferComplete for streamsThinh Nguyen
In DWC3, to prepare TRBs for streams, all the TRBs of a transfer will use the same stream ID. To start a new stream, the driver needs to wait for the current transfer to complete or ended (by END_TRANFER command). As a result, inform the controller of the last TRB of a transfer so that it knows when a transfer completes and start a new transfer of a new stream. Even though the transfer completion handling can be applied for other non-isoc endpoints, only do it for streams due to its requirement. It's better to keep the controller's TRB cache full than waiting for transfer completion and starting a new transfer. Signed-off-by: Thinh Nguyen <thinhn@synopsys.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-05-25usb: dwc3: gadget: Enable XferComplete eventThinh Nguyen
To switch from one stream to another, this requires the driver to start a new transfer with a specific stream ID. For a transfer to complete, the driver needs to indicate the last TRB of a transfer, and it needs to enable XferComplete event to handle completed TRBs of a transfer. Let's enable this event only for stream capable endpoints. Signed-off-by: Thinh Nguyen <thinhn@synopsys.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-05-25usb: dwc3: gadget: Refactor TRB completion handlerThinh Nguyen
To prepare for handling of XferComplete event, let's refactor and split up dwc3_gadget_endpoint_transfer_in_progress() to handle TRBs completion for different events. The handling of TRBs completion will be the same, but the status of XferComplete event is different than XferInProgress. No functional change in this commit. Signed-off-by: Thinh Nguyen <thinhn@synopsys.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-05-25usb: dwc3: gadget: Check for in-progress END_TRANSFERThinh Nguyen
While handling TRBs completion, if a END_TRANSFER command isn't completed, don't kick new transfer or issue END_TRANSFER command. Signed-off-by: Thinh Nguyen <thinhn@synopsys.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-05-25usb: dwc3: Get MDWIDTH for DWC_usb32Thinh Nguyen
DWC_usb32 supports MDWIDTH value larger than 255 and up to 1023. The field HWPARAMS6[9:8] stores the upper 2-bit values of the DWC_usb32's MDWIDTH. Check that parameter and properly get the MDWIDTH for DWC_usb32. Signed-off-by: Thinh Nguyen <thinhn@synopsys.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-05-25usb: dwc3: Add support for DWC_usb32 IPThinh Nguyen
Synopsys introduces a new controller DWC_usb32. It supports dual-lane and speed up to 20 Gbps, and the DWC3 driver will drive this controller. Currently the driver uses a single field dwc->revision to ID both DWC_usb3 and DWC_usb31 and their version number. This was sufficient for two IPs, but this method doesn't work with additional IPs. As a result, let's separate the dwc->revision field to 2 separate fields: ip and revision. The ip field now stores the ID of the controller's IP while the revision field stores the controller's version number. This new scheme enforces DWC3 to compare the revision within the same IP only. As a result, we must update all the revision check of the controller to check its corresponding IP. To help with this enforcement, we create a few macros to help with the common version checks: DWC3_IP_IS(IP) DWC3_VER_IS(IP, VERSION) DWC3_VER_IS_PRIOR(IP, VERSION) DWC3_VER_IS_WITHIN(IP, LOWER_VERSION, UPPER_VERSION) DWC3_VER_TYPE_IS_WITHIN(IP, VERSION, LOWER_VERSION_TYPE, UPPER_VERSION_TYPE) The DWC_usb32 controller operates using the same programming model and with very similar configurations as its previous controllers. Please note that the various IP and revision checks in this patch match the current checks for DWC_usb31 version 1.90a. Additional configurations that are unique to DWC_usb32 are applied separately. Signed-off-by: Thinh Nguyen <thinhn@synopsys.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-05-25usb: dwc3: use true,false for dwc->otg_restart_hostJason Yan
Fix the following coccicheck warning: drivers/usb/dwc3/drd.c:85:3-24: WARNING: Assignment of 0/1 to bool variable drivers/usb/dwc3/drd.c:59:2-23: WARNING: Assignment of 0/1 to bool variable Signed-off-by: Jason Yan <yanaijie@huawei.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-05-25usb: dwc3: of-simple: remove Amlogic GXL and AXG compatiblesMartin Blumenstingl
There is now a dedicated driver for these SoCs making the old compatible obsolete. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-05-25usb: dwc3: meson-g12a: add support for GXL and GXM SoCsNeil Armstrong
In order to add support for the Amlogic GXL/GXM USB Glue, this adds the corresponding : - PHY names - clock names - USB2 PHY init and mode set - regmap setup Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-05-25usb: dwc3: meson-g12a: support the GXL/GXM DWC3 host phy disconnectNeil Armstrong
On the Amlogic GXL/GXM SoCs, the OTG PHY status signals are always connected to the DWC3 controller, thus crashing the controller when switching to OTG mode when port is not populated with a device/cable to Host. Amlogic added a bit to disconnect the OTG PHY status signals from the DWC3 to be used when switching the OTG PHY as Device to the DWC2 controller. The drawback is that it makes the DWC3 port state machine stall and needs a full reset of the DWC3 controller to get connect status to the port connected to the OTG PHY, but not the other one. Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-05-25usb: dwc3: meson-g12a: refactor usb initNeil Armstrong
Refactor the USB init code patch to handle the Amlogic GXL/GXM needing to initialize the OTG port as Peripheral mode for the DWC2 IP to probe correctly. A secondary, post_init callback is added to setup the OTG PHY mode after powering up the PHYs and before probing the DWC2 and DWC3 controllers. Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-05-25usb: dwc3: gadget: Continue to process pending requestsThinh Nguyen
If there are still pending requests because no TRB was available, prepare more when started requests are completed. Introduce dwc3_gadget_ep_should_continue() to check for incomplete and pending requests to resume updating new TRBs to the controller's TRB cache. Signed-off-by: Thinh Nguyen <thinhn@synopsys.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-05-09usb: dwc3: select USB_ROLE_SWITCHArnd Bergmann
Calling into the role switch API requires that these functions are loaded, if they are in a loadable module and dwc3 itself is built-in, this produces a link error: drivers/usb/dwc3/drd.o: In function `dwc3_usb_role_switch_get': drd.c:(.text+0x26): undefined reference to `usb_role_switch_get_drvdata' drivers/usb/dwc3/drd.o: In function `dwc3_usb_role_switch_set': drd.c:(.text+0x97): undefined reference to `usb_role_switch_get_drvdata' drivers/usb/dwc3/drd.o: In function `dwc3_drd_init': drd.c:(.text+0x1ca7): undefined reference to `usb_role_switch_register' drivers/usb/dwc3/drd.o: In function `dwc3_drd_exit': drd.c:(.text+0x1e92): undefined reference to `usb_role_switch_unregister' Select the USB_ROLE_SWITCH symbol from dwc3 in that configuration. Fixes: 0339f7fbc82e ("usb: dwc3: fix up for role switch API change") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-05-09usb: dwc3: pci: Enable extcon driver for Intel MerrifieldAndy Shevchenko
Intel Merrifield provides a DR support via PMIC which has its own extcon driver. Add a property string to link to that driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-05-09dwc3: Remove check for HWO flag in dwc3_gadget_ep_reclaim_trb_sg()John Stultz
The check for the HWO flag in dwc3_gadget_ep_reclaim_trb_sg() causes us to break out of the loop before we call dwc3_gadget_ep_reclaim_completed_trb(), which is what likely should be clearing the HWO flag. This can cause odd behavior where we never reclaim all the trbs in the sg list, so we never call giveback on a usb req, and that will causes transfer stalls. This effectively resovles the adb stalls seen on HiKey960 after userland changes started only using AIO in adbd. Cc: YongQin Liu <yongqin.liu@linaro.org> Cc: Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com> Cc: Yang Fei <fei.yang@intel.com> Cc: Thinh Nguyen <thinhn@synopsys.com> Cc: Tejas Joglekar <tejas.joglekar@synopsys.com> Cc: Andrzej Pietrasiewicz <andrzej.p@collabora.com> Cc: Jack Pham <jackp@codeaurora.org> Cc: Josh Gao <jmgao@google.com> Cc: Todd Kjos <tkjos@google.com> Cc: Felipe Balbi <balbi@kernel.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: linux-usb@vger.kernel.org Cc: stable@vger.kernel.org #4.20+ Signed-off-by: John Stultz <john.stultz@linaro.org> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-05-05usb: dwc3: gadget: WARN on no-resource statusThinh Nguyen
If the driver issued START_TRANSFER and received a no-resource status, then generally there are a few reasons for this: 1) The driver did not allocate resource for the endpoint during power-on-reset initialization. 2) The transfer resource was reset. At this moment, we don't do this in the driver, but it occurs when the driver issues START_CONFIG cmd to ep0 with resource index=2. 3) The driver issues the START_TRANSFER command to an already started endpoint. Usually, this is because the END_TRANSFER command hasn't completed yet. Print out a warning to help debug this issue in the driver. Signed-off-by: Thinh Nguyen <thinhn@synopsys.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-05-05usb: dwc3: gadget: Issue END_TRANSFER to retry isoc transferThinh Nguyen
After a number of unsuccessful start isoc attempts due to bus-expiry status, issue END_TRANSFER command and retry on the next XferNotReady event. Signed-off-by: Thinh Nguyen <thinhn@synopsys.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-05-05usb: dwc3: gadget: Store resource index of start cmdThinh Nguyen
As long as the START_TRANSFER command completes, it provides the resource index of the endpoint. Use this when we need to issue END_TRANSFER command to an isoc endpoint to retry with a new XferNotReady event. Signed-off-by: Thinh Nguyen <thinhn@synopsys.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-05-05usb: dwc3: gadget: Properly handle failed kick_transferThinh Nguyen
If dwc3 fails to issue START_TRANSFER/UPDATE_TRANSFER command, then we should properly end an active transfer and give back all the started requests. However if it's for an isoc endpoint, the failure maybe due to bus-expiry status. In this case, don't give back the requests and wait for the next retry. Fixes: 72246da40f37 ("usb: Introduce DesignWare USB3 DRD Driver") Signed-off-by: Thinh Nguyen <thinhn@synopsys.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-05-05usb: dwc3: core: Use role-switch default dr_modeThinh Nguyen
If the driver is configured to use DRD role-switch, let the drd code path decide the default dr_mode. Signed-off-by: Thinh Nguyen <thinhn@synopsys.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-05-05usb: dwc3: drd: Don't free non-existing irqThinh Nguyen
If the driver is configured to use DRD role-switch, it's not OTG. There won't be OTG irq to free. Check for dwc->otg_irq before freeing it. Signed-off-by: Thinh Nguyen <thinhn@synopsys.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-05-05usb: dwc3: meson-g12a: refactor usb2 phy initNeil Armstrong
Refactor the USB2 PHY init code patch to handle the Amlogic GXL/GXM not having the PHY mode control registers in the Glue but in the PHY registers. The Amlogic GXL/GXM will call phy_set_mode() instead of programming the PHY mode control registers, thus add two new callbacks to the SoC match data. Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-05-05usb: dwc3: meson-g12a: check return of dwc3_meson_g12a_usb_initNeil Armstrong
The dwc3_meson_g12a_usb_init function can return an error, check it. Fixes: c99993376f72ca ("usb: dwc3: Add Amlogic G12A DWC3 glue") Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-05-05usb: dwc3: meson-g12a: get the reset as sharedNeil Armstrong
In order to support the Amlogic GXL/GXM SoCs, the reset line must be handled as shared since also used by the PHYs. Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-05-05usb: dwc3: meson-g12a: handle the phy and glue registers separatelyNeil Armstrong
On the Amlogic GXL/GXM SoCs, only the USB control registers are available, the PHY mode being handled in the PHY registers. Thus, handle the PHY mode registers in separate regmaps and prepare support for Amlogic GXL/GXM SoCs by moving the regmap setup in a callback set in the SoC match data. Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-05-05usb: dwc3: meson-g12a: specify phy names in soc dataNeil Armstrong
To handle the variable USB2 PHY counts on GXL and GXM SoCs, add the possible PHY names for each SoC in the compatible match data. Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Acked-by: Hanjie Lin <hanjie.lin@amlogic.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-05-05usb: dwc3: gadget: Refactor dwc3_gadget_ep_dequeueThinh Nguyen
The flow from function dwc3_gadget_ep_dequeue() is not easy to follow. Refactor it for easier read. No functional change in this commit. Signed-off-by: Thinh Nguyen <thinhn@synopsys.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-05-05usb: dwc3: gadget: Remove unnecessary checksThinh Nguyen
Remove 2 unnecessary checks: 1) A request in the started_list must have its trb field set. So checking for req->trb is unnecessary. 2) An endpoint must have started (and have not ended) for the request to still be in the started_list. There's no point to check if the endpoint is started. We had this check because previously the driver didn't handle the endpoint's started/ended flags for END_TRANSFER command properly. See commit 9f45581f5eec ("usb: dwc3: gadget: early giveback if End Transfer already completed"). Signed-off-by: Thinh Nguyen <thinhn@synopsys.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-05-05usb: dwc3: gadget: Give back staled requestsThinh Nguyen
If a request is dequeued, the transfer is cancelled. Give back all the started requests. In most scenarios, the function driver dequeues all requests of a transfer when there's a failure. If the function driver follows this, then it's fine. If not, then we'd be skipping TRBs at different points within the dequeue and enqueue pointers, making dequeue/enqueue pointers useless. To enforce and make sure that we're properly skipping TRBs, cancel all the started requests and give back all the cancelled requests to the function drivers. Signed-off-by: Thinh Nguyen <thinhn@synopsys.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-05-05usb: dwc3: gadget: Properly handle ClearFeature(halt)Thinh Nguyen
DWC3 must not issue CLEAR_STALL command to control endpoints. The controller automatically clears the STALL when it receives the SETUP token. Also, when the driver receives ClearFeature(halt_ep), DWC3 must stop any active transfer from the endpoint and give back all the requests to the function drivers. Fixes: 72246da40f37 ("usb: Introduce DesignWare USB3 DRD Driver") Signed-off-by: Thinh Nguyen <thinhn@synopsys.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-05-05usb: dwc3: support continuous runtime PM with dual roleMartin Kepplinger
The DRD module calls dwc3_set_mode() on role switches, i.e. when a device is being plugged in. In order to support continuous runtime power management when plugging in / unplugging a cable, we need to call pm_runtime_get_sync() in this path. Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-05-05USB: dwc3: Use the correct style for SPDX License IdentifierNishad Kamdar
This patch corrects the SPDX License Identifier style in header files related to DesignWare USB3 DRD Core Support. For C header files Documentation/process/license-rules.rst mandates C-like comments (opposed to C source files where C++ style should be used). Changes made by using a script provided by Joe Perches here: https://lkml.org/lkml/2019/2/7/46. Suggested-by: Joe Perches <joe@perches.com> Signed-off-by: Nishad Kamdar <nishadkamdar@gmail.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-04-17usb: dwc3: gadget: Fix request completion checkThinh Nguyen
A request may not be completed because not all the TRBs are prepared for it. This happens when we run out of available TRBs. When some TRBs are completed, the driver needs to prepare the rest of the TRBs for the request. The check dwc3_gadget_ep_request_completed() shouldn't be checking the amount of data received but rather the number of pending TRBs. Revise this request completion check. Cc: stable@vger.kernel.org Fixes: e0c42ce590fe ("usb: dwc3: gadget: simplify IOC handling") Signed-off-by: Thinh Nguyen <thinhn@synopsys.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-04-16usb: dwc3: gadget: Do link recovery for SS and SSPThinh Nguyen
The controller always supports link recovery for device in SS and SSP. Remove the speed limit check. Also, when the device is in RESUME or RESET state, it means the controller received the resume/reset request. The driver must send the link recovery to acknowledge the request. They are valid states for the driver to send link recovery. Fixes: 72246da40f37 ("usb: Introduce DesignWare USB3 DRD Driver") Fixes: ee5cd41c9117 ("usb: dwc3: Update speed checks for SuperSpeedPlus") Signed-off-by: Thinh Nguyen <thinhn@synopsys.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-04-16usb: dwc3: gadget: Properly set maxpacket limitThinh Nguyen
Currently the calculation of max packet size limit for IN endpoints is too restrictive. This prevents a matching of a capable hardware endpoint during configuration. Below is the minimum recommended HW configuration to support a particular endpoint setup from the databook: For OUT endpoints, the databook recommended the minimum RxFIFO size to be at least 3x MaxPacketSize + 3x setup packets size (8 bytes each) + clock crossing margin (16 bytes). For IN endpoints, the databook recommended the minimum TxFIFO size to be at least 3x MaxPacketSize for endpoints that support burst. If the endpoint doesn't support burst or when the device is operating in USB 2.0 mode, a minimum TxFIFO size of 2x MaxPacketSize is recommended. Base on these recommendations, we can calculate the MaxPacketSize limit of each endpoint. This patch revises the IN endpoint MaxPacketSize limit and also sets the MaxPacketSize limit for OUT endpoints. Reference: Databook 3.30a section 3.2.2 and 3.2.3 Signed-off-by: Thinh Nguyen <thinhn@synopsys.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-04-16usb: dwc3: Fix GTXFIFOSIZ.TXFDEP macro nameThinh Nguyen
Change the macro name DWC3_GTXFIFOSIZ_TXFDEF to DWC3_GTXFIFOSIZ_TXFDEP to match with the register name GTXFIFOSIZ.TXFDEP. Fixes: 457e84b6624b ("usb: dwc3: gadget: dynamically re-size TxFifos") Fixes: 0cab8d26d6e5 ("usb: dwc3: Update DWC_usb31 GTXFIFOSIZ reg fields") Signed-off-by: Thinh Nguyen <thinhn@synopsys.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>