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path: root/drivers/usb/chipidea
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2014-09-29usb: rename phy to usb_phy in HCDAntoine Tenart
The USB PHY member of the HCD structure is renamed to 'usb_phy' and modifications are done in all drivers accessing it. This is in preparation to adding the generic PHY support. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> [Sergei: added missing 'drivers/usb/misc/lvstest.c' file, resolved rejects, updated changelog.] Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Alan Stern <stern@rowland.harvard.edu> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-09-25usb: gadget: Refactor request completionMichal Sojka
Use the recently introduced usb_gadget_giveback_request() in favor of direct invocation of the completion routine. All places in drivers/usb/ matching "[-.]complete(" were replaced with a call to usb_gadget_giveback_request(). This was compile-tested with all ARM drivers enabled and runtime-tested for musb. Signed-off-by: Michal Sojka <sojka@merica.cz> Acked-by: Felipe Balbi <balbi@ti.com> Tested-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-09-23usb: chipidea: enhance kernel-doc formatPeter Chen
Some kernel-doc style comment are not satisfied for format, fix them. Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-09-23usb: chipidea: otg initialization is only needed when the gadget is supportedPeter Chen
We have only needed to enable otg initialization when both of below conditions are satisfied: - The controller is otg capable - The gadget function is enabled If the controller is otg capable, but is host-only configuration, we do not need to access register otgsc and do any otg operations (eg, create otg workqueue). Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-09-23chipidea: usbmisc_imx: Add USB support for VF610 SoCsStefan Agner
This adds Vybrid VF610 SoC support. The IP is very similar to i.MX6, however, the non-core registers are spread in two different register areas. Hence we support multiple instances of the USB misc driver and add the driver instance to the imx_usbmisc_data structure. Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-09-23usb: chipidea: add TPL support for targeted hostsPeter Chen
For OTG and Embedded hosts, they may need TPL (Targeted Peripheral List) for usb certification and other vender specific requirements, the platform can tell chipidea core driver if it supports tpl through DT or platform data. Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-09-10usb: chipidea: msm: Initialize PHY on reset eventIvan T. Ivanov
Initialize USB PHY after every Link controller reset Cc: 3.16+ <stable@vger.kernel.org> Cc: Tim Bird <tbird20d@gmail.com> Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-09-10usb: chipidea: msm: Use USB PHY API to control PHY stateIvan T. Ivanov
PHY drivers keep track of the current state of the hardware, so don't change PHY settings under it. Cc: 3.16+ <stable@vger.kernel.org> Cc: Tim Bird <tbird20d@gmail.com> Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-08-04Merge tag 'usb-3.17-rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb Pull USB updates from Greg KH: "Here is the big USB driver update for 3.17-rc1. Loads of gadget driver changes in here, including some big file movements to make things easier to manage over time. There's also the usual xhci and uas driver updates, and a handful of other changes in here. The changelog has the full details. All of these have been in linux-next for a while" * tag 'usb-3.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (211 commits) USB: devio: fix issue with log flooding uas: Log a warning when we cannot use uas because the hcd lacks streams uas: Only complain about missing sg if all other checks succeed xhci: Add missing checks for xhci_alloc_command failure xhci: Rename Asrock P67 pci product-id to EJ168 xhci: Blacklist using streams on the Etron EJ168 controller uas: Limit qdepth to 32 when connected over usb-2 uwb/whci: use correct structure type name in sizeof usb-core bInterval quirk USB: serial: ftdi_sio: Add support for new Xsens devices USB: serial: ftdi_sio: Annotate the current Xsens PID assignments usb: chipidea: debug: fix sparse non static symbol warnings usb: ci_hdrc_imx doc: fsl,usbphy is required usb: ci_hdrc_imx: Return -EINVAL for missing USB PHY usb: core: allow zero packet flag for interrupt urbs usb: lvstest: Fix sparse warnings generated by kbuild test bot USB: core: hcd-pci: free IRQ before disabling PCI device when shutting down phy: miphy365x: Represent each PHY channel as a DT subnode phy: miphy365x: Provide support for the MiPHY356x Generic PHY phy: miphy365x: Add Device Tree bindings for the MiPHY365x ...
2014-07-22usb: chipidea: debug: fix sparse non static symbol warningsWei Yongjun
Fixes the following sparse warnings: drivers/usb/chipidea/debug.c:211:5: warning: symbol 'ci_otg_show' was not declared. Should it be static? drivers/usb/chipidea/debug.c:334:5: warning: symbol 'ci_registers_show' was not declared. Should it be static? Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-07-22usb: ci_hdrc_imx: Return -EINVAL for missing USB PHYMarkus Pargmann
-ENODEV is interpreted by the generic driver probing function as a non-matching driver. This leads to a missing probe failure message. Also a missing USB PHY is more of an invalid configuration of the usb driver because it is necessary. This patch returns -EINVAL if devm_usb_get_phy_by_phandle() returned -ENODEV. Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-07-17usb: chipidea: udc: Disable auto ZLP generation on ep0Abbas Raza
There are 2 methods for ZLP (zero-length packet) generation: 1) In software 2) Automatic generation by device controller 1) is implemented in UDC driver and it attaches ZLP to IN packet if descriptor->size < wLength 2) can be enabled/disabled by setting ZLT bit in the QH When gadget ffs is connected to ubuntu host, the host sends get descriptor request and wLength in setup packet is 255 while the size of descriptor which will be sent by gadget in IN packet is 64 byte. So the composite driver sets req->zero = 1. In UDC driver following code will be executed then if (hwreq->req.zero && hwreq->req.length && (hwreq->req.length % hwep->ep.maxpacket == 0)) add_td_to_list(hwep, hwreq, 0); Case-A: So in case of ubuntu host, UDC driver will attach a ZLP to the IN packet. ubuntu host will request 255 byte in IN request, gadget will send 64 byte with ZLP and host will come to know that there is no more data. But hold on, by default ZLT=0 for endpoint 0 so hardware also tries to automatically generate the ZLP which blocks enumeration for ~6 seconds due to endpoint 0 STALL, NAKs are sent to host for any requests (OUT/PING) Case-B: In case when gadget ffs is connected to Apple device, Apple device sends setup packet with wLength=64. So descriptor->size = 64 and wLength=64 therefore req->zero = 0 and UDC driver will not attach any ZLP to the IN packet. Apple device requests 64 bytes, gets 64 bytes and doesn't further request for IN data. But ZLT=0 by default for endpoint 0 so hardware tries to automatically generate the ZLP which blocks enumeration for ~6 seconds due to endpoint 0 STALL, NAKs are sent to host for any requests (OUT/PING) According to USB2.0 specs: 8.5.3.2 Variable-length Data Stage A control pipe may have a variable-length data phase in which the host requests more data than is contained in the specified data structure. When all of the data structure is returned to the host, the function should indicate that the Data stage is ended by returning a packet that is shorter than the MaxPacketSize for the pipe. If the data structure is an exact multiple of wMaxPacketSize for the pipe, the function will return a zero-length packet to indicate the end of the Data stage. In Case-A mentioned above: If we disable software ZLP generation & ZLT=0 for endpoint 0 OR if software ZLP generation is not disabled but we set ZLT=1 for endpoint 0 then enumeration doesn't block for 6 seconds. In Case-B mentioned above: If we disable software ZLP generation & ZLT=0 for endpoint then enumeration still blocks due to ZLP automatically generated by hardware and host not needing it. But if we keep software ZLP generation enabled but we set ZLT=1 for endpoint 0 then enumeration doesn't block for 6 seconds. So the proper solution for this issue seems to disable automatic ZLP generation by hardware (i.e by setting ZLT=1 for endpoint 0) and let software (UDC driver) handle the ZLP generation based on req->zero field. Cc: stable@vger.kernel.org Signed-off-by: Abbas Raza <Abbas_Raza@mentor.com> Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-07-01usb: chipidea: udc: delete td from req's td list at ep_dequeuePeter Chen
We need to delete un-finished td from current request's td list at ep_dequeue API, otherwise, this non-user td will be remained at td list before this request is freed. So if we do ep_queue-> ep_dequeue->ep_queue sequence, when the complete interrupt for the second ep_queue comes, we search td list for this request, the first td (added by the first ep_queue) will be handled, and its status is still active, so we will consider the this transfer still not be completed, but in fact, it has completed. It causes the peripheral side considers it never receives current data for this transfer. We met this problem when do "Error Recovery Test - Device Configured" test item for USBCV2 MSC test, the host has never received ACK for the IN token for CSW due to peripheral considers it does not get this CBW, the USBCV test log like belows: -------------------------------------------------------------------------- INFO Issuing BOT MSC Reset, reset should always succeed INFO Retrieving status on CBW endpoint INFO CBW endpoint status = 0x0 INFO Retrieving status on CSW endpoint INFO CSW endpoint status = 0x0 INFO Issuing required command (Test Unit Ready) to verify device has recovered INFO Issuing CBW (attempt #1): INFO |----- CBW LUN = 0x0 INFO |----- CBW Flags = 0x0 INFO |----- CBW Data Transfer Length = 0x0 INFO |----- CBW CDB Length = 0x6 INFO |----- CBW CDB-00 = 0x0 INFO |----- CBW CDB-01 = 0x0 INFO |----- CBW CDB-02 = 0x0 INFO |----- CBW CDB-03 = 0x0 INFO |----- CBW CDB-04 = 0x0 INFO |----- CBW CDB-05 = 0x0 INFO Issuing CSW : try 1 INFO CSW Bulk Request timed out! ERROR Failed CSW phase : should have been success or stall FAIL (5.3.4) The CSW status value must be 0x00, 0x01, or 0x02. ERROR BOTCommonMSCRequest failed: error=80004000 Cc: Andrzej Pietrasiewicz <andrzej.p@samsung.com> Cc: stable@vger.kernel.org Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-05-23usb: chipidea: udc: update gadget states according to ch9Peter Chen
Update device states according to ch9 in USB 2.0 specification Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-05-23usb: chipidea: msm: Initialize offset of the capability registersIvan T. Ivanov
Since commit 62bb84e (usb: gadget: ci13xxx: convert to platform device) start address of the capability registers is not passed correctly to udc_probe(). Fix this. Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-05-23usb: chipidea: msm: Add device tree supportIvan T. Ivanov
Allows controller to be specified via device tree. Pass PHY phandle specified in DT to core driver. Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-05-23chipidea: usbmisc_imx: Allow USB OTG to work on mx51Fabio Estevam
The field PLLDIVVALUE of register PHY_CTRL_1 selects the reference clock source for the PHY: 00 = sysclock uses 19.2 MHz 01 = sysclock uses 24 MHz 10 = sysclock uses 26 MHz 11 = sysclock uses 27 MHz The reset value for this field is 10 according to the reference manual, and even though this reset value works for mx53, it does not work for mx51. So instead of relying on the reset value for the PLLDIVVALUE field, explicitly set it to 01 so that a 24MHz clock can be selected for the PHY and allowing both mx51 and mx53 to have USB OTG port functional. Succesfully tested 'g_ether' on a imx51-babbage and on a imx53-qsb boards. Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-05-23usb: chipidea: using one inline function to cover queue work operationsPeter Chen
The otg queue work include operations: one is disable interrupt, another one is call kernel queue work API. Many codes do this operation, using one inline function to instead of them. Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-05-23usb: chipidea: udc: delete useless codePeter Chen
Delete useless code Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-05-23usb: chipidea: update TODO listPeter Chen
Update TODO list Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-04-24usb: chipidea: debug: add debug file for OTG variablesLi Jun
This patch adds a debug file for OTG vairables show. Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Li Jun <b47624@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-04-24usb: chipidea: add sys inputs for OTG fsm inputLi Jun
This patch adds sys input to control and show OTG fsm inputs by application, user can do host and preipheral role switch by change these inputs. Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Li Jun <b47624@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-04-24usb: chipidea: OTG HNP and SRP fsm implementationLi Jun
USB OTG interrupt handling and fsm transitions according to USB OTG and EH 2.0. Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Li Jun <b47624@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-04-24usb: chipidea: OTG fsm timers initializationLi Jun
This patch adds OTG fsm timers initialization, which use controller's 1ms interrupt as timeout counter, also adds some local timers which are not in otg_fsm_timer list. Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Li Jun <b47624@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-04-24usb: chipidea: add OTG fsm operation functions implementationLi Jun
Add OTG HNP and SRP operation functions implementation: - charge vbus - drive vbus - connection signaling - drive sof - start data pulse - add fsm timer - delete fsm timer - start host - start gadget Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Li Jun <b47624@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-04-24usb: chipidea: udc: driver update for OTG HNPLi Jun
Add b_hnp_enable request handling and enable gadget->is_otg Signed-off-by: Peter Chen <peter.chen@freescale.com> Acked-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Li Jun <b47624@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-04-24usb: chipidea: host: init otg port numberLi Jun
Init otg_port number of otg capable host to be 1 at host start. Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Li Jun <b47624@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-04-24usb: chipidea: host: vbus control change for OTG HNPLi Jun
Leave vbus on/off hanlded by OTG fsm if in OTG mode. Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Li Jun <b47624@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-04-24usb: chipidea: usb OTG fsm initialization.Li Jun
This patch adds OTG fsm related initialization when do otg init, add a seperate file for OTG fsm related utilities. Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Li Jun <b47624@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-04-24usb: chipidea: core: Add missing module owner fieldAlexander Shiyan
Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-04-24usb: chipidea: add proper delay for waiting correct PHY statusPeter Chen
After the PHY has powered and initialized, it needs some delay for controller to reflect PHY's status. Some status and values for id, vbus, dp/dm are only stable after this delay. The current code tries to clear id/vbus status without enough delay, it causes the status are not cleared properly. This patch add 2ms delay after phy has initialized, and clear the unexpected status after that. Signed-off-by: Peter Chen <peter.chen@freescale.com> Tested-by: Li Jun <b47624@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-04-24usb: chipidea: debug: add debug file for controller registers dumpLi Jun
This patch adds below registers dump for debug: - USBINTR - USBSTS - USBMODE - USBCMD - PORTSC - OTGSC Signed-off-by: Peter Chen <peter.chen@freescale.com> Acked-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Li Jun <b47624@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-04-24usb: chipidea: export interrupt enable and status register read functionsLi Jun
This patch moves usb interrupt enable and status register read functions from udc driver to core driver to use them in all ci drivers. Signed-off-by: Peter Chen <peter.chen@freescale.com> Acked-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Li Jun <b47624@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-04-24usb: chipidea: operate on otgsc register in a general wayLi Jun
Use a more general way to read and write otgsc register. Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Li Jun <b47624@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-04-24usb: chipidea: coordinate usb phy initialization for different phy typePeter Chen
For internal PHY (like UTMI), the phy clock may from internal pll, it is on/off on the fly, the access PORTSC.PTS will hang without phy clock. So, the usb_phy_init which will open phy clock needs to be called before hw_phymode_configure. See: http://marc.info/?l=linux-arm-kernel&m=139350618732108&w=2 For external PHY (like ulpi), it needs to configure portsc.pts before visit viewport, or the viewport can't be visited. so phy_phymode_configure needs to be called before usb_phy_init. See: cd0b42c2a6d2a74244f0053f8960f5dad5842278 It may not the best solution, but it can work for all situations. Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Chris Ruehl <chris.ruehl@gtsys.com.hk> Cc: shc_work@mail.ru Cc: denis@eukrea.com Cc: festevam@gmail.com Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-04-24usb: chipidea: usbmisc: Add USB support for i.MX25/i.MX35 CPUsDenis Carikli
This adds the i.MX25 and the i.MX35 support in the ChipIdea usbmisc driver. The i.MX25 and i.MX35 usb controllers are similar enough to be able to use the same code. Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Denis Carikli <denis@eukrea.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-03-12usb: chipidea: add support for USB OTG controller on LSI Zevio SoCsDaniel Tang
The USB controller in TI-NSPIRE calculators (LSI Zevio SoC) are based off either Freescale's USB OTG controller or the USB controller found in the IMX233, both of which are Chipidea compatible. This patch adds a device tree binding for the controller. Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Daniel Tang <dt.tangr@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-03-12usb: chipidea: imx: Use dev_name() for ci_hdrc name to distinguish USBsAlexander Shiyan
Use dev_name() for ci_hdrc name to distinguish USBs Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-03-12usb: chipidea: udc: refine isr_tr_complete_handlerPeter Chen
Matthieu CASTET and Michael Grzeschik mentioned isr_tr_complete_handler is a bit messy at below: http://marc.info/?l=linux-usb&m=139047775001152&w=2 This commit creates a new function isr_setup_packet_handler to handle setup packet, it makes isr_tr_complete_handler easy to read. This is no functional change at this commit, tested with g_mass_storage and g_ether. Cc: Michael Grzeschik <mgr@pengutronix.de> Cc: Matthieu CASTET <matthieu.castet@parrot.com> Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-02-24usb: chipidea: Propagate the real error code on platform_get_irq() failureFabio Estevam
No need to return a 'fake' return value on platform_get_irq() failure. Just return the error code itself instead. Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-02-24usb: chipidea: udc: add maximum-speed = full-speed optionMichael Grzeschik
This patch makes it possible to set the chipidea udc into full-speed only mode. It is set by the oftree property "maximum-speed = full-speed". Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-02-24usb: chipidea: use dev_get_platdata()Jingoo Han
Use the wrapper function for retrieving the platform data instead of accessing dev->platform_data directly. This is a cosmetic change to make the code simpler and enhance the readability. Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-02-24usb: chipidea: udc: refine ep operation at isr_tr_complete_handlerPeter Chen
- delete the warning message at interrupt handler, and adds judgement at ep_enable, if non-ep0 requests ctrl transfer, it will indicate an error. - delete hw_test_and_clear_setup_status which is a broken code - Tested with g_mass_storage, g_ncm, g_ether Cc: matthieu.castet@parrot.com Reported-by: Michael Grzeschik <mgr@pengutronix.de> Acked-by: Michael Grzeschik <mgr@pengutronix.de> Tested-by: Michael Grzeschik <mgr@pengutronix.de> Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-02-24usb: chipidea: refine PHY operationPeter Chen
- Delete global_phy due to we can get the phy from phy layer now - using devm_usb_get_phy to instead of usb_get_phy - delete the otg_set_peripheral, which should be handled by otg layer Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-02-21usb: chipidea: need to mask when writting endptflush and endptprimeMatthieu CASTET
ENDPTFLUSH and ENDPTPRIME registers are set by software and clear by hardware. There is a bit for each endpoint. When we are setting a bit for an endpoint we should make sure we do not touch other endpoint bit. There is a race condition if the hardware clear the bit between the read and the write in hw_write. Cc: stable <stable@vger.kernel.org> # 3.11+ Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Matthieu CASTET <matthieu.castet@parrot.com> Tested-by: Michael Grzeschik <mgrzeschik@pengutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-01-13usb: chipidea: udc: using MultO at TD as real mult value for ISO-TXPeter Chen
We have met a bug that the high bandwidth ISO-TX transfer has failed at the last packet if it is less than 1024, the TD status shows it is "Transaction Error". The root cause of this problem is: the mult value at qh is not correct for current TD's transfer length. We use TD list to queue un-transfer TDs, and change mult for new adding TDs. If new adding TDs transfer length less than 1024, but the queued un-transfer TDs transfer length is larger than 1024, the transfer error will occur, and vice versa. Usually, this problem occurs at the last packet, and the first packet for new frame. We fixed this problem by setting Mult at QH as the largest value (3), and set MultO (Multiplier Override) at TD according to every transfer length. It can cover both hardware version less than 2.3 (the real mult is MultO if it is not 0) and 2.3+ (the real mult is min(qh.mult, td.multo)). Since the MultO bits are only existed at TX TD, we keep the ISO-RX behavior unchanged. For stable tree: 3.11+. Cc: stable <stable@vger.kernel.org> Cc: Michael Grzeschik <m.grzeschik@pengutronix.de> Reported-by: Matthieu Vanin <b47495@freescale.com> Tested-by: Matthieu Vanin <b47495@freescale.com> Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-01-13usb: chipidea: need to mask INT_STATUS when write otgscPeter Chen
For otgsc, both enable bits and status bits are in it. So we need to make sure the status bits are not be cleared when write enable bits. It can fix one bug that we plug in/out Micro AB cable fast, and sometimes, the IDIS will be cleared wrongly when handle last ID interrupt (ID 0->1), so the current interrupt will not occur. For stable tree: 3.12+ Cc: stable@vger.kernel.org Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-01-13usb: chipidea: put hw_phymode_configure before ci_usb_phy_initChris Ruehl
hw_phymode_configure configures the PORTSC registers and allow the following phy_inits to operate on the right parameters. This fix a problem where the UPLI (ISP1504) could not be detected, because the Viewport was not available and read the viewport return 0's only. Signed-off-by: Chris Ruehl <chris.ruehl@gtsys.com.hk> Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-01-13usb: chipidea: Fix Internal error: : 808 [#1] ARM related to STS flagChris Ruehl
* init the sts flag to 0 (missed) * fix write the real bit not sts value * Set PORTCS_STS and DEVLC_STS only if sts = 1 [Peter Chen: This one and the next patch fix the problem occurred imx27 and imx31, and imx27 and imx31 usb support are enabled until 3.14, so these two patches isn't needed for -stable] Signed-off-by: Chris Ruehl <chris.ruehl@gtsys.com.hk> Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-01-13usb: chipidea: imx: set CI_HDRC_IMX28_WRITE_FIX for imx28Peter Chen
Due to imx28 needs ARM swp instruction for writing, we set CI_HDRC_IMX28_WRITE_FIX for imx28. This patch is needed for stable tree 3.11+ Cc: stable@vger.kernel.org Cc: robert.hodaszi@digi.com Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Tested-by: Marc Kleine-Budde <mkl@pengutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>