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2020-06-24spi: spi-geni-qcom: Use OPP API to set clk/perf stateRajendra Nayak
geni spi needs to express a perforamnce state requirement on CX depending on the frequency of the clock rates. Use OPP table from DT to register with OPP framework and use dev_pm_opp_set_rate() to set the clk/perf state. Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Acked-by: Mark Brown <broonie@kernel.org> Cc: Alok Chauhan <alokc@codeaurora.org> Cc: Akash Asthana <akashast@codeaurora.org> Cc: linux-spi@vger.kernel.org Link: https://lore.kernel.org/r/1592222564-13556-3-git-send-email-rnayak@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-24spi: spi-qcom-qspi: Add interconnect supportAkash Asthana
Get the interconnect paths for QSPI device and vote according to the current bus speed of the driver. Acked-by: Mark Brown <broonie@kernel.org> Signed-off-by: Akash Asthana <akashast@codeaurora.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Link: https://lore.kernel.org/r/1592908737-7068-8-git-send-email-akashast@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-24spi: spi-geni-qcom: Add interconnect supportAkash Asthana
Get the interconnect paths for SPI based Serial Engine device and vote according to the current bus speed of the driver. Acked-by: Mark Brown <broonie@kernel.org> Signed-off-by: Akash Asthana <akashast@codeaurora.org> Link: https://lore.kernel.org/r/1592908737-7068-7-git-send-email-akashast@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-24spi: spi-geni-qcom: Combine the clock setting codeDouglas Anderson
There is code for adjusting the clock both in setup_fifo_params() (called from prepare_message()) and in setup_fifo_xfer() (called from transfer_one()). The code is the same. Abstract it out to a shared function. This is a no-op cleanup patch. The only change is to the error string if we fail to set the clock. Since the two paths has marginally different error messages I picked the clean one. Acked-by: Mark Brown <broonie@kernel.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Akash Asthana <akashast@codeaurora.org> Link: https://lore.kernel.org/r/1592908737-7068-6-git-send-email-akashast@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-24spi: altera: fix module autoloadXu Yilun
Add the MODULE_DEVICE_TABLE macro for the platform_device_id table to allow proper creation of modalias strings and fix autoloading module for this driver. Signed-off-by: Xu Yilun <yilun.xu@intel.com> Signed-off-by: Russ Weight <russell.h.weight@intel.com> Link: https://lore.kernel.org/r/1592962286-25752-3-git-send-email-yilun.xu@intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-06-24spi: altera: fix driver matching failure of the device ID "spi_altera"Xu Yilun
The driver is expected to support device ID "spi_altera" for MMIO accessed devices, device ID "subdev_spi_altera" for indirect accessed devices. But the platform bus will not try driver name match anymore if the platform driver has an id_table. So the "spi_altera" should also be added to id_table. Signed-off-by: Xu Yilun <yilun.xu@intel.com> Signed-off-by: Russ Weight <russell.h.weight@intel.com> Link: https://lore.kernel.org/r/1592962286-25752-2-git-send-email-yilun.xu@intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-06-23spi: imx: add fallback featureRobin Gong
Add fallback pio feature in case dma transfer failed before start. Besides, another whole pio transfer including setup_transfer will be issued by spi core, no need to restore jobs like commit bcd8e7761ec9 ("spi: imx: fallback to PIO if dma setup failure"). Signed-off-by: Robin Gong <yibin.gong@nxp.com> Link: https://lore.kernel.org/r/1592347329-28363-3-git-send-email-yibin.gong@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-06-23spi: introduce fallback to pioRobin Gong
Add fallback to pio mode in case dma transfer failed with error status SPI_TRANS_FAIL_NO_START. If spi client driver want to enable this feature please set xfer->error in the proper place such as dmaengine_prep_slave_sg() failure detect(but no any data put into spi bus yet). Besides, add master->fallback checking in its can_dma() so that spi core could switch to pio next time. Please refer to spi-imx.c. Signed-off-by: Robin Gong <yibin.gong@nxp.com> Link: https://lore.kernel.org/r/1592347329-28363-2-git-send-email-yibin.gong@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-06-22Merge tag 'spi-fix-v5.8-rc2' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi Pull spi fixes from Mark Brown: "Quite a lot of fixes here for no single reason. There's a collection of the usual sort of device specific fixes and also a bunch of people have been working on spidev and the userspace test program spidev_test so they've got an unusually large collection of small fixes" * tag 'spi-fix-v5.8-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: spi: spidev: fix a potential use-after-free in spidev_release() spi: spidev: fix a race between spidev_release and spidev_remove spi: stm32-qspi: Fix error path in case of -EPROBE_DEFER spi: uapi: spidev: Use TABs for alignment spi: spi-fsl-dspi: Free DMA memory with matching function spi: tools: Add macro definitions to fix build errors spi: tools: Make default_tx/rx and input_tx static spi: dt-bindings: amlogic, meson-gx-spicc: Fix schema for meson-g12a spi: rspi: Use requested instead of maximum bit rate spi: spidev_test: Use %u to format unsigned numbers spi: sprd: switch the sequence of setting WDG_LOAD_LOW and _HIGH
2020-06-22Merge series "Some small spi geni cleanups" from Stephen Boyd ↵Mark Brown
<swboyd@chromium.org>: To follow onto Doug's latest spi geni series[1] this simplifies and reduces the code a little more. [1] https://lore.kernel.org/r/20200618150626.237027-1-dianders@chromium.org Stephen Boyd (2): spi: spi-geni-qcom: Simplify setup_fifo_xfer() spi: spi-geni-qcom: Don't set {tx,rx}_rem_bytes unnecessarily drivers/spi/spi-geni-qcom.c | 55 +++++++++++++++++-------------------- 1 file changed, 25 insertions(+), 30 deletions(-) base-commit: 7ba9bdcb91f694b0eaf486a825afd9c2d99532b7 -- Sent by a computer, using git, on the internet
2020-06-22spi: spi-geni-qcom: Don't set {tx,rx}_rem_bytes unnecessarilyStephen Boyd
We only need to test for these counters being non-zero when we see the end of a transfer. If we're doing a CS change then they will already be zero. This implies that we don't need to set these to 0 if we're cancelling an in flight transfer too, because we only care to test these counters when the 'DONE' bit is set in the hardware and we've set them to non-zero for a transfer. This is a non-functional change, just cleanup to consolidate code. Signed-off-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20200620022233.64716-3-swboyd@chromium.org Signed-off-by: Mark Brown <broonie@kernel.org>
2020-06-22spi: spi-geni-qcom: Simplify setup_fifo_xfer()Stephen Boyd
The definition of SPI_FULL_DUPLEX (3) is really SPI_TX_ONLY (1) ORed with SPI_RX_ONLY (2). Let's drop the define and simplify the code here a bit by collapsing the setting of 'm_cmd' into conditions that are the same. This is a non-functional change, just cleanup to consolidate code. Signed-off-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20200620022233.64716-2-swboyd@chromium.org Signed-off-by: Mark Brown <broonie@kernel.org>
2020-06-22spi: spi-fsl-dspi: Initialize completion before possible interruptKrzysztof Kozlowski
The interrupt handler calls completion and is IRQ requested before the completion is initialized. Logically it should be the other way. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200622110543.5035-4-krzk@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2020-06-22spi: spi-fsl-dspi: Fix external abort on interrupt in resume or exit pathsKrzysztof Kozlowski
If shared interrupt comes late, during probe error path or device remove (could be triggered with CONFIG_DEBUG_SHIRQ), the interrupt handler dspi_interrupt() will access registers with the clock being disabled. This leads to external abort on non-linefetch on Toradex Colibri VF50 module (with Vybrid VF5xx): $ echo 4002d000.spi > /sys/devices/platform/soc/40000000.bus/4002d000.spi/driver/unbind Unhandled fault: external abort on non-linefetch (0x1008) at 0x8887f02c Internal error: : 1008 [#1] ARM Hardware name: Freescale Vybrid VF5xx/VF6xx (Device Tree) Backtrace: (regmap_mmio_read32le) (regmap_mmio_read) (_regmap_bus_reg_read) (_regmap_read) (regmap_read) (dspi_interrupt) (free_irq) (devm_irq_release) (release_nodes) (devres_release_all) (device_release_driver_internal) The resource-managed framework should not be used for shared interrupt handling, because the interrupt handler might be called after releasing other resources and disabling clocks. Similar bug could happen during suspend - the shared interrupt handler could be invoked after suspending the device. Each device sharing this interrupt line should disable the IRQ during suspend so handler will be invoked only in following cases: 1. None suspended, 2. All devices resumed. Fixes: 349ad66c0ab0 ("spi:Add Freescale DSPI driver for Vybrid VF610 platform") Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Cc: <stable@vger.kernel.org> Link: https://lore.kernel.org/r/20200622110543.5035-3-krzk@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2020-06-22spi: spi-fsl-dspi: Fix lockup if device is shutdown during SPI transferKrzysztof Kozlowski
During shutdown, the driver should unregister the SPI controller and stop the hardware. Otherwise the dspi_transfer_one_message() could wait on completion infinitely. Additionally, calling spi_unregister_controller() first in device shutdown reverse-matches the probe function, where SPI controller is registered at the end. Fixes: dc234825997e ("spi: spi-fsl-dspi: Adding shutdown hook") Reported-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Cc: <stable@vger.kernel.org> Link: https://lore.kernel.org/r/20200622110543.5035-2-krzk@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2020-06-22spi: spi-fsl-dspi: Fix lockup if device is removed during SPI transferKrzysztof Kozlowski
During device removal, the driver should unregister the SPI controller and stop the hardware. Otherwise the dspi_transfer_one_message() could wait on completion infinitely. Additionally, calling spi_unregister_controller() first in device removal reverse-matches the probe function, where SPI controller is registered at the end. Fixes: 05209f457069 ("spi: fsl-dspi: add missing clk_disable_unprepare() in dspi_remove()") Reported-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Cc: <stable@vger.kernel.org> Link: https://lore.kernel.org/r/20200622110543.5035-1-krzk@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2020-06-19spi: spi-geni-qcom: Simplify setup_fifo_xfer()Stephen Boyd
The definition of SPI_FULL_DUPLEX (3) is really SPI_TX_ONLY (1) ORed with SPI_RX_ONLY (2). Let's drop the define and simplify the code here a bit by collapsing the setting of 'm_cmd' into conditions that are the same. This is a non-functional change, just cleanup to consolidate code. Signed-off-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Cc: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20200618233959.160032-1-swboyd@chromium.org Signed-off-by: Mark Brown <broonie@kernel.org>
2020-06-19Merge series "mtd: spi-nor: Move cadence-qaudspi to spi-mem framework" from ↵Mark Brown
Vignesh Raghavendra <vigneshr@ti.com>: This series is a subset of "[PATCH v12 0/4] spi: cadence-quadspi: Add support for the Cadence QSPI controller" by Ramuthevar,Vadivel MuruganX <vadivel.muruganx.ramuthevar@linux.intel.com> that intended to move cadence-quadspi driver to spi-mem framework Those patches were trying to accomplish too many things in a single set of patches and need to split into smaller patches. This is reduced version of above series. Changes that are intended to make migration easy are split into separate patches. Patches 1 to 3 drop features that cannot be supported under spi-mem at the moment (backward compatibility is maintained). Patch 4-5 are trivial cleanups. Patch 6 does the actual conversion to spi-mem and patch 7 moves the driver to drivers/spi folder. I have tested both INDAC mode (used by non TI platforms like Altera SoCFPGA) and DAC mode (used by TI platforms) on TI EVMs. Patches to move move bindings over to "Documentation/devicetree/bindings/spi/" directory and also conversion of bindig doc to YAML will be posted separately. Support for Intel platform would follow that. Resend v3: Rebased onto v5.7-c1 v3: Split handling of probe deferral into separate patch (out of 5/6) Split dropping of redundant WREN to separate patch (out of 5/6) Fix a possible memleak due to lack of spi_master_put() Parse all SPI slave nodes in cqspi_setup_flash() Address misc comments from Tudor on v2 Rebase onto latest spi-nor/next v2: Rework patch 1/6 to keep "cdns,is-decoded-cs" property supported. Ramuthevar Vadivel Murugan (2): mtd: spi-nor: Convert cadence-quadspi to use spi-mem framework spi: Move cadence-quadspi driver to drivers/spi/ Vignesh Raghavendra (6): mtd: spi-nor: cadence-quadspi: Make driver independent of flash geometry mtd: spi-nor: cadence-quadspi: Provide a way to disable DAC mode mtd: spi-nor: cadence-quadspi: Don't initialize rx_dma_complete on failure mtd: spi-nor: cadence-quadspi: Fix error path on failure to acquire reset lines mtd: spi-nor: cadence-quadspi: Handle probe deferral while requesting DMA channel mtd: spi-nor: cadence-quadspi: Drop redundant WREN in erase path drivers/mtd/spi-nor/controllers/Kconfig | 11 - drivers/mtd/spi-nor/controllers/Makefile | 1 - drivers/spi/Kconfig | 11 + drivers/spi/Makefile | 1 + .../spi-cadence-quadspi.c} | 541 +++++++----------- 5 files changed, 222 insertions(+), 343 deletions(-) rename drivers/{mtd/spi-nor/controllers/cadence-quadspi.c => spi/spi-cadence-quadspi.c} (74%) base-commit: b3a9e3b9622ae10064826dccb4f7a52bd88c7407 -- 2.26.2 ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/
2020-06-19spi: Move cadence-quadspi driver to drivers/spi/Ramuthevar Vadivel Murugan
Now that cadence-quadspi has been converted to use spi-mem framework, move it under drivers/spi/ Update license header to match SPI subsystem style Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Acked-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200601070444.16923-9-vigneshr@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-06-19Merge series "add regmap & indirect access support" from Xu Yilun ↵Mark Brown
<yilun.xu@intel.com>: Updated the regmap & indirect access support for spi-altera. Patch #1 is an 1:1 replacement of of readl/writel with regmap_read/write Patch #2 introduced a new platform_device_id to support indirect access as a sub device. Patch #3 is a minor fix. Main changes from v1: - Split the regmap supporting patch to 2 patches. - Add a new platform_device_id to support indirect access. - Removed the v1 patch "move driver name string to header file". Now we use driver name string directly. - Add Yilun's Signed-off-by for Patch #3. - Add Tom's Reviewed-by. Matthew Gerlach (1): spi: altera: fix size mismatch on 64 bit processors Xu Yilun (2): spi: altera: use regmap-mmio instead of direct mmio register access spi: altera: support indirect access to the registers drivers/spi/Kconfig | 1 + drivers/spi/spi-altera.c | 127 +++++++++++++++++++++++++++++++++++++++-------- 2 files changed, 107 insertions(+), 21 deletions(-) -- 2.7.4
2020-06-19Merge series "spi: spi-geni-qcom: Fixes / perf improvements" from Douglas ↵Mark Brown
Anderson <dianders@chromium.org>: This patch series is a new version of the previous patch posted: [PATCH v2] spi: spi-geni-qcom: Speculative fix of "nobody cared" about interrupt https://lore.kernel.org/r/20200317133653.v2.1.I752ebdcfd5e8bf0de06d66e767b8974932b3620e@changeid At this point I've done enough tracing to know that there was a real race in the old code (not just weakly ordered memory problems) and that should be fixed with the locking patches. While looking at this driver, I also noticed we weren't properly noting error interrupts and also weren't actually using our FIFO effectively, so I fixed those. The last patch in the series addresses review feedback about dislike for the "cur_mcmd" state variable. It also could possibly make "abort" work ever-so-slightly more reliably. Changes in v4: - Drop 'controller' in comment. - Use Stephen's diagram to explain the race better. Changes in v3: - ("spi: spi-geni-qcom: No need for irqsave variant...") new for v3 - Split out some lock cleanup to previous patch. - Don't need to read IRQ status register inside spinlock. - Don't check for state CMD_NONE; later patch is removing state var. - Don't hold the lock for all of setup_fifo_xfer(). - Comment about why it's safe to Ack interrupts at the end. - Subject/desc changed since race is definitely there. - ("spi: spi-geni-qcom: Check for error IRQs") new in v3. - ("spi: spi-geni-qcom: Actually use our FIFO") new in v3. - ("spi: spi-geni-qcom: Don't keep a local state variable") new in v3. Changes in v2: - Detect true spurious interrupt. - Still return IRQ_NONE for state machine mismatch, but print warn. Douglas Anderson (5): spi: spi-geni-qcom: No need for irqsave variant of spinlock calls spi: spi-geni-qcom: Mo' betta locking spi: spi-geni-qcom: Check for error IRQs spi: spi-geni-qcom: Actually use our FIFO spi: spi-geni-qcom: Don't keep a local state variable drivers/spi/spi-geni-qcom.c | 120 ++++++++++++++++++++++++------------ 1 file changed, 81 insertions(+), 39 deletions(-) -- 2.27.0.290.gba653c62da-goog
2020-06-19spi: npcm-fiu: Reuse BITS_PER_BYTE definitionAndy Shevchenko
No need to redefine already existing definition. So, replace custom by generic one. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20200618170144.57433-1-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-06-19spi: spi-geni-qcom: Don't keep a local state variableDouglas Anderson
The variable "cur_mcmd" kept track of our current state (idle, xfer, cs, cancel). We don't really need it, so get rid of it. Instead: * Use separate condition variables for "chip select done", "cancel done", and "abort done". This is important so that if a "done" comes through (perhaps some previous interrupt finally came through) it can't confuse the cancel/abort function. * Use the "done" interrupt only for when a chip select or transfer is done and we can tell the difference by looking at whether "cur_xfer" is NULL. This is mostly a no-op change. However, it is possible it could fix an issue where a super delayed interrupt for a cancel command could have confused our waiting for an abort command. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20200618080459.v4.5.Ib1e6855405fc9c99916ab7c7dee84d73a8bf3d68@changeid Signed-off-by: Mark Brown <broonie@kernel.org>
2020-06-19spi: spi-geni-qcom: Actually use our FIFODouglas Anderson
The geni hardware has a FIFO that can hold up to 64 bytes (it has 16 entries that can hold 4 bytes each), at least on the two SoCs I tested (sdm845 and sc7180). We configured our RX Watermark to 0, which basically meant we got an interrupt as soon as the first 4 bytes showed up in the FIFO. Tracing the IRQ handler showed that we often only read 4 or 8 bytes per IRQ handler. I tried setting the RX Watermark to "fifo size - 2" but that just got me a bunch of overrun errors reported. Setting it to "fifo size - 3" seemed to work great, though. This made me worried that we'd start getting overruns if we had long interrupt latency, but that doesn't appear to be the case and delays inserted in the IRQ handler while using "fifo size - 3" didn't cause any errors. Presumably there is some interaction with the poorly-documented RFR (ready for receive) level means that "fifo size - 3" is the max. We are the SPI master, so it makes sense that there would be no problems with overruns, the master should just stop clocking. Despite "fifo size - 3" working, I chose "fifo size / 2" (8 entries = 32 bytes) which gives us a little extra time to get to the interrupt handler and should reduce dead time on the SPI wires. With this setting, I often saw the IRQ handler handle 40 bytes but sometimes up to 56 if we had bad interrupt latency. Testing by running "flashrom -p ec -r" on a Chromebook saw interrupts from the SPI driver cut roughly in half. Time was roughly the same. Fixes: 561de45f72bd ("spi: spi-geni-qcom: Add SPI driver support for GENI based QUP") Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20200618080459.v4.4.I988281f7c6ee0ed00325559bfce7539f403da69e@changeid Signed-off-by: Mark Brown <broonie@kernel.org>
2020-06-19spi: spi-geni-qcom: Check for error IRQsDouglas Anderson
>From reading the #defines it seems like we should shout if we ever see one of these error bits. Let's do so. This doesn't do anything functional except print a yell in the log if the error bits are seen. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20200618080459.v4.3.Id8bebdbdb4d2ed9468634343a7e6207d6cffff8a@changeid Signed-off-by: Mark Brown <broonie@kernel.org>
2020-06-19spi: spi-geni-qcom: Mo' betta lockingDouglas Anderson
If you added a bit of a delay (like a trace_printk) into the ISR for the spi-geni-qcom driver, you would suddenly start seeing some errors spit out. The problem was that, though the ISR itself held a lock, other parts of the driver didn't always grab the lock. One example race was this: CPU0 CPU1 ---- ---- spi_geni_set_cs() mas->cur_mcmd = CMD_CS; geni_se_setup_m_cmd(...) wait_for_completion_timeout(&xfer_done); <INTERRUPT> geni_spi_isr() complete(&xfer_done); <wakeup> pm_runtime_put(mas->dev); ... // back to SPI core spi_geni_transfer_one() setup_fifo_xfer() mas->cur_mcmd = CMD_XFER; mas->cur_cmd = CMD_NONE; // bad! return IRQ_HANDLED; Let's fix this. Before we start messing with hardware, we'll grab the lock to make sure that the IRQ handler from some previous command has really finished. We don't need to hold the lock unless we're in a state where more interrupts can come in, but we at least need to make sure the previous IRQ is done. This lock is used exclusively to prevent the IRQ handler and non-IRQ from stomping on each other. The SPI core handles all other mutual exclusion. As part of this, we change the way that the IRQ handler detects spurious interrupts. Previously we checked for our state variable being set to IRQ_NONE, but that was done outside the spinlock. We could move it into the spinlock, but instead let's just change it to look for the lack of any IRQ status bits being set. This can be done outside the lock--the hardware certainly isn't grabbing or looking at the spinlock when it updates its status register. It's possible that this will fix real (but very rare) errors seen in the field that look like: irq ...: nobody cared (try booting with the "irqpoll" option) NOTE: an alternate strategy considered here was to always make the complete() / spi_finalize_current_transfer() the very last thing in our IRQ handler. With such a change you could consider that we could be "lockless". In that case, though, we'd have to be very careful w/ memory barriers so we made sure we didn't have any bugs with weakly ordered memory. Using spinlocks makes the driver much easier to understand. Fixes: 561de45f72bd ("spi: spi-geni-qcom: Add SPI driver support for GENI based QUP") Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20200618080459.v4.2.I752ebdcfd5e8bf0de06d66e767b8974932b3620e@changeid Signed-off-by: Mark Brown <broonie@kernel.org>
2020-06-19spi: altera: fix size mismatch on 64 bit processorsMatthew Gerlach
The spi-altera driver was originally written with a 32 bit processor, where sizeof(unsigned long) is 4. On a 64 bit processor sizeof(unsigned long) is 8. Change the structure member to u32 to match the actual size of the control register. Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> Signed-off-by: Xu Yilun <yilun.xu@intel.com> Reviewed-by: Tom Rix <trix@redhat.com> Link: https://lore.kernel.org/r/1592531021-11412-4-git-send-email-yilun.xu@intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-06-19spi: altera: support indirect access to the registersXu Yilun
This patch adds support for indirect access to the registers via parent regmap. The use case is, the spi master is a sub device of a Multifunction device, which is connected to host by some indirect bus. To support this device type, a new platform_device_id is introduced, and the driver tries to get parent regmap for register accessing like many MFD sub device drivers do. Signed-off-by: Xu Yilun <yilun.xu@intel.com> Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> Signed-off-by: Wu Hao <hao.wu@intel.com> Signed-off-by: Russ Weight <russell.h.weight@intel.com> Reviewed-by: Tom Rix <trix@redhat.com> Link: https://lore.kernel.org/r/1592531021-11412-3-git-send-email-yilun.xu@intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-06-19spi: altera: use regmap-mmio instead of direct mmio register accessXu Yilun
This patch adds support for regmap. It makes preparation for supporting different ways to access the registers. Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> Signed-off-by: Wu Hao <hao.wu@intel.com> Signed-off-by: Xu Yilun <yilun.xu@intel.com> Signed-off-by: Russ Weight <russell.h.weight@intel.com> Reviewed-by: Tom Rix <trix@redhat.com> Link: https://lore.kernel.org/r/1592531021-11412-2-git-send-email-yilun.xu@intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-06-18spi: spidev: fix a potential use-after-free in spidev_release()Zhenzhong Duan
If an spi device is unbounded from the driver before the release process, there will be an NULL pointer reference when it's referenced in spi_slave_abort(). Fix it by checking it's already freed before reference. Signed-off-by: Zhenzhong Duan <zhenzhong.duan@gmail.com> Link: https://lore.kernel.org/r/20200618032125.4650-2-zhenzhong.duan@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-06-18spi: spidev: fix a race between spidev_release and spidev_removeZhenzhong Duan
Imagine below scene, spidev is referenced after it's freed. spidev_release() spidev_remove() ... spin_lock_irq(&spidev->spi_lock); spidev->spi = NULL; spin_unlock_irq(&spidev->spi_lock); mutex_lock(&device_list_lock); dofree = (spidev->spi == NULL); if (dofree) kfree(spidev); mutex_unlock(&device_list_lock); mutex_lock(&device_list_lock); list_del(&spidev->device_entry); device_destroy(spidev_class, spidev->devt); clear_bit(MINOR(spidev->devt), minors); if (spidev->users == 0) kfree(spidev); mutex_unlock(&device_list_lock); Fix it by resetting spidev->spi in device_list_lock's protection. Signed-off-by: Zhenzhong Duan <zhenzhong.duan@gmail.com> Link: https://lore.kernel.org/r/20200618032125.4650-1-zhenzhong.duan@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-06-18spi: spi-geni-qcom: No need for irqsave variant of spinlock callsDouglas Anderson
The driver locks its locks in two places. In the first usage of the lock the function doing the locking already has a sleeping call and thus we know we can't be called from interrupt context. That means we can use the "spin_lock_irq" variant of the function. In the second usage of the lock the function is the interrupt handler and we know interrupt handlers are called with interrupts disabled. That means we can use the "spin_lock" variant of the function. This patch is expected to be a no-op and is just a cleanup / slight optimization. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20200616034044.v3.1.Ic50cccdf27d42420a63485082f8b5bf86ed1a2b6@changeid Signed-off-by: Mark Brown <broonie@kernel.org>
2020-06-17spi: bcm63xx-hsspi: add reset supportÁlvaro Fernández Rojas
bcm63xx arch resets the HSSPI controller at early boot. However, bmips arch needs to perform a reset when probing the driver. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20200616173235.3473149-3-noltari@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-06-17spi: bcm63xx-spi: add reset supportÁlvaro Fernández Rojas
bcm63xx arch resets the SPI controller at early boot. However, bmips arch needs to perform a reset when probing the driver. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20200616173235.3473149-2-noltari@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-06-17spi: stm32-qspi: Fix error path in case of -EPROBE_DEFERPatrice Chotard
In case of -EPROBE_DEFER, stm32_qspi_release() was called in any case which unregistered driver from pm_runtime framework even if it has not been registered yet to it. This leads to: stm32-qspi 58003000.spi: can't setup spi0.0, status -13 spi_master spi0: spi_device register error /soc/spi@58003000/mx66l51235l@0 spi_master spi0: Failed to create SPI device for /soc/spi@58003000/mx66l51235l@0 stm32-qspi 58003000.spi: can't setup spi0.1, status -13 spi_master spi0: spi_device register error /soc/spi@58003000/mx66l51235l@1 spi_master spi0: Failed to create SPI device for /soc/spi@58003000/mx66l51235l@1 On v5.7 kernel,this issue was not "visible", qspi driver was probed successfully. Fixes: 9d282c17b023 ("spi: stm32-qspi: Add pm_runtime support") Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Link: https://lore.kernel.org/r/20200616113035.4514-1-patrice.chotard@st.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-06-16Merge series "spi: bcm63xx: add BMIPS support" from Álvaro Fernández Rojas ↵Mark Brown
<noltari@gmail.com>: BCM63xx SPI and HSSPI controller are present on several BMIPS SoCs (BCM6318, BCM6328, BCM6358, BCM6362, BCM6368 and BCM63268). v2: use devm_reset_control_get_exclusive Álvaro Fernández Rojas (4): spi: bcm63xx-spi: add reset support spi: bcm63xx-spi: allow building for BMIPS spi: bcm63xx-hsspi: add reset support spi: bcm63xx-hsspi: allow building for BMIPS drivers/spi/Kconfig | 4 ++-- drivers/spi/spi-bcm63xx-hsspi.c | 17 +++++++++++++++++ drivers/spi/spi-bcm63xx.c | 17 +++++++++++++++++ 3 files changed, 36 insertions(+), 2 deletions(-) -- 2.27.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
2020-06-16Merge series "Add more configuration and regmap support for spi-altera" from ↵Mark Brown
Xu Yilun <yilun.xu@intel.com>: This patchset adds platform_data for spi-altera, to enable more IP configurations, and creating specific spi client devices. It also adds regmap support, to enable the indirect access to this IP. We have a PCIE based FPGA platform which integrates this IP to communicate with a BMC chip (Intel MAX10) over SPI. The IP is configured as 32bit data width. There is also an indirect access interface in FPGA for host to access the registers of this IP. This patchset enables this use case. Matthew Gerlach (1): spi: altera: fix size mismatch on 64 bit processors Xu Yilun (5): spi: altera: add 32bit data width transfer support. spi: altera: add SPI core parameters support via platform data. spi: altera: add platform data for slave information. spi: altera: use regmap instead of direct mmio register access spi: altera: move driver name string to header file drivers/spi/Kconfig | 1 + drivers/spi/spi-altera.c | 161 +++++++++++++++++++++++++++++++++++++-------- include/linux/spi/altera.h | 37 +++++++++++ 3 files changed, 171 insertions(+), 28 deletions(-) create mode 100644 include/linux/spi/altera.h -- 2.7.4
2020-06-16spi: spi-cavium-thunderx: flag controller as half duplexTim Harvey
The OcteonTX (TX1/ThunderX) SPI controller does not support full duplex transactions. Set the appropriate flag such that the spi core will return -EINVAL on such transactions requested by chip drivers. This is an RFC as I need someone from Marvell/Cavium to confirm if this driver is used for other silicon that does support full duplex transfers (in which case we will need to identify that we are running on the ThunderX arch before setting the flag). Signed-off-by: Tim Harvey <tharvey@gateworks.com> Cc: Robert Richter <rrichter@marvell.com> Link: https://lore.kernel.org/r/1590680799-5640-1-git-send-email-tharvey@gateworks.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-06-16spi: add Renesas RPC-IF driverSergei Shtylyov
Add the SPI driver for the Renesas RPC-IF. It's the "front end" driver using the "back end" APIs in the main driver to talk to the real hardware. We only implement the 'spi-mem' interface -- there's no need to implement the usual SPI driver methods... Based on the original patch by Mason Yang <masonccyang@mxic.com.tw>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Link: https://lore.kernel.org/r/1ece0e6c-71af-f0f1-709e-571f4b0b4853@cogentembedded.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-06-16spi: bcm63xx-hsspi: allow building for BMIPSÁlvaro Fernández Rojas
bcm63xx-hsspi controller is present on several BMIPS SoCs (BCM6318, BCM6328, BCM6362 and BCM63268). Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20200615090943.2936839-5-noltari@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-06-16spi: bcm63xx-spi: allow building for BMIPSÁlvaro Fernández Rojas
bcm63xx-spi controller is present on several BMIPS SoCs (BCM6358, BCM6362, BCM6368 and BCM63268). Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20200615090943.2936839-3-noltari@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-06-15spi: altera: add platform data for slave information.Xu Yilun
This patch introduces platform data for slave information, it allows spi-altera to add new spi devices once master registration is done. Signed-off-by: Wu Hao <hao.wu@intel.com> Signed-off-by: Xu Yilun <yilun.xu@intel.com> Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> Signed-off-by: Russ Weight <russell.h.weight@intel.com> Reviewed-by: Tom Rix <trix@redhat.com> Link: https://lore.kernel.org/r/1591845911-10197-4-git-send-email-yilun.xu@intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-06-15spi: altera: add SPI core parameters support via platform data.Xu Yilun
This patch introduced SPI core parameters in platform data, it allows passing these SPI core parameters via platform data. Signed-off-by: Wu Hao <hao.wu@intel.com> Signed-off-by: Xu Yilun <yilun.xu@intel.com> Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> Signed-off-by: Russ Weight <russell.h.weight@intel.com> Reviewed-by: Tom Rix <trix@redhat.com> Link: https://lore.kernel.org/r/1591845911-10197-3-git-send-email-yilun.xu@intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-06-15spi: altera: add 32bit data width transfer support.Xu Yilun
Add support for 32bit width data register, then it supports 32bit data width spi slave device and spi transfers. Signed-off-by: Xu Yilun <yilun.xu@intel.com> Signed-off-by: Wu Hao <hao.wu@intel.com> Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> Signed-off-by: Russ Weight <russell.h.weight@intel.com> Reviewed-by: Tom Rix <trix@redhat.com> Link: https://lore.kernel.org/r/1591845911-10197-2-git-send-email-yilun.xu@intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-06-15Merge existing fixes from spi/for-5.8Mark Brown
2020-06-15sched,spi: Convert to sched_set_fifo*()Peter Zijlstra
Because SCHED_FIFO is a broken scheduler model (see previous patches) take away the priority field, the kernel can't possibly make an informed decision. No effective change. Cc: broonie@kernel.org Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Ingo Molnar <mingo@kernel.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Guenter Roeck <groeck@chromium.org>
2020-06-11spi: spi-fsl-dspi: Free DMA memory with matching functionKrzysztof Kozlowski
Driver allocates DMA memory with dma_alloc_coherent() but frees it with dma_unmap_single(). This causes DMA warning during system shutdown (with DMA debugging) on Toradex Colibri VF50 module: WARNING: CPU: 0 PID: 1 at ../kernel/dma/debug.c:1036 check_unmap+0x3fc/0xb04 DMA-API: fsl-edma 40098000.dma-controller: device driver frees DMA memory with wrong function [device address=0x0000000087040000] [size=8 bytes] [mapped as coherent] [unmapped as single] Hardware name: Freescale Vybrid VF5xx/VF6xx (Device Tree) (unwind_backtrace) from [<8010bb34>] (show_stack+0x10/0x14) (show_stack) from [<8011ced8>] (__warn+0xf0/0x108) (__warn) from [<8011cf64>] (warn_slowpath_fmt+0x74/0xb8) (warn_slowpath_fmt) from [<8017d170>] (check_unmap+0x3fc/0xb04) (check_unmap) from [<8017d900>] (debug_dma_unmap_page+0x88/0x90) (debug_dma_unmap_page) from [<80601d68>] (dspi_release_dma+0x88/0x110) (dspi_release_dma) from [<80601e4c>] (dspi_shutdown+0x5c/0x80) (dspi_shutdown) from [<805845f8>] (device_shutdown+0x17c/0x220) (device_shutdown) from [<80143ef8>] (kernel_restart+0xc/0x50) (kernel_restart) from [<801441cc>] (__do_sys_reboot+0x18c/0x210) (__do_sys_reboot) from [<80100060>] (ret_fast_syscall+0x0/0x28) DMA-API: Mapped at: dma_alloc_attrs+0xa4/0x130 dspi_probe+0x568/0x7b4 platform_drv_probe+0x6c/0xa4 really_probe+0x208/0x348 driver_probe_device+0x5c/0xb4 Fixes: 90ba37033cb9 ("spi: spi-fsl-dspi: Add DMA support for Vybrid") Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Vladimir Oltean <vladimir.oltean@nxp.com> Cc: <stable@vger.kernel.org> Link: https://lore.kernel.org/r/1591803717-11218-1-git-send-email-krzk@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2020-06-09spi: rspi: Use requested instead of maximum bit rateGeert Uytterhoeven
Currently, the RSPI driver always tries to use the maximum configured bit rate for communicating with a slave device, even if the transfer(s) in the current message specify a lower rate. Use the mininum rate specified in the message instead. Rename rspi_data.max_speed_hz accordingly. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20200608095940.30516-3-geert+renesas@glider.be Signed-off-by: Mark Brown <broonie@kernel.org>
2020-06-07Merge tag 'char-misc-5.8-rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc Pull char/misc driver updates from Greg KH: "Here is the large set of char/misc driver patches for 5.8-rc1 Included in here are: - habanalabs driver updates, loads - mhi bus driver updates - extcon driver updates - clk driver updates (approved by the clock maintainer) - firmware driver updates - fpga driver updates - gnss driver updates - coresight driver updates - interconnect driver updates - parport driver updates (it's still alive!) - nvmem driver updates - soundwire driver updates - visorbus driver updates - w1 driver updates - various misc driver updates In short, loads of different driver subsystem updates along with the drivers as well. All have been in linux-next for a while with no reported issues" * tag 'char-misc-5.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (233 commits) habanalabs: correctly cast u64 to void* habanalabs: initialize variable to default value extcon: arizona: Fix runtime PM imbalance on error extcon: max14577: Add proper dt-compatible strings extcon: adc-jack: Fix an error handling path in 'adc_jack_probe()' extcon: remove redundant assignment to variable idx w1: omap-hdq: print dev_err if irq flags are not cleared w1: omap-hdq: fix interrupt handling which did show spurious timeouts w1: omap-hdq: fix return value to be -1 if there is a timeout w1: omap-hdq: cleanup to add missing newline for some dev_dbg /dev/mem: Revoke mappings when a driver claims the region misc: xilinx-sdfec: convert get_user_pages() --> pin_user_pages() misc: xilinx-sdfec: cleanup return value in xsdfec_table_write() misc: xilinx-sdfec: improve get_user_pages_fast() error handling nvmem: qfprom: remove incorrect write support habanalabs: handle MMU cache invalidation timeout habanalabs: don't allow hard reset with open processes habanalabs: GAUDI does not support soft-reset habanalabs: add print for soft reset due to event habanalabs: improve MMU cache invalidation code ...
2020-06-02spi: sprd: switch the sequence of setting WDG_LOAD_LOW and _HIGHLingling Xu
The watchdog counter consists of WDG_LOAD_LOW and WDG_LOAD_HIGH, which would be loaded to watchdog counter once writing WDG_LOAD_LOW. Fixes: ac1775012058 ("spi: sprd: Add the support of restarting the system") Signed-off-by: Lingling Xu <ling_ling.xu@unisoc.com> Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com> Link: https://lore.kernel.org/r/20200602082415.5848-1-zhang.lyra@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-10-25 01:46:43 +0000