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git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers
soc/tegra: Core SoC changes for v4.12-rc1
This contains PMC support for Tegra186 as well as a proper driver for
the flow controller found on SoCs up to Tegra210. This also turns the
fuse driver into an explicitly non-modular driver.
* tag 'tegra-for-4.12-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc/tegra: Add initial flowctrl support for Tegra132/210
soc/tegra: flowctrl: Add basic platform driver
soc/tegra: Move Tegra flowctrl driver
ARM: tegra: Remove unnecessary inclusion of flowctrl header
soc: tegra: make fuse-tegra explicitly non-modular
soc/tegra: Fix link errors with PMC disabled
soc/tegra: Implement Tegra186 PMC support
Signed-off-by: Olof Johansson <olof@lixom.net>
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git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/drivers
ARM SOC PM domain support for 4.12
Dave Gerlach (5):
PM / Domains: Add generic data pointer to genpd data struct
PM / Domains: Do not check if simple providers have phandle cells
dt-bindings: Add TI SCI PM Domains
soc: ti: Add ti_sci_pm_domains driver
ARM: keystone: Drop PM domain support for k2g
* tag 'arm-soc-pmdomain' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
ARM: keystone: Drop PM domain support for k2g
soc: ti: Add ti_sci_pm_domains driver
dt-bindings: Add TI SCI PM Domains
PM / Domains: Do not check if simple providers have phandle cells
PM / Domains: Add generic data pointer to genpd data struct
Signed-off-by: Olof Johansson <olof@lixom.net>
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Power area A2VC0 was removed in revision ES2.0, cfr. R-Car Gen3 Hardware
User's Manual rev. 0.53E.
Hence remove it from the power area table when not running on ES1.x.
This is in line with the goal to:
1. Support both the ES1.x and ES2.0 SoC revisions in a single binary
for now,
2. Make it clear which code supports ES1.x, so it can easily be
identified and removed later, when production SoCs are deemed
ubiquitous.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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The same SoC may have different power areas, depending on SoC revision.
One option is to use different sets of power area tables for each SoC
revision. However, if the differences are small, it is much more
space-efficient to have a single set of tables, and fix those up at
runtime instead.
Hence provide a helper to NULLify power areas that do not exist on some
revisions (NULLified power areas are skipped during the registration
phase), and support for an optional initialization callback to e.g. fix
up power area tables.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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The r8a7795 SYSC driver manages PM Domains, and thus is initialized from
an early_initcall(). However, this means the driver cannot check the
SoC revision, as the SoC device hasn't been registered yet.
Change renesas_soc_init() from a core_initcall() to an early_initcall()
to fix this (renesas-soc.o is listed before rcar-sysc.o in the Makefile).
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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On i.MX6QP, due to hardware erratum ERR009619, the PRE clocks may be
stalled during the power up sequencing of the PU power domain. As this
may lead to a complete loss of display output, the recommended
workaround is to keep the PU domain enabled during normal system
operation.
Implement this by rejecting the domain power down request on the
affected SoC.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Makes referencing a specfic domain in the driver code
less error prone.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add code allowing for control of various power domains managed by GPCv2
IP block found in i.MX7 series of SoCs. Power domains covered by this
patch are:
- PCIE PHY
- MIPI PHY
- USB HSIC PHY
- USB OTG1/2 PHY
Support for any other power domain controlled by GPC is not present, and
can be added at some later point.
Testing of this code was done against a PCIe driver.
Cc: yurovsky@gmail.com
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Dong Aisheng <dongas86@gmail.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Introduce a ti_sci_pm_domains driver to act as a generic pm domain
provider to allow each device to attach and associate it's ti-sci-id so
that it can be controlled through the TI SCI protocol.
This driver implements a simple genpd where each device node has a
phandle to the power domain node and also must provide an index which
represents the ID to be passed with TI SCI representing the device using
a single phandle cell. The driver manually parses the phandle to get the
cell value. Through this interface the genpd dev_ops start and stop
hooks will use TI SCI to turn on and off each device as determined by
pm_runtime usage.
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
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Tegra132 and Tegra210 support the flowctrl module and so add initial
support for these devices.
Please note that Tegra186 does not support the flowctrl module, so
update the initialisation function such that we do not fall back and
attempt to map the 'hardcoded' address range for Tegra186. Furthermore
64-bit Tegra devices have always had the flowctrl node defined in their
device-tree and so only use the 'hardcoded' addresses for 32-bit Tegra
devices.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Add a simple platform driver for the flowctrl module so that it gets
registered as a proper device.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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The flowctrl driver is required for both ARM and ARM64 Tegra devices
and in order to enable support for it for ARM64, move the Tegra flowctrl
driver into drivers/soc/tegra.
By moving the flowctrl driver, tegra_flowctrl_init() is now called by
via an early initcall and to prevent this function from attempting to
mapping IO space for a non-Tegra device, a test for 'soc_is_tegra()'
is also added.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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The Makefiles currently controlling compilation of this code is:
drivers/soc/tegra/Makefile:obj-y += fuse/
drivers/soc/tegra/fuse/Makefile:obj-y += fuse-tegra.o
...meaning that it currently is not being built as a module by anyone.
Lets remove the couple traces of modularity so that when reading the
driver there is no doubt it is builtin-only.
Since module_platform_driver() uses the same init level priority as
builtin_platform_driver() the init ordering remains unchanged with
this commit.
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: linux-tegra@vger.kernel.org
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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The power management controller on Tegra186 has changed in backwards-
incompatible ways with respect to earlier generations. This implements a
new driver that supports inversion of the PMU interrupt as well as the
"recovery", "bootloader" and "forced-recovery" reboot commands.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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To simplify machine init and as the soc_device struct is not used as the
parent for on-chip devices anymore, move SoC detection to its own driver.
Change in dmesg:
- before:
DMA: preallocated 256 KiB pool for atomic coherent allocations
AT91: Detected SoC family: sama5d2
AT91: Detected SoC: sama5d27, revision 0
No ATAGs?
clocksource: tcb_clksrc: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 184217874325 ns
at_xdmac f0010000.dma-controller: 16 channels, mapped at 0xe085b000
SCSI subsystem initialized
- after:
DMA: preallocated 256 KiB pool for atomic coherent allocations
No ATAGs?
clocksource: tcb_clksrc: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 184217874325 ns
at_xdmac f0010000.dma-controller: 16 channels, mapped at 0xe0859000
AT91: Detected SoC family: sama5d2
AT91: Detected SoC: sama5d27, revision 0
SCSI subsystem initialized
Suggested-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
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into next/drivers
Pull "Broadcom drivers changes for 4.12" from Florian Fainelli:
This pull request contains Broadcom ARM-based SoC drivers updates for 4.12,
please pull the following changes:
- Florian updates the Broadcom STB GISB arbiter driver with a bunch of
compatible strings for MIPS-based STBs found under arch/mips/boot/dts/brcm/ in
order for the SoC identification driver to recognize these chips
* tag 'arm-soc/for-4.12/drivers' of http://github.com/Broadcom/stblinux:
soc: bcm: brcmstb: Match additional compatible strings
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With the RPM driver transitioned to RPMSG we can reuse the SMD-RPM
driver ontop of GLINK for 8996, without any modifications.
Acked-by: Andy Gross <andy.gross@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Remove the standalone SMD implementation as we have transitioned the
client drivers to use the RPMSG based one.
Also remove all dependencies on QCOM_SMD from Kconfig files, in order to
keep them selectable in the absence of the removed symbol.
Acked-by: Andy Gross <andy.gross@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
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By moving these client drivers to use RPMSG instead of the direct SMD
API we can reuse them ontop of the newly added GLINK wire-protocol
support found in the 820 and 835 Qualcomm platforms.
As the new (RPMSG-based) and old SMD implementations are mutually
exclusive we have to change all client drivers in one commit, to make
sure we have a working system before and after this transition.
Acked-by: Andy Gross <andy.gross@linaro.org>
Acked-by: Kalle Valo <kvalo@codeaurora.org>
Acked-by: Marcel Holtmann <marcel@holtmann.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Export qman_query_fq_np() function and related structures.
This will be needed in the caam/qi driver, where "queue empty"
condition will be decided based on the frm_cnt.
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Add and export the ID of the channel serviced by the
CAAM (Cryptographic Acceleration and Assurance Module) DCP.
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Since qman_volatile_dequeue() is already exported, move the related
structures into the public header too.
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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It is not really necessary to provide the current .readable_reg
implementation as we know what we're doing in our driver
and the regmap core has already done the partial check for
available maximum regs.
Acked-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Instead of GPC_PGC_PDN_OFFS, naming it as GPC_PGC_CTRL_OFFS which is
defined in reference manual for better reading.
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The correct comment should be power up domain.
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Commit 721cabf6c660 ("soc: imx: move PGC handling to a new GPC driver")
broke the MX6SL GPC power domain support.
It always got the following error:
[ 1.248364] imx-gpc 20dc000.gpc: could not find pgc DT node
This patch adds back the legecy support.
Fixes: 721cabf6c660 ("soc: imx: move PGC handling to a new GPC driver")
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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ARRAY_SIZE(imx_gpc_domains) represents all power domains supported
by different SoCs. Driver should use SoC specific of_id_data->num_domains
instead to do power domain index sanity check.
e.g. MX6Q supports two power domains while MX6SL supports three.
Fixes: 721cabf6c660 ("soc: imx: move PGC handling to a new GPC driver")
Acked-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Without providing the proper reg_defaults, the regmap registers first
read out may be always 0 if enabling cache, which results in the
following issue we met.
e.g. During driver probe in imx6_pm_domain_power_on():
regmap_read(pd->regmap, pd->reg_offs + GPC_PGC_PUPSCR_OFFS, &val);
The PGC_PUPSCR register val is always 0 but it's actually 0xf01 in HW.
Since GPC registers are tightly related to CPU bring up and may be
changed in bootloader, we don't want to provide defaults.
And the cache really does not save too much for GPC module.
Therefore, simply disable cache to fix the issue and make life easy.
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Fixes: 721cabf6c660 ("soc: imx: move PGC handling to a new GPC driver")
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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We got a following kernel crash once supplying one more IPG
clock in GPC node in devicetree. The original error handling of
clocks get is a bit wrong that when reaching the maximum clock
get error, the index 'i' is already GPC_CLK_MAX which can't be used
as the array index for clk_put operations.
[ 3.000110] imx-gpc 20dc000.gpc: more than 6 clocks
[ 3.005141] Unable to handle kernel NULL pointer dereference at virtual address 00000000
[ 3.013487] pgd = c0004000
[ 3.016300] [00000000] *pgd=00000000
[ 3.020060] Internal error: Oops: 805 [#1] SMP ARM
[ 3.024957] Modules linked in:
[ 3.028122] CPU: 0 PID: 1 Comm: swapper/0 Tainted: G W 4.11.0-rc1-00056-g813791b-dirty #1140
[ 3.037801] Hardware name: Freescale i.MX6 Quad/DualLite (Device Tree)
[ 3.044435] task: ef298000 task.stack: ef294000
[ 3.049080] PC is at __clk_put+0x38/0xec
[ 3.053103] LR is at 0x7f54ce9a
[ 3.056345] pc : [<c0537984>] lr : [<7f54ce9a>] psr: 60000013
[ 3.056345] sp : ef295d48 ip : c8a582b2 fp : ef295d64
[ 3.068026] r10: ee9fc400 r9 : 00000000 r8 : ef398c10
[ 3.073354] r7 : ef398c10 r6 : c1071264 r5 : c10710f0 r4 : eea5be80
[ 3.079986] r3 : 00000000 r2 : 00000000 r1 : 00000100 r0 : 00000001
[ 3.086621] Flags: nZCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment none
[ 3.093863] Control: 10c5387d Table: 1000404a DAC: 00000051
[ 3.099712] Process swapper/0 (pid: 1, stack limit = 0xef294210)
[ 3.105823] Stack: (0xef295d48 to 0xef296000)
...
[ 3.292660] Backtrace:
[ 3.295222] [<c053794c>] (__clk_put) from [<c0531028>] (clk_put+0x18/0x1c)
[ 3.302206] r6:c1071264 r5:c10710f0 r4:c107124c r3:00000001
[ 3.307977] [<c0531010>] (clk_put) from [<c0546ba0>] (imx_pgc_get_clocks+0x64/0x78)
[ 3.315747] [<c0546b3c>] (imx_pgc_get_clocks) from [<c0547124>] (imx_gpc_probe+0x204/0x31c)
[ 3.324209] r7:00000000 r6:c1070eb0 r5:00000001 r4:ef398c00
[ 3.329980] [<c0546f20>] (imx_gpc_probe) from [<c05e65f0>] (platform_drv_probe+0x5c/0xc0)
[ 3.338270] r10:c0f00608 r9:00000000 r8:00000000 r7:fffffdfb r6:c1070f20 r5:ef398c10
[ 3.346207] r4:ef398c10
[ 3.348849] [<c05e6594>] (platform_drv_probe) from [<c05e4250>] (driver_probe_device+0x214/0x2ec)
[ 3.357835] r7:c1070f20 r6:00000000 r5:c18cea74 r4:ef398c10
[ 3.363607] [<c05e403c>] (driver_probe_device) from [<c05e43ec>] (__driver_attach+0xc4/0xc8)
[ 3.372159] r9:c0f8b858 r8:c0f8b850 r7:00000000 r6:ef398c44 r5:c1070f20 r4:ef398c10
[ 3.380017] [<c05e4328>] (__driver_attach) from [<c05e21fc>] (bus_for_each_dev+0x7c/0xb0)
[ 3.388304] r6:c05e4328 r5:c1070f20 r4:00000000 r3:00000000
[ 3.394074] [<c05e2180>] (bus_for_each_dev) from [<c05e3bc4>] (driver_attach+0x28/0x30)
[ 3.402188] r6:c107f3e8 r5:eea5be00 r4:c1070f20
[ 3.406913] [<c05e3b9c>] (driver_attach) from [<c05e3740>] (bus_add_driver+0x19c/0x224)
[ 3.415034] [<c05e35a4>] (bus_add_driver) from [<c05e52fc>] (driver_register+0x88/0x108)
[ 3.423235] r7:c10e1000 r6:00000000 r5:c0f57d2c r4:c1070f20
[ 3.429004] [<c05e5274>] (driver_register) from [<c05e6534>] (__platform_driver_register+0x40/0x54)
[ 3.438160] r5:c0f57d2c r4:00000006
[ 3.441846] [<c05e64f4>] (__platform_driver_register) from [<c0f57d44>] (imx_gpc_driver_init+0x18/0x20)
[ 3.451360] [<c0f57d2c>] (imx_gpc_driver_init) from [<c010200c>] (do_one_initcall+0x4c/0x180)
[ 3.460008] [<c0101fc0>] (do_one_initcall) from [<c0f00e40>] (kernel_init_freeable+0x130/0x1f8)
[ 3.468820] r9:c0f8b858 r8:c0f8b850 r6:c0fc2414 r5:c10e1000 r4:00000006
[ 3.475637] [<c0f00d10>] (kernel_init_freeable) from [<c0ae6aec>] (kernel_init+0x18/0x124)
[ 3.484014] r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:c0ae6ad4
[ 3.491951] r4:00000000
[ 3.494590] [<c0ae6ad4>] (kernel_init) from [<c01088d0>] (ret_from_fork+0x14/0x24)
[ 3.502267] r4:00000000 r3:ef294000
[ 3.505947] Code: e5943014 e5942018 e3530000 e3a01c01 (e5823000)
[ 3.512215] ---[ end trace 375f9f2a5ddeff3c ]---
[ 3.517036] Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b
Cc: Lucas Stach <l.stach@pengutronix.de>
Fixes: 721cabf6c660 ("soc: imx: move PGC handling to a new GPC driver")
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The Exynos Power Management Unit (PMU) drivers contain quite large
static arrays of register values necessary for given Exynos SoC to enter
low power mode. All this data is useless for ARMv8 SoC like
Exynos5433, because the image will not be shared between ARMv7 and
ARMv8.
Add additional Kconfig symbol for selecting the SoC-specific driver
addons thus skipping the useless data in the final image (this is
similar approach to chosen for Exynos clock controller drivers):
- exynos-pmu driver will be compiled on both architectures ARMv7
and ARMv8,
- additional driver_data for ARMv7 SoCs will not be built on ARMv8
and a macro will return NULL for them in of_device_id - this should
be safe as these compatibles cannot match on ARMv7 and driver
anyway handles NULL driver_data,
- on ARMv8 compile only exynos-pmu driver which exposes the
syscon-regmap for PMU address space.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
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Add support for identifying the RZ/G1N (r8a7744) SoC.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Add support for identifying the RZ/G1H (r8a7742) SoC.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Remove .owner field if calls are used which set it automatically.
Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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There is a error message within devm_ioremap_resource
already, so remove the dev_err call to avoid redundant
error message.
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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This is an almost complete re-write of the previous GPC power gating control
code found in the IMX architecture code. It supports both the old and the new
DT binding, allowing more domains to be added later and generally makes the
driver easier to extend, while keeping compatibility with existing DTBs.
As the result, all functionality regarding the power gating controller
gets removed from the IMX architecture GPC driver. It keeps only the
IRQ controller code in the architecture, as this is closely coupled to
the CPU idle implementation.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Match all known sun-top-ctrl compatible strings from our MIPS chips
counterparts. This allows us to properly report the SoC information to
user-space through our SoC driver.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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<linux/sched.h> into <linux/sched/signal.h>
Fix up affected files that include this signal functionality via sched.h.
Acked-by: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Mike Galbraith <efault@gmx.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Arnd Bergmann:
"Driver updates for ARM SoCs.
A handful of driver changes this time around. The larger changes are:
- Reset drivers for hi3660 and zx2967
- AHCI driver for Davinci, acked by Tejun and brought in here due to
platform dependencies
- Cleanups of atmel-ebi (External Bus Interface)
- Tweaks for Rockchip GRF (General Register File) usage (kitchensink
misc register range on the SoCs)
- PM domains changes for support of two new ZTE SoCs (zx296718 and
zx2967)"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (53 commits)
soc: samsung: pmu: Add register defines for pad retention control
reset: make zx2967 explicitly non-modular
reset: core: fix reset_control_put
soc: samsung: pm_domains: Read domain name from the new label property
soc: samsung: pm_domains: Remove message about failed memory allocation
soc: samsung: pm_domains: Remove unused name field
soc: samsung: pm_domains: Use full names in subdomains registration log
sata: ahci-da850: un-hardcode the MPY bits
sata: ahci-da850: add a workaround for controller instability
sata: ahci: export ahci_do_hardreset() locally
sata: ahci-da850: implement a workaround for the softreset quirk
sata: ahci-da850: add device tree match table
sata: ahci-da850: get the sata clock using a connection id
soc: samsung: pmu: Remove duplicated define for ARM_L2_OPTION register
memory: atmel-ebi: Enable the SMC clock if specified
soc: samsung: pmu: Remove unused and duplicated defines
memory: atmel-ebi: Properly handle multiple reference to the same CS
memory: atmel-ebi: Fix the test to enable generic SMC logic
soc: samsung: pm_domains: Add new Exynos5433 compatible
soc: samsung: pmu: Add dummy support for Exynos5433 SoC
...
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform updates from Arnd Bergmann:
"In the SoC branch we normally collect classic arch/arm/mach-*
contents, i.e. C code changes for SoC platforms. This release cycle
the diffstat is quite nice, in that we're removing 3x the amount of
code that's being added.
The main reason for this is that there's a removal of camera drivers
for Freescale i.MX chips (driver was removed so the device
registration isn't needed any more). There's also removal of display
initialization code for OMAP that is no longer needed.
The rest are mostly minor tweaks and cleanups; constification on
Samsung platforms, cleanup of ux500 platform data, purge of other
unused platform data/device seutp on i.MX and other good stuff.
New SoC support this cycle is for two Allwinner platforms, H2+ and
V3s"
* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (55 commits)
ARM: ux500: remove deleted file from Makefile
ARM: ep93xx: Disable TS-72xx watchdog before uncompressing
ARM: ux500: cut some platform data
MAINTAINERS: Update for the current location of the bcm2835 tree.
ARM: davinci: remove BUG_ON() from da850_register_sata()
ARM: davinci: da850: model the SATA refclk
ARM: davinci: da850: add con_id for the SATA clock
ARM: davinci: da8xx-dt: add OF_DEV_AUXDATA entry for SATA
arm: mvebu: support for SMP on 98DX3336 SoC
dt-bindings: video: exynos7-decon: Remove obsolete samsung,power-domain property
soc: dove: constify reset_control_ops structures
ARM: mv78xx0: fix possible PCI buffer overflow
MAINTAINERS: transfer maintainership for the EZX platform
ARM: shmobile: rcar-gen2: Add more register documentation
ARM: tegra: paz00: Fix __initdata placement
ARM: OMAP: clock: Remove unused mpurate cmdline option
ARM: davinci: add skeleton for pdata-quirks
arm: sunxi: add support for V3s SoC
ARM: OMAP2+: omap_hwmod: Add support for earlycon
arm: hisi: drop extern hip01_cpu_die
...
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Pull remoteproc updates from Bjorn Andersson:
"This introduces support for booting the dedicated sensor core in the
Qualcomm MSM8996, updates the Qualcomm ADSP and Hexagon drivers to
utilize SMD subdevice helpers for properly handle shutdowns and
restarts of the remoteproc, add virtio support to the ST remoteproc
and refactor the Qualcomm Hexagon driver to handle variations between
platforms.
The support code for parsing, loading and authenticating Qualcomm
firmware files (MDT) is refactored and move to drivers/soc/qcom, to
allow for non-remoteproc drivers to utilize this.
Finally it brings some cleanups to the remoteproc core"
* tag 'rproc-v4.11' of git://github.com/andersson/remoteproc: (27 commits)
remoteproc: qcom: mdt_loader: Use signed type for offset
remoteproc: st: add virtio communication support
remoteproc: st: correct probe error management
remoteproc: Modify the function names
remoteproc: Reduce asynchronous request_firmware to auto-boot only
remoteproc: Drop qcom_scm_pas_supported() from adsp_probe()
MAINTAINERS: Add missing rpmsg include path
remoteproc: qcom: Use common SMD edge handler
remoteproc: qcom: wcnss: Make SMD handling common
remoteproc: Move qcom_mdt_loader into drivers/soc/qcom
remoteproc: qcom: mdt_loader: Refactor MDT loader
remoteproc: qcom: mdt_loader: Don't overwrite firmware object
remoteproc: qcom: Extract non-mdt related helper
remoteproc: qcom: q6v5: Decouple driver from MDT loader
remoteproc: qcom: q6v5: Remove mss supply from 8916
remoteproc: qcom: fix initializers for qcom_mss_reg_res array
remoteproc: Drop firmware_loading_complete
remoteproc: Add RPROC_DELETED state
remoteproc: Move rproc_delete_debug_dir() to rproc_del()
remoteproc: qcom: Add SLPI rproc support to load and boot slpi proc.
...
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In the transition from using rproc_da_to_va(), the type of the load
offset became unsigned. This causes the subsequent check to let negative
values less than p_memsz + mem_size through and we write outside of the
buffer.
Change the type back to a signed value to catch this.
Fixes: 7f0dd07a9b29 ("remoteproc: qcom: mdt_loader: Refactor MDT loader")
Fixes: e7fd25226295 ("remoteproc: qcom: q6v5: Decouple driver from MDT loader")
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Reported-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
Acked-by: Andy Gross <andy.gross@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/drivers
Pull "soc: samsung: pm_domains for v4.11" from Krzysztof Kozłowski:
Improve the PM domains driver for Exynos by displaying a user-friendly name of
power domain. Till now, the name of node from DT was used which mostly is just
"power-domain". We need more than that.
* tag 'samsung-drivers-soc-pm-domains-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
soc: samsung: pm_domains: Read domain name from the new label property
soc: samsung: pm_domains: Remove message about failed memory allocation
soc: samsung: pm_domains: Remove unused name field
soc: samsung: pm_domains: Use full names in subdomains registration log
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With the remoteproc parts cleaned out of the MDT loader we can move it
to drivers/soc/qcom.
Acked-by: Andy Gross <andy.gross@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Device tree nodes for each power domain should use generic "power-domain"
name, so using it as a domain name doesn't give much benefits. This patch
adds support for human readable names defined in 'label' property. Such
names are visible to userspace and makes debugging much easier. When no
'label' property is found, driver keeps using the name constructed from
full node name.
Suggested-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
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Memory subsystem already prints message about failed memory
allocation, there is no need to do it in the drivers.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
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Name is now in generic pm domain structure, so there is no need to
duplicate it in private data.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
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Device tree none name for each power domain should be "power-domain", so
use a bit more descriptive full node name in messages about subdomain
registration. This way the following meaningless message:
power-domain has as child subdomain: power-domain.
is changed to a bit more meaningful one:
/soc/power-domain@105c40a0 has as child subdomain: /soc/power-domain@105c4020.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
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Linux 4.10-rc6
Resolved conflicts in:
drivers/pinctrl/pinctrl-amd.c
drivers/pinctrl/samsung/pinctrl-exynos.c
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git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/drivers
Continuation of improvements for Exynos PM drivers for v4.11:
1. Add support for Exynos5433 to Power Management Unit (PMU) and Power
Domains drivers.
2. Cleanups of duplicated and unused defines.
* tag 'samsung-drivers-soc-pmu-4.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
soc: samsung: pmu: Remove duplicated define for ARM_L2_OPTION register
soc: samsung: pmu: Remove unused and duplicated defines
soc: samsung: pm_domains: Add new Exynos5433 compatible
soc: samsung: pmu: Add dummy support for Exynos5433 SoC
Signed-off-by: Olof Johansson <olof@lixom.net>
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git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/drivers
ZTE PM domain driver support for 4.11:
- It includes a series which adds DT bindings and PM domain driver for
PCU (Power Control Unit) block found on ZTE ZX2967 family SoC.
* tag 'zte-pd-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
soc: zte: pm_domains: Add support for zx296718
soc: zte: pm_domains: Prepare for supporting ARMv8 zx2967 family
soc: zte: Add header for PM domains specifiers
MAINTAINERS: add zx2967 SoC drivers to ARM ZTE architecture
dt-bindings: zte: add bindings document for zx2967 power domain controller
Signed-off-by: Olof Johansson <olof@lixom.net>
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