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path: root/drivers/soc/ti/pm33xx.c
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2020-02-27soc: ti: pm33xx: Add base cpuidle supportDave Gerlach
Some cpuidle C-states supported on am335x and am437x, like C1 on am335x, require the use of the wkup_m3_ipc driver, and all C-states beyond C0 on both platforms require the use of the SRAM sleep code. Pass am33xx_do_sram_idle as the idle function to the platform pm core to be used by the cpuidle-arm driver when entering cpuidle states. am33xx_do_sram_idle will detect when the wkup_m3 is needed and ping it if necessary before calling the final cpu_suspend op which will execute the SRAM code to put the cpu into idle. Finally, use the begin_suspend and finish_suspend platform ops to be called at the beginning and end of suspend path to allow use of cpu_idle_poll_ctrl. This prevents races between cpuidle and suspend paths trying to communicate with the wkup_m3, as during suspend we only want it configured for entry to suspend. Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-02-27ARM: OMAP2+: pm33xx-core: Extend platform_data ops for cpuidleDave Gerlach
In order for am335x and am437x to properly enter deeper c-states in cpuidle they must always call into the sleep33/43xx suspend code and also sometimes invoke the wkup_m3_ipc driver. These are both controlled by the pm33xx module so we must provide a method for the platform code to call back into the module when it is available as the core cpuidle ops that are invoked by the cpuidle-arm driver must remain as built in. Extend the init platform op to take an idle function as an argument so that we can use this to call into the pm33xx module for c-states that need it. Also add a deinit op so we can unregister this idle function from the PM core when the pm33xx module gets unloaded. Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-08-13soc: ti: pm33xx: Make two symbols staticYueHaibing
Fix sparse warnings: drivers/soc/ti/pm33xx.c:144:27: warning: symbol 'rtc_wake_src' was not declared. Should it be static? drivers/soc/ti/pm33xx.c:160:5: warning: symbol 'am33xx_rtc_only_idle' was not declared. Should it be static? Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-08-13soc: ti: pm33xx: Fix static checker warningsKeerthy
The patch fixes a bunch of static checker warnings. Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-06-10soc: ti: pm33xx: Add a print while entering RTC only mode with DDR in ↵Keerthy
self-refresh Currently there is no way to distinguish if the SoC entered DS0 mode or the RTC only mode. Hence add a print before entering the RTC only mode. Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-08soc: ti: pm33xx: AM437X: Add rtc_only with ddr in self-refresh supportKeerthy
During RTC-only suspend, power is lost to the wkup domain, so we need to save and restore the state of that domain. We also need to store some information within the RTC registers so that u-boot can do the right thing at powerup. The state is entered by getting the RTC to bring the pmic_power_en line low which will instruct the PMIC to disable the appropriate power rails after putting DDR into self-refresh mode. To bring pmic_power_en low, we need to get an ALARM2 event. Since we are running from SRAM at that point, it means calculating what the next second is (via ASM) and programming that into the RTC. This patch also adds support for wake up source detection. Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-04-08soc: ti: pm33xx: Move the am33xx_push_sram_idle to the topKeerthy
Move the am33xx_push_sram_idle function to the top as a preparation for rtc+ddr mode as the function will be called by multiple functions currently present before it. No functional changes. Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-07-09ARM: OMAP2+: sleep33/43xx: Add RTC-Mode supportKeerthy
Add support for RTC mode to low level suspend code. This includes providing the rtc base address for the assembly code to configuring the PMIC_PWR_EN line late in suspend to enter RTC+DDR mode. Note: This patch also fold in left out space parameter for am33xx_emif_sram_table and am43xx_emif_sram_table Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-07-09ARM: OMAP2+: sleep33/43xx: Make sleep actions configurableDave Gerlach
Add an argument to the sleep33xx and sleep43xx code to allow us to set flags to determine which portions of the code get called in order to use the same code for multiple power saving modes. This patch allows us to decide whether or not we flush and disable caches, save EMIF context, put the memory into self refresh and disable the EMIF, and/or invoke the wkup_m3 when entering into WFI. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-02-27soc: ti: Add pm33xx driver for basic suspend supportDave Gerlach
AM335x and AM437x support various low power modes as documented in section 8.1.4.3 of the AM335x Technical Reference Manual and section 6.4.3 of the AM437x Technical Reference Manual. DeepSleep0 mode offers the lowest power mode with limited wakeup sources without a system reboot and is mapped as the suspend state in the kernel. In this state, MPU and PER domains are turned off with the internal RAM held in retention to facilitate the resume process. As part of the boot process, the assembly code is copied over to OCMCRAM so it can be executed to turn of the EMIF and put DDR into self refresh. Both platforms have a Cortex-M3 (WKUP_M3) which assists the MPU in DeepSleep0 entry and exit. WKUP_M3 takes care of the clockdomain and powerdomain transitions based on the intended low power state. MPU needs to load the appropriate WKUP_M3 binary onto the WKUP_M3 memory space before it can leverage any of the PM features like DeepSleep. This loading is handled by the remoteproc driver wkup_m3_rproc. Communication with the WKUP_M3 is handled by a wkup_m3_ipc driver that exposes the specific PM functionality to be used the PM code. In the current implementation when the suspend process is initiated, MPU interrupts the WKUP_M3 to let it know about the intent of entering DeepSleep0 and waits for an ACK. When the ACK is received MPU continues with its suspend process to suspend all the drivers and then jumps to assembly in OCMC RAM. The assembly code puts the external RAM in self-refresh mode, gates the MPU clock, and then finally executes the WFI instruction. Execution of the WFI instruction with MPU clock gated triggers another interrupt to the WKUP_M3 which then continues with the power down sequence wherein the clockdomain and powerdomain transition takes place. As part of the sleep sequence, WKUP_M3 unmasks the interrupt lines for the wakeup sources. WFI execution on WKUP_M3 causes the hardware to disable the main oscillator of the SoC and from here system remains in sleep state until a wake source brings the system into resume path. When a wakeup event occurs, WKUP_M3 starts the power-up sequence by switching on the power domains and finally enabling the clock to MPU. Since the MPU gets powered down as part of the sleep sequence in the resume path ROM code starts executing. The ROM code detects a wakeup from sleep and then jumps to the resume location in OCMC which was populated in one of the IPC registers as part of the suspend sequence. Code is based on work by Vaibhav Bedia. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>