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path: root/drivers/soc/imx/Makefile
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2020-05-20soc: imx: move cpu code to drivers/soc/imxPeng Fan
Move the soc device register code to drivers/soc/imx to align with i.MX8. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16soc: imx: increase build coverage for imx8m soc driverPeng Fan
The soc-imx8.c driver is actually for i.MX8M family, so rename it to soc-imx8m.c. Use CONFIG_SOC_IMX8M as build gate, not CONFIG_ARCH_MXC, to control whether build this driver, also make it possible for compile test. Default set it to y for ARCH_MXC && ARM64 Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-25Merge tag 'imx-drivers-5.3' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers i.MX driver changes for 5.3: - Add i.MX SCU based SoC bus driver for i.MX8QXP SoC support, which talks to SCU firmware for getting SoC ID and revision. - Update soc-imx8 bus driver to read imx8mm soc revision from anatop. - Add i.MX8MN SoC bus support into soc-imx8 driver. - Various small improvements on soc-imx8 bus driver. * tag 'imx-drivers-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: soc: imx: Add i.MX8MN SoC driver support soc: imx8: Use existing of_root directly soc: imx8: Fix potential kernel dump in error path soc: imx: soc-imx8: Correct return value of error handle soc: imx: soc-imx8: Avoid unnecessary of_node_put() in error handling soc: imx: Add SCU SoC info driver support soc: imx: Read imx8mm soc revision from anatop Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-03soc: imx: Add SCU SoC info driver supportAnson Huang
Add i.MX SCU SoC info driver to support i.MX8QXP SoC, introduce driver dependency into Kconfig as CONFIG_IMX_SCU must be selected to support i.MX SCU SoC driver, also need to use platform driver model to make sure IMX_SCU driver is probed before i.MX SCU SoC driver. With this patch, SoC info can be read from sysfs: i.mx8qxp-mek# cat /sys/devices/soc0/family Freescale i.MX i.mx8qxp-mek# cat /sys/devices/soc0/soc_id 0x2 i.mx8qxp-mek# cat /sys/devices/soc0/machine Freescale i.MX8QXP MEK i.mx8qxp-mek# cat /sys/devices/soc0/revision 1.1 Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-05-21treewide: Add SPDX license identifier - Makefile/KconfigThomas Gleixner
Add SPDX license identifiers to all Make/Kconfig files which: - Have no license information of any form These files fall under the project license, GPL v2 only. The resulting SPDX license identifier is: GPL-2.0-only Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-20soc: imx: Add generic i.MX8 SoC driverAbel Vesa
Add generic i.MX8 SoC driver along with the i.MX8MQ SoC specific code. For now, only i.MX8MQ revision B1 is supported. For any other, i.MX8MQ revision it will print 'unknown'. Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-12-05soc: imx: gpcv2: add support for i.MX8MQ SoCLucas Stach
The GPCv2 on the Freescale i.MX8MQ SoC works in the same way as the GPCv2 on the i.MX7, but only controls more power domains with a different mapping. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-05-15soc: imx: gpc: build gpc only if hardware has gpcMarc Ohlf
Add CONFIG_HAVE_IMX_GPC to goal definition of gpc.o, to avoid building it for hardware that does not need it. Signed-off-by: Marc Ohlf <ohlf@mkt-sys.de> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-04-07soc: imx: Add GPCv2 power gating driverAndrey Smirnov
Add code allowing for control of various power domains managed by GPCv2 IP block found in i.MX7 series of SoCs. Power domains covered by this patch are: - PCIE PHY - MIPI PHY - USB HSIC PHY - USB OTG1/2 PHY Support for any other power domain controlled by GPC is not present, and can be added at some later point. Testing of this code was done against a PCIe driver. Cc: yurovsky@gmail.com Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Dong Aisheng <dongas86@gmail.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-03-08soc: imx: move PGC handling to a new GPC driverLucas Stach
This is an almost complete re-write of the previous GPC power gating control code found in the IMX architecture code. It supports both the old and the new DT binding, allowing more domains to be added later and generally makes the driver easier to extend, while keeping compatibility with existing DTBs. As the result, all functionality regarding the power gating controller gets removed from the IMX architecture GPC driver. It keeps only the IRQ controller code in the architecture, as this is closely coupled to the CPU idle implementation. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>