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path: root/drivers/soc/Kconfig
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2016-11-29soc: fsl: add GUTS driver for QorIQ platformsyangbo lu
The global utilities block controls power management, I/O device enabling, power-onreset(POR) configuration monitoring, alternate function selection for multiplexed signals,and clock control. This patch adds a driver to manage and access global utilities block. Initially only reading SVR and registering soc device are supported. Other guts accesses, such as reading RCW, should eventually be moved into this driver as well. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-09-25arch/powerpc: Add CONFIG_FSL_DPAA to corenetXX_smp_defconfigClaudiu Manoil
Enable the drivers on the powerpc arch. Signed-off-by: Roy Pledge <roy.pledge@nxp.com> Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com> Signed-off-by: Scott Wood <oss@buserror.net>
2016-07-14Merge tag 'ux500-cleanup-bundle' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/drivers Merge "Ux500 cleanups from Arnd" from Linus Walleij: This is a set of cleanups for the Ux500 that reduce the number of machine-local files and boardfile-type data for regulators and ASoC. * tag 'ux500-cleanup-bundle' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: ARM: ux500: consolidate base platform files ARM: ux500: move soc_id driver to drivers/soc ARM: ux500: call ux500_setup_id later ARM: ux500: consolidate soc_device code in id.c ARM: ux500: remove cpu_is_u* helpers ARM: ux500: use CLK_OF_DECLARE() ARM: ux500: move l2x0 init to .init_irq mfd: db8500 stop passing around platform data ASoC: ab8500-codec: remove platform data based probe ARM: ux500: move ab8500_regulator_plat_data into driver ARM: ux500: remove unused regulator data
2016-07-12ARM: ux500: move soc_id driver to drivers/socArnd Bergmann
As the ux500 id code is basically a standalone driver, we can move it out of the arch code into drivers/soc/ux500. This is a user-visible change, as it moves all the devices in sysfs from /sys/devices/soc0/ to /sys/devices/ and leaves the soc0 node as a separate device. Originally the idea was to put all on-chip devices under the soc node, and ux500 was the first platform to have this device, but later platforms almost all didn't follow that pattern, so this makes the platform do the same thing as everyone else. Since the platform is really obsolete now, I am optimistic that nothing will break after moving the devices around. As the SoC driver no longer has access to the private header files, I'm changing the code to instead look up the address of the backupram from devicetree, which is a good idea anyway. Finally, having a separate Kconfig symbol means the driver is now optional and could even be a loadable module rather than always being built-in if we allowed that for soc_device. Signed-off-by: Arnd Bergmann <arnd@arndb.de> [Fixup mising Makefile, fixup BB_UID_BASE to fc0] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-05-31soc: Move brcmstb to bcm/brcmstbFlorian Fainelli
Unify the different Broadcom SoCs directory and have everybody live under drivers/soc/bcm/*. Acked-by: Scott Branden <scott.branden@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2016-02-25drivers: soc: Add support for Exynos PMU driverPankaj Dubey
This patch moves Exynos PMU driver implementation from "arm/mach-exynos" to "drivers/soc/samsung". This driver is mainly used for setting misc bits of register from PMU IP of Exynos SoC which will be required to configure before Suspend/Resume. Currently all these settings are done in "arch/arm/mach-exynos/pmu.c" but moving ahead for ARM64 based SoC support, there is a need of this PMU driver in driver/* folder. This driver uses existing DT binding information and there should be no functionality change in the supported platforms. Signed-off-by: Amit Daniel Kachhap <amitdanielk@gmail.com> [tested on Peach-Pi (Exynos5880)] Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> [for testing on Trats2 (Exynos4412) and Odroid XU3 (Exynos5422)] Tested-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> [k.kozlowski: Rebased, add necessary infrastructure for building and selecting drivers/soc because original patchset was on top of movement SROMc to drivers/soc] Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
2016-01-22Merge tag 'armsoc-tegra' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC support for Tegra platforms from Olof Johansson: "Here's a single-SoC topic branch that we've staged separately. Mainly because it was hard to sort the branch contents in a way that fit our existing branches due to some refactorings. The code has been in -next for quite a while, but we staged it in arm-soc a bit late, which is why we've kept it separate from the other updates and are sending it separately here" * tag 'armsoc-tegra' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: arm64: tegra: Add NVIDIA Jetson TX1 Developer Kit support arm64: tegra: Add NVIDIA P2597 I/O board support arm64: tegra: Add NVIDIA Jetson TX1 support arm64: tegra: Add NVIDIA P2571 board support arm64: tegra: Add NVIDIA P2371 board support arm64: tegra: Add NVIDIA P2595 I/O board support arm64: tegra: Add NVIDIA P2530 main board support arm64: tegra: Add Tegra210 support arm64: tegra: Add NVIDIA Tegra132 Norrin support arm64: tegra: Add Tegra132 support ARM: tegra: select USB_ULPI from EHCI rather than platform ARM: tegra: Ensure entire dcache is flushed on entering LP0/1 amba: Hide TEGRA_AHB symbol soc/tegra: Add Tegra210 support soc/tegra: Provide per-SoC Kconfig symbols
2016-01-20Merge tag 'armsoc-drivers' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver updates from Olof Johansson: "Driver updates for ARM SoCs. Some for SoC-family code under drivers/soc, but also some other driver updates that don't belong anywhere else. We also bring in the drivers/reset code through arm-soc. Some of the larger updates: - Qualcomm support for SMEM, SMSM, SMP2P. All used to communicate with other parts of the chip/board on these platforms, all proprietary protocols that don't fit into other subsystems and live in drivers/soc for now. - System bus driver for UniPhier - Driver for the TI Wakeup M3 IPC device - Power management for Raspberry PI + Again a bunch of other smaller updates and patches" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (38 commits) bus: uniphier: allow only built-in driver ARM: bcm2835: clarify RASPBERRYPI_FIRMWARE dependency MAINTAINERS: Drop Kumar Gala from QCOM bus: uniphier-system-bus: add UniPhier System Bus driver ARM: bcm2835: add rpi power domain driver dt-bindings: add rpi power domain driver bindings ARM: bcm2835: Define two new packets from the latest firmware. drivers/soc: make mediatek/mtk-scpsys.c explicitly non-modular soc: mediatek: SCPSYS: Add regulator support MAINTAINERS: Change QCOM entries soc: qcom: smd-rpm: Add existing platform support memory/tegra: Add number of TLB lines for Tegra124 reset: hi6220: fix modular build soc: qcom: Introduce WCNSS_CTRL SMD client ARM: qcom: select ARM_CPU_SUSPEND for power management MAINTAINERS: Add rules for Qualcomm dts files soc: qcom: enable smsm/smp2p modular build serial: msm_serial: Make config tristate soc: qcom: smp2p: Qualcomm Shared Memory Point to Point soc: qcom: smsm: Add driver for Qualcomm SMSM ...
2015-12-22QE: Move QE from arch/powerpc to drivers/socZhao Qiang
ls1 has qe and ls1 has arm cpu. move qe from arch/powerpc to drivers/soc/fsl to adapt to powerpc and arm Signed-off-by: Zhao Qiang <qiang.zhao@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2015-12-21ARM: bcm2835: add rpi power domain driverAlexander Aring
This patch adds support for several power domains on Raspberry Pi, including USB (so it can be enabled even if the bootloader didn't do it), and graphics. This patch is the combined work of Eric Anholt (who wrote USB support inside of the Raspberry Pi firmware driver, and wrote the non-USB domain support) and Alexander Aring (who separated the original USB work out from the firmware driver). Signed-off-by: Alexander Aring <alex.aring@gmail.com> Signed-off-by: Eric Anholt <eric@anholt.net> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Kevin Hilman <khilman@linaro.org>
2015-11-24soc/tegra: Provide per-SoC Kconfig symbolsThierry Reding
Move per-SoC generation Kconfig symbols to drivers/soc/tegra/Kconfig to gather them all in a single place. This directory is a natural location for these options since it already contains the drivers that are shared across 32-bit and 64-bit ARM architectures. Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-11-10Merge tag 'armsoc-drivers' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver updates from Olof Johansson: "As we've enabled multiplatform kernels on ARM, and greatly done away with the contents under arch/arm/mach-*, there's still need for SoC-related drivers to go somewhere. Many of them go in through other driver trees, but we still have drivers/soc to hold some of the "doesn't fit anywhere" lowlevel code that might be shared between ARM and ARM64 (or just in general makes sense to not have under the architecture directory). This branch contains mostly such code: - Drivers for qualcomm SoCs for SMEM, SMD and SMD-RPM, used to communicate with power management blocks on these SoCs for use by clock, regulator and bus frequency drivers. - Allwinner Reduced Serial Bus driver, again used to communicate with PMICs. - Drivers for ARM's SCPI (System Control Processor). Not to be confused with PSCI (Power State Coordination Interface). SCPI is used to communicate with the assistant embedded cores doing power management, and we have yet to see how many of them will implement this for their hardware vs abstracting in other ways (or not at all like in the past). - To make confusion between SCPI and PSCI more likely, this release also includes an update of PSCI to interface version 1.0. - Rockchip support for power domains. - A driver to talk to the firmware on Raspberry Pi" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (57 commits) soc: qcom: smd-rpm: Correct size of outgoing message bus: sunxi-rsb: Add driver for Allwinner Reduced Serial Bus bus: sunxi-rsb: Add Allwinner Reduced Serial Bus (RSB) controller bindings ARM: bcm2835: add mutual inclusion protection drivers: psci: make PSCI 1.0 functions initialization version dependent dt-bindings: Correct paths in Rockchip power domains binding document soc: rockchip: power-domain: don't try to print the clock name in error case soc: qcom/smem: add HWSPINLOCK dependency clk: berlin: add cpuclk ARM: berlin: dts: add CLKID_CPU for BG2Q ARM: bcm2835: Add the Raspberry Pi firmware driver soc: qcom: smem: Move RPM message ram out of smem DT node soc: qcom: smd-rpm: Correct the active vs sleep state flagging soc: qcom: smd: delete unneeded of_node_put firmware: qcom-scm: build for correct architecture level soc: qcom: smd: Correct SMEM items for upper channels qcom-scm: add missing prototype for qcom_scm_is_available() qcom-scm: fix endianess issue in __qcom_scm_is_call_available soc: qcom: smd: Reject send of too big packets soc: qcom: smd: Handle big endian CPUs ...
2015-10-06soc: rockchip: power-domain: Add power domain driverCaesar Wang
This driver is found on RK3288 SoCs. In order to meet high performance and low power requirements, a power management unit is designed or saving power when RK3288 in low power mode. The RK3288 PMU is dedicated for managing the power of the whole chip. PMU can work in the Low Power Mode by setting bit[0] of PMU_PWRMODE_CON register. After setting the register, PMU would enter the Low Power mode. In the low power mode, pmu will auto power on/off the specified power domain, send idle req to specified power domain, shut down/up pll and so on. All of above are configurable by setting corresponding registers. Signed-off-by: Caesar Wang <wxt@rock-chips.com> Reviewed-by: Kevin Hilman <khilman@linaro.org> [replace dsb() with dsb(sy) for arm64 buildability; sy is the default, so no functional change; adapt to per-user clocks in genpd] Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-09-14soc: add stubs for brcmstb SoC'sBrian Norris
Used on BCM7xxx Set-Top Box chips (e.g., BCM7445). Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2015-06-01drivers: soc: sunxi: Introduce SoC driver to map SRAMsMaxime Ripard
The Allwinner SoCs have a handful of SRAM that can be either mapped to be accessible by devices or the CPU. That mapping is controlled by an SRAM controller, and that mapping might not be set by the bootloader, for example if the device wasn't used at all, or if we're using solutions like the U-Boot's Falcon Boot. We could also imagine changing this at runtime for example to change the mapping of these SRAMs to use them for suspend/resume or runtime memory rate change, if that ever happens. These use cases require some API in the kernel to control that mapping, exported through a drivers/soc driver. This driver also implement a debugfs file that shows the SRAM found in the system, the current mapping and the SRAM that have been claimed by some drivers in the kernel. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Tested-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2015-03-30soc: mediatek: Add PMIC wrapper for MT8135 and MT8173 SoCsFlora Fu
This adds support for the PMIC wrapper found on MediaTek MT8135 and MT8173 SoCs. The PMIC wrapper is found on MT6xxx SoCs aswell but these are currently not supported. On MediaTek MT8135, MT8173 and other SoCs the PMIC is connected via SPI. The SPI master interface is not directly visible to the CPU, but only through the PMIC wrapper inside the SoC. The communication between the SoC and the PMIC can optionally be encrypted. Also a non standard Dual IO SPI mode can be used to increase speed. The MT8135 also supports a special feature named "IP Pairing". With IP Pairing the pins of some SoC internal peripherals can be on the PMIC. The signals of these pins are routed over the SPI bus using the pwrap bridge. Because of these optional non SPI conform features the PMIC driver is not implemented as a SPI bus master driver. Signed-off-by: Flora Fu, MediaTek Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2014-09-26soc: add driver for the ARM RealViewLinus Walleij
This adds a SoC driver to be used by the ARM RealView reference boards. We create the "versatile" directory to hold the different ARM reference designs as per the pattern of the clk directory layout. The driver utilze the syscon to get to the register needed. After this we can use sysfs to get at some SoC properties on RealView DT variants like this: > cd /sysbus/soc/devices/soc0 > ls board family machine power subsystem build fpga manufacturer soc_id uevent > cat family Versatile > cat fpga Multi-layer AXI > cat board HBI-0147 > cat build 03 Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Conflicts: drivers/soc/Kconfig drivers/soc/Makefile
2014-09-24soc: ti: add Keystone Navigator QMSS driverSandeep Nair
The QMSS (Queue Manager Sub System) found on Keystone SOCs is one of the main hardware sub system which forms the backbone of the Keystone Multi-core Navigator. QMSS consist of queue managers, packed-data structure processors(PDSP), linking RAM, descriptor pools and infrastructure Packet DMA. The Queue Manager is a hardware module that is responsible for accelerating management of the packet queues. Packets are queued/de-queued by writing or reading descriptor address to a particular memory mapped location. The PDSPs perform QMSS related functions like accumulation, QoS, or event management. Linking RAM registers are used to link the descriptors which are stored in descriptor RAM. Descriptor RAM is configurable as internal or external memory. The QMSS driver manages the PDSP setups, linking RAM regions, queue pool management (allocation, push, pop and notify) and descriptor pool management. The specifics on the device tree bindings for QMSS can be found in: Documentation/devicetree/bindings/soc/keystone-navigator-qmss.txt Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Kumar Gala <galak@codeaurora.org> Cc: Olof Johansson <olof@lixom.net> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Grant Likely <grant.likely@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Sandeep Nair <sandeep_n@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2014-05-23soc: qcom: Add GSBI driverAndy Gross
The GSBI (General Serial Bus Interface) driver controls the overarching configuration of the shared serial bus infrastructure on APQ8064, IPQ8064, and earlier QCOM processors. The GSBI supports UART, I2C, SPI, and UIM functionality in various combinations. Signed-off-by: Andy Gross <agross@codeaurora.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
2014-05-23soc: Introduce drivers/soc place-holder for SOC specific driversSantosh Shilimkar
Based on earlier thread "https://lkml.org/lkml/2013/10/7/662" and discussion at Kernel Summit'2013, it was agreed to create 'driver/soc' for drivers which are quite SOC specific. Further discussion on the subject is in response to the earlier version of the patch is here: http://lwn.net/Articles/588942/ Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Kumar Gala <galak@codeaurora.org> Cc: Paul Walmsley <paul@pwsan.com> Cc: Olof Johansson <olof@lixom.net> Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Sandeep Nair <sandeep_n@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kumar Gala <galak@codeaurora.org>