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Enable IRQ_TYPE_EDGE_BOTH on all R/SH-Mobile ARM SoCs.
This hardware feature is supported by sh7367, sh7377,
sh7372 and sh73a0.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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R-Mobile SoCs such as sh73a0 include PINT blocks in INTC
that come with 2-bit IRQ trigger support. Add code to make
sure the bit width is checked so 4-bit only modes like for
instance EDGE_BOTH will fail for PINT.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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IRQ-capable GPIOs on sh7372 can be configured to produce interrupts on
both edges.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Clear the valid flag is in the INTC code.
Without this fix bit 7 of the sense register
is mistakenly set.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This splits up the sh intc core in to something more vaguely resembling
a subsystem. Most of the functionality was alread fairly well
compartmentalized, and there were only a handful of interdependencies
that needed to be resolved in the process.
This also serves as future-proofing for the genirq and sparseirq rework,
which will make some of the split out functionality wholly generic,
allowing things to be killed off in place with minimal migration pain.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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