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Remove unneeded error handling on the result of a call to
platform_get_resource when the value is passed to devm_ioremap_resource.
Move the call to platform_get_resource adjacent to the call to
devm_ioremap_resource to make the connection between them more clear.
A simplified version of the semantic patch that makes this change is as
follows: (http://coccinelle.lip6.fr/)
// <smpl>
@@
expression pdev,res,n,e,e1;
expression ret != 0;
identifier l;
@@
- res = platform_get_resource(pdev, IORESOURCE_MEM, n);
... when != res
- if (res == NULL) { ... \(goto l;\|return ret;\) }
... when != res
+ res = platform_get_resource(pdev, IORESOURCE_MEM, n);
e = devm_ioremap_resource(e1, res);
// </smpl>
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
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Some drivers don't set the .owner fields of the struct device_driver or
struct pwm_ops, which causes the module usage count to become wrong.
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
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lpc32xx_pwm_config() is supposed to set duty_ns and period_ns,
it should not change PWM_ENABLE bit.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Tested-by: Roland Stigge <stigge@antcom.de>
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
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According to the LPC32x0 User Manual [1]:
For both PWM1 and PWM2 Control Registers:
BIT 31:
This bit gates the PWM_CLK signal and enables the external output pin
to the PWM_PIN_STATE logical level.
0 = PWM disabled. (Default)
1 = PWM enabled
So in lpc32xx_pwm_enable(), we should set PWM_ENABLE bit.
In lpc32xx_pwm_disable(), we should just clear PWM_ENABLE bit rather than
write 0 to the register which will also clear PWMx_RELOADV and PWMx_DUTY bits.
[1] http://www.nxp.com/documents/user_manual/UM10326.pdf
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Tested-by: Roland Stigge <stigge@antcom.de>
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
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A few drivers already annotate this properly. Make the same change for
all other OF supporting drivers.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
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Convert all uses of devm_request_and_ioremap() to the newly introduced
devm_ioremap_resource() which provides more consistent error handling.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Pull pwm changes from Thierry Reding:
"A new driver has been added for the SPEAr platform and the
TWL4030/6030 driver has been replaced by two drivers that control the
regular PWMs and the PWM driven LEDs provided by the chips.
The vt8500, tiecap, tiehrpwm, i.MX, LPC32xx and Samsung drivers have
all been improved and the device tree bindings now support the PWM
signal polarity."
Fix up trivial conflicts due to __devinit/exit removal.
* tag 'for-3.8-rc1' of git://gitorious.org/linux-pwm/linux-pwm: (21 commits)
pwm: samsung: add missing s3c->pwm_id assignment
pwm: lpc32xx: Set the chip base for dynamic allocation
pwm: lpc32xx: Properly disable the clock on device removal
pwm: lpc32xx: Fix the PWM polarity
pwm: i.MX: eliminate build warning
pwm: Export of_pwm_xlate_with_flags()
pwm: Remove pwm-twl6030 driver
pwm: New driver to support PWM driven LEDs on TWL4030/6030 series of PMICs
pwm: New driver to support PWMs on TWL4030/6030 series of PMICs
pwm: pwm-tiehrpwm: pinctrl support
pwm: tiehrpwm: Add device-tree binding
pwm: pwm-tiehrpwm: Adding TBCLK gating support.
pwm: pwm-tiecap: pinctrl support
pwm: tiecap: Add device-tree binding
pwm: Add TI PWM subsystem driver
pwm: Device tree support for PWM polarity
pwm: vt8500: Ensure PWM clock is enabled during pwm_config
pwm: vt8500: Fix build error
pwm: spear: Staticize spear_pwm_config()
pwm: Add SPEAr PWM chip driver support
...
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Doing so allows the base to be allocated dynamically at runtime and
makes it easier for the chip to coexist with other PWM chips.
Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de>
Acked-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Acked-by: Roland Stigge <stigge@antcom.de>
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
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A single clock is used for all PWMs meaning the clock's reference count
might be between 0 and N when .remove() is called. Instead of a single
clk_disable() call pwm_disable() on each PWM, to ensure that
clk_disable() is called for each PWM that is still enabled.
Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de>
Acked-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Acked-by: Roland Stigge <stigge@antcom.de>
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
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The duty cycles value goes from 1 (99% HIGH) to 256 (0% HIGH) but it
is stored modulo 256 in the register as it is only 8 bits wide.
Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de>
Acked-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Acked-by: Roland Stigge <stigge@antcom.de>
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
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CONFIG_HOTPLUG is going away as an option so __devexit is no
longer needed.
Signed-off-by: Bill Pemberton <wfp5p@virginia.edu>
Acked-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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CONFIG_HOTPLUG is going away as an option so __devexit_p is no longer
needed.
Signed-off-by: Bill Pemberton <wfp5p@virginia.edu>
Acked-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Add lpc32xx SOC PWM driver.
Signed-off-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Acked-by: Roland Stigge <stigge@antcom.de>
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
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