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Some RAPL domains may not be active at the time driver is being
loaded. Checking energy counter increment may be too strict and
time consuming. So relax the sanity check on energy counters of
these domains.
Otherwise, they may be ignored and become unavailable to the
powercap framework.
Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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This patch adds support for RAPL on Intel ValleyView based SoC
platforms, such as Baytrail.
Besides adding CPU ID, special energy unit encoding is handled
for ValleyView.
Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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As per the documentation of powercap sysfs, energy_uj field is read only,
if it can't be reset. Currently it always allows write but will fail,
if there is no reset callback.
Changing mode field, to read only if there is no reset callback.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Reported-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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Fix compile error with gcc option: -Werror=format-security for
dev_set_name(&control_type->dev, name).
Changed to dev_set_name(&control_type->dev, "%s", name).
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Acked-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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The newly added power capping framework uses the obsolete .dev_attrs
field of struct class. However this field will be removed in 3.13, so
convert the code to use the .dev_groups field instead.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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The Intel Running Average Power Limit (RAPL) technology provides platform
software with the ability to monitor, control, and get notifications on
power usage.
This feature is present in all Sandy Bridge and later Intel processors.
Newer models allow more fine grained controls to be applied. In RAPL,
power control is divided into domains, which include package, DRAM
controller, CPU core (Power Plane 0), graphics uncore (power plane 1), etc.
The purpose of this driver is to expose the RAPL settings to userspace.
Overall, RAPL fits in the new powercap class driver in that platform
level power capping controls are exposed via this generic interface.
This driver is based on an earlier patch from Zhang Rui.
However, while the previous work was mainly focused on thermal monitoring
the focus here is on the usability from user space perspective.
References: https://lkml.org/lkml/2011/5/26/93
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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The power capping framework providing a consistent interface between the
kernel and user space that allows power capping drivers to expose their
settings to user space in a uniform way.
The overall design of the framework is described in the documentation
added by the previous patch in this series.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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