Age | Commit message (Collapse) | Author |
|
Fix the pin-mux values for the MDC, MDIO, MDIO_INTL, PHYRSTL pins.
Fixes: 1e359ab1285e ("pinctrl: uniphier: add Ethernet pin-mux settings")
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
Add the following Ethernet interfaces:
PH1-LD4: MII, RMII
PH1-Pro4: MII, RMII, RGMII
PH1-sLD8: MII, RMII (Built-in PHY is also supported)
ProXstream2: MII, RMII, RGMII
PH1-LD6b: RMII, RGMII
PH1-LD11: RMII (Built-in PHY is also supported)
PH1-LD20: RMII, RGMII
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
My mistake in the initial support patches.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
Add pin configuration and pinmux support for UniPhier PH1-LD20 SoC.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|