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Age	Commit message (Collapse)	Author
2017-04-10	phy: bcm-ns-usb3: split all writes into reg & val pairs	Rafał Miłecki
	So far all the PHY initialization was implemented using some totally magic values. There was some pattern there but it wasn't clear what is it about. Thanks to the patch submitted by Broadcom: [PATCH 5/6] phy: Add USB3 PHY support for Broadcom NSP SoC and the upstream "iproc-mdio" driver we now know there is a MDIO bus underneath with PHY(s) and their registers. It allows us to clean the driver a bit by making all these values less magical. The next step is switching to using a proper MDIO layer. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Acked-by: Jon Mason <jon.mason@broadcom.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2016-09-10	phy: bcm-ns-usb3: new driver for USB 3.0 PHY on Northstar	Rafał Miłecki
	Northstar is a family of SoCs used in home routers. They have USB 2.0 and 3.0 controllers with PHYs that need to be properly initialized. This driver provides PHY init support in a generic way and can be bound with XHCI controller driver. There aren't any public datasheets from Broadcom so we can't have nice defines for all used bits. It means we just follow Broadcom's initialization procedure using their magic values. We were quite lucky actually that Broadcom put some comments in their SDK reference code explaining what given writes are responsible for. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>