| Age | Commit message (Expand) | Author |
|---|
| 2009-03-17 | x86, x2apic: enable fault handling for intr-remapping | Suresh Siddha |
| 2009-03-17 | x86, dmar: move page fault handling code to dmar.c | Suresh Siddha |
| 2009-03-01 | Merge branch 'x86/urgent' into x86/pat | Ingo Molnar |
| 2009-02-14 | intel-iommu: fix endless "Unknown DMAR structure type" loop | Tony Battersby |
| 2009-02-11 | pci, x86, acpi: fix early_ioremap() leak | Yinghai Lu |
| 2009-02-09 | VT-d: handle Invalidation Queue Error to avoid system hang | Yu Zhao |
| 2009-02-09 | intel-iommu: fix build error with INTR_REMAP=y and DMAR=n | Joerg Roedel |
| 2009-01-03 | calculate agaw for each iommu | Weidong Han |
| 2009-01-03 | VT-d: fix segment number being ignored when searching DRHD | Yu Zhao |
| 2008-10-21 | Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/torvalds... | David Woodhouse |
| 2008-10-20 | Merge branch 'genirq-v28-for-linus' of git://git.kernel.org/pub/scm/linux/ker... | Linus Torvalds |
| 2008-10-18 | dmar: fix uninitialised 'ret' variable in dmar_parse_dev() | David Woodhouse |
| 2008-10-18 | intel-iommu: IA64 support | Fenghua Yu |
| 2008-10-17 | dmar: remove the quirk which disables dma-remapping when intr-remapping enabled | Youquan Song |
| 2008-10-17 | dmar: context cache and IOTLB invalidation using queued invalidation | Youquan Song |
| 2008-10-17 | dmar: use spin_lock_irqsave() in qi_submit_sync() | Suresh Siddha |
| 2008-10-16 | dmar: fix dmar_parse_dev() devices_cnt error condition check | Suresh Siddha |
| 2008-10-16 | dmar: use list_for_each_entry_safe() in dmar_dev_scope_init() | Suresh Siddha |
| 2008-10-16 | dmar: initialize the return value in dmar_parse_dev() | Yinghai Lu |
| 2008-10-16 | dmar: fix using early fixmap mapping for DMAR table parsing | Yinghai Lu |
| 2008-10-15 | VT-d: Changes to support KVM | Kay, Allen M |
| 2008-07-12 | x64, x2apic/intr-remap: disable DMA-remapping if Interrupt-remapping is detec... | Suresh Siddha |
| 2008-07-12 | x64, x2apic/intr-remap: Interrupt remapping infrastructure | Suresh Siddha |
| 2008-07-12 | x64, x2apic/intr-remap: Queued invalidation infrastructure (part of VT-d) | Suresh Siddha |
| 2008-07-12 | x64, x2apic/intr-remap: parse ioapic scope under vt-d structures | Suresh Siddha |
| 2008-07-12 | x64, x2apic/intr-remap: Fix the need for RMRR in the DMA-remapping detection | Suresh Siddha |
| 2008-07-12 | x64, x2apic/intr-remap: use CONFIG_DMAR for DMA-remapping specific code | Suresh Siddha |
| 2008-07-12 | x64, x2apic/intr-remap: code re-structuring, to be used by both DMA and Inter... | Suresh Siddha |
| 2008-07-12 | x64, x2apic/intr-remap: fix the need for sequential array allocation of iommus | Suresh Siddha |
| 2008-07-12 | x64, x2apic/intr-remap: Intel vt-d, IOMMU code reorganization | Suresh Siddha |
| 2008-02-23 | copyright owner and author clean up for intel iommu and related files | mark gross |
| 2008-02-06 | Genericizing iova.[ch] | David Miller |
| 2008-02-01 | PCI: More Sanity checks for DMAR | Fenghua Yu |
| 2007-10-22 | Intel IOMMU: DMAR detection and parsing logic | Keshavamurthy, Anil S |
