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path: root/drivers/ntb/hw
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2016-08-05NTB: ntb_hw_intel: use local variable pdevAllen Hubbe
Clean up duplicated expression by replacing it with the equivalent local variable pdev. Signed-off-by: Allen Hubbe <Allen.Hubbe@emc.com> Acked-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Jon Mason <jdmason@kudzu.us>
2016-08-05NTB: ntb_hw_intel: show BAR size in debugfs infoAllen Hubbe
It will be useful to know the hardware configured BAR size to diagnose issues with NTB memory windows. Signed-off-by: Allen Hubbe <Allen.Hubbe@emc.com> Acked-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Jon Mason <jdmason@kudzu.us>
2016-03-26NTB: Remove _addr functions from ntb_hw_amdAllen Hubbe
Kernel zero day testing warned about address space confusion. A virtual iomem address was used where a physical address is expected. The offending functions implement an optional part of the api, so they are removed. They can be added later, after testing. Fixes: a1b3695820aa490e58915d720a1438069813008b Signed-off-by: Allen Hubbe <Allen.Hubbe@emc.com> Acked-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Jon Mason <jdmason@kudzu.us>
2016-01-21NTB: Fix macro parameter conflict with field nameAllen Hubbe
If the parameter given to the macro is replaced throughout the macro as it is evaluated. The intent is that the macro parameter should replace the only the first parameter to container_of(). However, the way the macro was written, it would also inadvertantly replace a structure field name. If a parameter of any other name is given to the macro, it will fail to compile, if the structure does not contain a field of the same name. At worst, it will compile, and hide improper access of an unintended field in the structure. Change the macro parameter name, so it does not conflict with the structure field name. Signed-off-by: Allen Hubbe <Allen.Hubbe@emc.com> Acked-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Jon Mason <jdmason@kudzu.us>
2016-01-21NTB: Add support for AMD PCI-Express Non-Transparent BridgeXiangliang Yu
This adds support for AMD's PCI-Express Non-Transparent Bridge (NTB) device on the Zeppelin platform. The driver connnects to the standard NTB sub-system interface, with modification to add hooks for power management in a separate patch. The AMD NTB device has 3 memory windows, 16 doorbell, 16 scratch-pad registers, and supports up to 16 PCIe lanes running a Gen3 speeds. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Allen Hubbe <Allen.Hubbe@emc.com> Signed-off-by: Jon Mason <jdmason@kudzu.us>
2016-01-11NTB: Clear property bits in BAR valueDave Jiang
The lower bits read from a BAR register will contain property bits that we do not care about. Clear those so that we can use the BAR values for limit and xlat registers. Reported-by: Conrad Meyer <cem@freebsd.org> Signed-off-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Jon Mason <jdmason@kudzu.us>
2015-11-08NTB: unify translation addressesDave Jiang
There is no need for the upstream and downstream addresses to be different for the NTB configs. Go to using a single set of address. It is still possible to configure them differently using module parameter override however. Signed-off-by: Dave Jiang <dave.jiang@intel.com> Acked and Tested-by: Allen Hubbe <Allen.Hubbe@emc.com> Signed-off-by: Jon Mason <jdmason@kudzu.us>
2015-09-07NTB: Fix range check on memory window indexAllen Hubbe
The range check must exclude the upper bound. Signed-off-by: Allen Hubbe <Allen.Hubbe@emc.com> Signed-off-by: Jon Mason <jdmason@kudzu.us>
2015-09-07NTB: Improve index handling in B2B MW workaroundAllen Hubbe
Check that b2b_mw_idx is in range of the number of memory windows when initializing the device. The workaround is considered to be in effect only if the device b2b_idx is exactly UINT_MAX, instead of any index past the last memory window. Only print B2B MW workaround information in debugfs if the workaround is in effect. Signed-off-by: Allen Hubbe <Allen.Hubbe@emc.com> Signed-off-by: Jon Mason <jdmason@kudzu.us>
2015-09-07NTB: Add PCI Device IDs for Broadwell XeonDave Jiang
Adding PCI Device IDs for B2B (back to back), RP (root port, primary), and TB (transparent bridge, secondary) devices. Signed-off-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Jon Mason <jdmason@kudzu.us>
2015-07-04NTB: Add split BAR output for debugfs statsDave Jiang
When split BAR is enabled, the driver needs to dump out the split BAR registers rather than the original 64bit BAR registers. Signed-off-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Jon Mason <jdmason@kudzu.us>
2015-07-04NTB: Change WARN_ON_ONCE to pr_warn_once on unsafeDave Jiang
The unsafe doorbell and scratchpad access should display reason when WARN is called. Otherwise we get a stack dump without any explanation. Signed-off-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Jon Mason <jdmason@kudzu.us>
2015-07-04NTB: Print driver name and version in module initDave Jiang
Printouts driver name and version to indicate what is being loaded. Signed-off-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Jon Mason <jdmason@kudzu.us>
2015-07-04NTB: Rename Intel code names to platform namesDave Jiang
Instead of using the platform code names, use the correct platform names to identify the respective Intel NTB hardware. Signed-off-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Jon Mason <jdmason@kudzu.us>
2015-07-04NTB: Use NUMA memory in Intel driverAllen Hubbe
Allocate memory for the NUMA node of the NTB device. Signed-off-by: Allen Hubbe <Allen.Hubbe@emc.com> Signed-off-by: Jon Mason <jdmason@kudzu.us>
2015-07-04NTB: Add parameters for Intel SNB B2B addressesAllen Hubbe
Add module parameters for the addresses to be used in B2B topology. Signed-off-by: Allen Hubbe <Allen.Hubbe@emc.com> Signed-off-by: Jon Mason <jdmason@kudzu.us>
2015-07-04NTB: Check the device ID to set errata flagsDave Jiang
Set errata flags for the specific device IDs to which they apply, instead of the whole Xeon hardware class. Signed-off-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Jon Mason <jdmason@kudzu.us>
2015-07-04NTB: Enable link for Intel root port mode in probeDave Jiang
Link training should be enabled in the driver probe for root port mode. We should not have to wait for transport to be loaded for this to happen. Otherwise the ntb device will not show up on the transparent bridge side of the link. Signed-off-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Jon Mason <jdmason@kudzu.us>
2015-07-04NTB: Split ntb_hw_intel and ntb_transport driversAllen Hubbe
Change ntb_hw_intel to use the new NTB hardware abstraction layer. Split ntb_transport into its own driver. Change it to use the new NTB hardware abstraction layer. Signed-off-by: Allen Hubbe <Allen.Hubbe@emc.com> Signed-off-by: Jon Mason <jdmason@kudzu.us>
2015-07-02NTB: Move files in preparation for NTB abstractionAllen Hubbe
This patch only moves files to their new locations, before applying the next two patches adding the NTB Abstraction layer. Splitting this patch from the next is intended make distinct which code is changed only due to moving the files, versus which are substantial code changes in adding the NTB Abstraction layer. Signed-off-by: Allen Hubbe <Allen.Hubbe@emc.com> Signed-off-by: Jon Mason <jdmason@kudzu.us>