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path: root/drivers/net/ethernet
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2021-03-16dpaa2-switch: reduce the size of the if_id bitmap to 64 bitsIoana Ciornei
The maximum number of DPAA2 switch interfaces, including the control interface, is 64. Even though this restriction existed from the first place, the command structures which use an interface id bitmap were poorly described and even though a single uint64_t is enough, all of them used an array of 4 uint64_t's. Fix this by reducing the size of the interface id field to a single uint64_t. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-16dpaa2-switch: fix kdoc warningsIoana Ciornei
Running kernel-doc over the dpaa2-switch driver generates a bunch of warnings. Fix them up by removing code comments for macros which are self-explanatory and adding a bit more context for the dpsw_if_get_port_mac_addr() function and the fields of the dpsw_vlan_if_cfg structure. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-16dpaa2-switch: remove unused ABI functionsIoana Ciornei
Cleanup the dpaa2-switch driver a bit by removing any unused MC firmware ABI definitions. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-16Merge branch '1GbE' of ↵David S. Miller
git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queue Tony Nguyen says: ==================== 1GbE Intel Wired LAN Driver Updates 2021-03-15 This series contains updates to e1000e only. Chen Yu says: The NIC is put in runtime suspend status when there is no cable connected. As a result, it is safe to keep non-wakeup NIC in runtime suspended during s2ram because the system does not rely on the NIC plug event nor WoL to wake up the system. Besides that, unlike the s2idle, s2ram does not need to manipulate S0ix settings during suspend. ==================== Acked-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-15ionic: aggregate Tx byte counting callsShannon Nelson
Gather the Tx packet and byte counts and call netdev_tx_completed_queue() only once per clean cycle. Signed-off-by: Shannon Nelson <snelson@pensando.io> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-15ionic: simplify tx cleanShannon Nelson
The descriptor mappings are set up the same way whether or not it is a TSO, so we don't need separate logic for the two cases. Signed-off-by: Shannon Nelson <snelson@pensando.io> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-15ionic: generic tx skb mappingShannon Nelson
Make the new ionic_tx_map_tso() usable by the non-TSO paths, and pull the call up a level into ionic_tx() before calling the csum or no-csum routines. Signed-off-by: Shannon Nelson <snelson@pensando.io> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-15ionic: simplify TSO descriptor mappingShannon Nelson
One issue with the original TSO code was that it was working too hard to deal with skb layouts that were never going to show up, such as an skb->data that was longer than a single descriptor's length. The other issue was trying to arrange the fragment dma mapping at the same time as figuring out the descriptors needed. There was just too much going on at the same time. Now we do the dma mapping first, which sets up the buffers with skb->data in buf[0] and the remaining frags in buf[1..n-1]. Next we spread the bufs across the descriptors needed, where each descriptor gets up to mss number of bytes. Signed-off-by: Shannon Nelson <snelson@pensando.io> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-15net: qualcomm: rmnet: don't use C bit-fields in rmnet checksum headerAlex Elder
Replace the use of C bit-fields in the rmnet_map_ul_csum_header structure with a single two-byte (big endian) structure member, and use masks to encode or get values within it. The content of these fields can be accessed using simple bitwise AND and OR operations on the (host byte order) value of the new structure member. Previously rmnet_map_ipv4_ul_csum_header() would update C bit-field values in host byte order, then forcibly fix their byte order using a combination of byte swap operations and types. Instead, just compute the value that needs to go into the new structure member and save it with a simple byte-order conversion. Make similar simplifications in rmnet_map_ipv6_ul_csum_header(). Finally, in rmnet_map_checksum_uplink_packet() a set of assignments zeroes every field in the upload checksum header. Replace that with a single memset() operation. Signed-off-by: Alex Elder <elder@linaro.org> Reviewed-by: Alexander Duyck <alexanderduyck@fb.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-15net: qualcomm: rmnet: don't use C bit-fields in rmnet checksum trailerAlex Elder
Replace the use of C bit-fields in the rmnet_map_dl_csum_trailer structure with a single one-byte field, using constant field masks to encode or get at embedded values. Signed-off-by: Alex Elder <elder@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Alexander Duyck <alexanderduyck@fb.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-15net: qualcomm: rmnet: use masks instead of C bit-fieldsAlex Elder
The actual layout of bits defined in C bit-fields (e.g. int foo : 3) is implementation-defined. Structures defined in <linux/if_rmnet.h> address this by specifying all bit-fields twice, to cover two possible layouts. I think this pattern is repetitive and noisy, and I find the whole notion of compiler "bitfield endianness" to be non-intuitive. Stop using C bit-fields for the command/data flag and the pad length fields in the rmnet_map structure, and define a single-byte flags field instead. Define a mask for the single-bit "command" flag, and another mask for the encoded pad length. The content of both fields can be accessed using a simple bitwise AND operation. Signed-off-by: Alex Elder <elder@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Alexander Duyck <alexanderduyck@fb.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-15net: qualcomm: rmnet: kill RMNET_MAP_GET_*() accessor macrosAlex Elder
The following macros, defined in "rmnet_map.h", assume a socket buffer is provided as an argument without any real indication this is the case. RMNET_MAP_GET_MUX_ID() RMNET_MAP_GET_CD_BIT() RMNET_MAP_GET_PAD() RMNET_MAP_GET_CMD_START() RMNET_MAP_GET_LENGTH() What they hide is pretty trivial accessing of fields in a structure, and it's much clearer to see this if we do these accesses directly. So rather than using these accessor macros, assign a local variable of the map header pointer type to the socket buffer data pointer, and derereference that pointer variable. In "rmnet_map_data.c", use sizeof(object) rather than sizeof(type) in one spot. Also, there's no need to byte swap 0; it's all zeros irrespective of endianness. Signed-off-by: Alex Elder <elder@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Alexander Duyck <alexanderduyck@fb.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-15net: qualcomm: rmnet: simplify some byte order logicAlex Elder
In rmnet_map_ipv4_ul_csum_header() and rmnet_map_ipv6_ul_csum_header() the offset within a packet at which checksumming should commence is calculated. This calculation involves byte swapping and a forced type conversion that makes it hard to understand. Simplify this by computing the offset in host byte order, then converting the result when assigning it into the header field. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-15e1000e: Remove the runtime suspend restriction on CNP+Chen Yu
Although there is platform issue of runtime suspend support on CNP, it would be more flexible to let the user decide whether to disable runtime or not because: 1. This can be done in userspace via echo on > /sys/devices/pci0000\:00/0000\:00\:1f.d/power/control 2. More and more NICs would support runtime suspend, disabling the runtime suspend on them by default would impact the validation. Only disable runtime suspend on CNP in case of any user space regression. Signed-off-by: Chen Yu <yu.c.chen@intel.com> Tested-by: Dvora Fuxbrumer <dvorax.fuxbrumer@linux.intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
2021-03-15e1000e: Leverage direct_complete to speed up s2ramChen Yu
The NIC is put in runtime suspend status when there is no cable connected. As a result, it is safe to keep non-wakeup NIC in runtime suspended during s2ram because the system does not rely on the NIC plug event nor WoL to wake up the system. Besides that, unlike the s2idle, s2ram does not need to manipulate S0ix settings during suspend. This patch introduces the .prepare() for e1000e so that if the NIC is runtime suspended the subsequent suspend/resume hooks will be skipped so as to speed up the s2ram. The pm core will check whether the NIC is a wake up device so there's no need to check it again in .prepare(). DPM_FLAG_SMART_PREPARE flag should be set during probe to ask the pci subsystem to honor the driver's prepare() result. Besides, the NIC remains runtime suspended after resumed from s2ram as there is no need to resume it. Tested on i7-2600K with 82579V NIC Before the patch: e1000e 0000:00:19.0: pci_pm_suspend+0x0/0x160 returned 0 after 225146 usecs e1000e 0000:00:19.0: pci_pm_resume+0x0/0x90 returned 0 after 140588 usecs After the patch: echo disabled > //sys/devices/pci0000\:00/0000\:00\:19.0/power/wakeup becomes 0 usecs because the hooks will be skipped. Suggested-by: Kai-Heng Feng <kai.heng.feng@canonical.com> Signed-off-by: Chen Yu <yu.c.chen@intel.com> Tested-by: Dvora Fuxbrumer <dvorax.fuxbrumer@linux.intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
2021-03-15net: stmmac: dwmac-imx: add platform level clocks management for i.MXJoakim Zhang
Split clocks settings from init callback into clks_config callback, which could support platform level clocks management. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-15net: stmmac: add platform level clocks managementJoakim Zhang
This patch intends to add platform level clocks management. Some platforms may have their own special clocks, they also need to be managed dynamically. If you want to manage such clocks, please implement clks_config callback. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-15net: stmmac: add clocks management for gmac driverJoakim Zhang
This patch intends to add clocks management for stmmac driver: If CONFIG_PM enabled: 1. Keep clocks disabled after driver probed. 2. Enable clocks when up the net device, and disable clocks when down the net device. If CONFIG_PM disabled: Keep clocks always enabled after driver probed. Note: 1. It is fine for ethtool, since the way of implementing ethtool_ops::begin in stmmac is only can be accessed when interface is enabled, so the clocks are ticked. 2. The MDIO bus has a different life cycle to the MAC, need ensure clocks are enabled when _mdio_read/write() need clocks, because these functions can be called while the interface it not opened. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-15stmmac: intel: add pcs-xpcs for Intel mGbE controllerOng Boon Leong
Intel mGbE controller such as those in EHL & TGL uses pcs-xpcs driver for SGMII interface. To ensure mdio bus scanning does not assign phy_device to MDIO-addressable entities like intel serdes and pcs-xpcs, we set up to phy_mask to skip them. Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-15net: stmmac: ensure phydev is attached to phylink for C37 ANOng Boon Leong
As the support for MAC-side SGMII C37 AN is added to pcs-xpcs, phydev should be attached to phylink during driver's open(). So, we change the condition to "Not C73 AN" instead. Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-15net: stmmac: make in-band AN mode parsing is supported for non-DTOng Boon Leong
Not all platform uses DT, so phylink_parse_mode() will skip in-band setup of pl->supported and pl->link_config.advertising entirely. So, we add the setting of ovr_an_inband flag to make it works for non-DT platform. Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-15net: ethernet: neterion: Fix a typo in the file s2io.cBhaskar Chowdhury
s/structue/structure/ Signed-off-by: Bhaskar Chowdhury <unixbhaskar@gmail.com> Acked-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-15net: ethernet: intel: igb: Typo fix in the file igb_main.cBhaskar Chowdhury
s/structue/structure/ Signed-off-by: Bhaskar Chowdhury <unixbhaskar@gmail.com> Acked-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-15ethernet: amazon: ena: A typo fix in the file ena_com.hBhaskar Chowdhury
Mundane typo fix. Signed-off-by: Bhaskar Chowdhury <unixbhaskar@gmail.com> Acked-by: Randy Dunlap <rdunlap@infradead.org> Acked-by: Shay Agroskin <shayagr@amazon.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-15ice: optimize for XDP_REDIRECT in xsk pathMagnus Karlsson
Optimize ice_run_xdp_zc() for the XDP program verdict being XDP_REDIRECT in the xsk zero-copy path. This path is only used when having AF_XDP zero-copy on and in that case most packets will be directed to user space. This provides a little over 100k extra packets in throughput on my server when running l2fwd in xdpsock. Signed-off-by: Magnus Karlsson <magnus.karlsson@intel.com> Tested-by: George Kuruvinakunnel <george.kuruvinakunnel@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
2021-03-15ixgbe: optimize for XDP_REDIRECT in xsk pathMagnus Karlsson
Optimize ixgbe_run_xdp_zc() for the XDP program verdict being XDP_REDIRECT in the xsk zero-copy path. This path is only used when having AF_XDP zero-copy on and in that case most packets will be directed to user space. This provides a little under 100k extra packets in throughput on my server when running l2fwd in xdpsock. Signed-off-by: Magnus Karlsson <magnus.karlsson@intel.com> Tested-by: Vishakha Jambekar <vishakha.jambekar@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
2021-03-15i40e: optimize for XDP_REDIRECT in xsk pathMagnus Karlsson
Optimize i40e_run_xdp_zc() for the XDP program verdict being XDP_REDIRECT in the xsk zero-copy path. This path is only used when having AF_XDP zero-copy on and in that case most packets will be directed to user space. This provides a little over 100k extra packets in throughput on my server when running l2fwd in xdpsock. Signed-off-by: Magnus Karlsson <magnus.karlsson@intel.com> Tested-by: George Kuruvinakunnel <george.kuruvinakunnel@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
2021-03-14mlxsw: spectrum: Report extra metadata to psample moduleIdo Schimmel
Make use of the previously added metadata and report it to the psample module. The metadata is read from the skb's control block, which was initialized by the bus driver (i.e., 'mlxsw_pci') after decoding the packet's Completion Queue Element (CQE). Signed-off-by: Ido Schimmel <idosch@nvidia.com> Reviewed-by: Jiri Pirko <jiri@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-14mlxsw: spectrum: Remove mlxsw_sp_sample_receive()Ido Schimmel
The function resolves the psample sampling group from the Rx port because this is the only form of sampling the driver currently supports. Subsequent patches are going to add support for Tx-based and policy-based sampling, in which case the sampling group would not be resolved from the Rx port. Therefore, move this code to the Rx-specific sampling listener. Signed-off-by: Ido Schimmel <idosch@nvidia.com> Reviewed-by: Jiri Pirko <jiri@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-14mlxsw: spectrum: Remove unnecessary RCU read-side critical sectionIdo Schimmel
Since commit 7d8e8f3433dc ("mlxsw: core: Increase scope of RCU read-side critical section"), all Rx handlers are called from an RCU read-side critical section. Remove the unnecessary rcu_read_lock() / rcu_read_unlock(). Signed-off-by: Ido Schimmel <idosch@nvidia.com> Reviewed-by: Jiri Pirko <jiri@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-14mlxsw: pci: Set extra metadata in skb control blockIdo Schimmel
Packets that are mirrored / sampled to the CPU have extra metadata encoded in their corresponding Completion Queue Element (CQE). Retrieve this metadata from the CQE and set it in the skb control block so that it could be accessed by the switch driver (i.e., 'mlxsw_spectrum'). Signed-off-by: Ido Schimmel <idosch@nvidia.com> Reviewed-by: Jiri Pirko <jiri@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-14mlxsw: Create dedicated field for Rx metadata in skb control blockIdo Schimmel
Next patch will need to encode more Rx metadata in the skb control block, so create a dedicated field for it and move the cookie index there. Signed-off-by: Ido Schimmel <idosch@nvidia.com> Reviewed-by: Jiri Pirko <jiri@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-14mlxsw: pci: Add more metadata fields to CQEv2Ido Schimmel
The Completion Queue Element version 2 (CQEv2) includes various metadata fields for packets that are mirrored / sampled to the CPU. Add these fields so that they could be used by a later patch. Signed-off-by: Ido Schimmel <idosch@nvidia.com> Reviewed-by: Jiri Pirko <jiri@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-14psample: Encapsulate packet metadata in a structIdo Schimmel
Currently, callers of psample_sample_packet() pass three metadata attributes: Ingress port, egress port and truncated size. Subsequent patches are going to add more attributes (e.g., egress queue occupancy), which also need an indication whether they are valid or not. Encapsulate packet metadata in a struct in order to keep the number of arguments reasonable. Signed-off-by: Ido Schimmel <idosch@nvidia.com> Reviewed-by: Jiri Pirko <jiri@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-13net: stmmac: Set FIFO sizes for ipq806xJonathan McDowell
Commit eaf4fac47807 ("net: stmmac: Do not accept invalid MTU values") started using the TX FIFO size to verify what counts as a valid MTU request for the stmmac driver. This is unset for the ipq806x variant. Looking at older patches for this it seems the RX + TXs buffers can be up to 8k, so set appropriately. (I sent this as an RFC patch in June last year, but received no replies. I've been running with this on my hardware (a MikroTik RB3011) since then with larger MTUs to support both the internal qca8k switch and VLANs with no problems. Without the patch it's impossible to set the larger MTU required to support this.) Signed-off-by: Jonathan McDowell <noodles@earth.li> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-13net: ethernet: marvell: Fixed typo in the file sky2.cBhaskar Chowdhury
s/calclation/calculation/ Signed-off-by: Bhaskar Chowdhury <unixbhaskar@gmail.com> Acked-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-13flow_offload: reject configuration of packet-per-second policing in offload ↵Baowen Zheng
drivers A follow-up patch will allow users to configures packet-per-second policing in the software datapath. In preparation for this, teach all drivers that support offload of the policer action to reject such configuration as currently none of them support it. Signed-off-by: Baowen Zheng <baowen.zheng@corigine.com> Signed-off-by: Simon Horman <simon.horman@netronome.com> Signed-off-by: Louis Peens <louis.peens@netronome.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-13net: hns3: add phy loopback support for imp-controlled PHYsGuangbin Huang
If the imp-controlled PHYs feature is enabled, driver can not call phy driver interface to set loopback anymore and needs to send command to firmware to start phy loopback. Driver reuses the existing firmware command 0x0315 to start phy loopback, just add a setting bit in this command. As this command is not only for serdes loopback anymore, rename this command to "xxx_COMMON_LOOPBACK", and modify function name, macro name and logs related to it. Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-13net: hns3: add ioctl support for imp-controlled PHYsGuangbin Huang
When the imp-controlled PHYs feature is enabled, driver will not register mdio bus. In order to support ioctl ops for phy tool to read or write phy register in this case, the firmware implement a new command for driver and driver implement ioctl by using this new command. Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-13net: hns3: add get/set pause parameters support for imp-controlled PHYsGuangbin Huang
When the imp-controlled PHYs feature is enabled, phydev is NULL. In this case, the autoneg is always off when user uses ethtool -a command to get pause parameters because hclge_get_pauseparam() uses phydev to check whether device is TP port. To fit this new feature, use media type to check whether device is TP port. And when user set pause parameters, these parameters need to always set to mac, no matter whether autoneg is off. Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-13net: hns3: add support for imp-controlled PHYsGuangbin Huang
IMP(Intelligent Management Processor) firmware add a new feature to take control of PHYs for some new devices, PF driver adds support for this feature. Driver queries device's capability to check whether IMP supports this feature, it will tell IMP to enable this feature by firmware compatible command if it is supported. Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-12sh_eth: place RX/TX descriptor *enum*s after their *struct*sSergey Shtylyov
Place the RX/TX descriptor bit *enum*s where they belong -- after the corresponding RX/TX descriptor *struct*s and, while at it, switch to declaring one *enum* entry per line... Signed-off-by: Sergey Shtylyov <s.shtylyov@omprussia.ru> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-12sh_eth: rename *enum*s still not matching register namesSergey Shtylyov
Finally, rename the rest of the *enum* tags still not (exactly) matching the abbreviated register names from the manuals... Signed-off-by: Sergey Shtylyov <s.shtylyov@omprussia.ru> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-12sh_eth: rename PSR bitsSergey Shtylyov
In all the SoC manuals (except R-Car gen2) the PHY status register's name is abbreviated to PSR with the only valid bit 0 named LMON. Follow the suit and rename the corresponding *enum* tag/entry. Signed-off-by: Sergey Shtylyov <s.shtylyov@omprussia.ru> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-12sh_eth: rename TRSCER bitsSergey Shtylyov
In all the SoC manuals the TRSCER register bits match the corresponding EESR registers's bits, but only on the R-Car gen2 SoC those are named RINT<n> and TINT<n>. Follow the suit and rename the *enum* tag/entries from DESC_I_* to TRSCER_*. Signed-off-by: Sergey Shtylyov <s.shtylyov@omprussia.ru> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-12ptp_pch: Move 'pch_*()' prototypes to shared headerLee Jones
Fixes the following W=1 kernel build warning(s): drivers/ptp/ptp_pch.c:193:6: warning: no previous prototype for ‘pch_ch_control_write’ [-Wmissing-prototypes] drivers/ptp/ptp_pch.c:201:5: warning: no previous prototype for ‘pch_ch_event_read’ [-Wmissing-prototypes] drivers/ptp/ptp_pch.c:212:6: warning: no previous prototype for ‘pch_ch_event_write’ [-Wmissing-prototypes] drivers/ptp/ptp_pch.c:220:5: warning: no previous prototype for ‘pch_src_uuid_lo_read’ [-Wmissing-prototypes] drivers/ptp/ptp_pch.c:231:5: warning: no previous prototype for ‘pch_src_uuid_hi_read’ [-Wmissing-prototypes] drivers/ptp/ptp_pch.c:242:5: warning: no previous prototype for ‘pch_rx_snap_read’ [-Wmissing-prototypes] drivers/ptp/ptp_pch.c:259:5: warning: no previous prototype for ‘pch_tx_snap_read’ [-Wmissing-prototypes] drivers/ptp/ptp_pch.c:300:5: warning: no previous prototype for ‘pch_set_station_address’ [-Wmissing-prototypes] Cc: Richard Cochran <richardcochran@gmail.com> (maintainer:PTP HARDWARE CLOCK SUPPORT) Cc: "David S. Miller" <davem@davemloft.net> Cc: Jakub Kicinski <kuba@kernel.org> Cc: Flavio Suligoi <f.suligoi@asem.it> Cc: netdev@vger.kernel.org Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-12ptp_pch: Remove unused function 'pch_ch_control_read()'Lee Jones
Fixes the following W=1 kernel build warning(s): drivers/ptp/ptp_pch.c:182:5: warning: no previous prototype for ‘pch_ch_control_read’ [-Wmissing-prototypes] Cc: Richard Cochran <richardcochran@gmail.com> (maintainer:PTP HARDWARE CLOCK SUPPORT) Cc: "David S. Miller" <davem@davemloft.net> Cc: Jakub Kicinski <kuba@kernel.org> Cc: Flavio Suligoi <f.suligoi@asem.it> Cc: netdev@vger.kernel.org Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-12net: broadcom: bcm4908_enet: support TX interruptRafał Miłecki
It appears that each DMA channel has its own interrupt and both rings can be configured (the same way) to handle interrupts. 1. Make ring interrupts code generic (make it operate on given ring) 2. Move napi to ring (so each has its own) 3. Make IRQ handler generic (match ring against received IRQ number) 4. Add (optional) support for TX interrupt Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-12net: macb: Disable PCS auto-negotiation for SGMII fixed-link modeRobert Hancock
When using a fixed-link configuration in SGMII mode, it's not really sensible to have auto-negotiation enabled since the link settings are fixed by definition. In other configurations, such as an SGMII connection to a PHY, it should generally be enabled. Signed-off-by: Robert Hancock <robert.hancock@calian.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-12net: macb: poll for fixed link state in SGMII modeRobert Hancock
When using a fixed-link configuration with GEM in SGMII mode, such as for a chip-to-chip interconnect, the link state was always showing as established regardless of the actual connectivity state. We can monitor the pcs_link_state bit in the Network Status register to determine whether the PCS link state is actually up. Signed-off-by: Robert Hancock <robert.hancock@calian.com> Signed-off-by: David S. Miller <davem@davemloft.net>