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path: root/drivers/net/dsa/mv88e6xxx
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2018-05-31net: dsa: mv88e6xxx: Be explicit about DT or pdataAndrew Lunn
Make it explicit that either device tree is used or platform data. If neither is available, abort the probe. Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Fixes: 877b7cb0b6f2 ("net: dsa: mv88e6xxx: Add minimal platform_data support") Signed-off-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-05-20mv88e6xxx: Fix uninitialized variable warning.David S. Miller
In mv88e6xxx_probe(), ("np" or "pdata") might be an invariant but GCC can't see that, therefore: drivers/net/dsa/mv88e6xxx/chip.c: In function ‘mv88e6xxx_probe’: drivers/net/dsa/mv88e6xxx/chip.c:4420:13: warning: ‘compat_info’ may be used uninitialized in this function [-Wmaybe-uninitialized] chip->info = compat_info; Actually, it should have warned on the "if (!compat_info)" test, but whatever. Explicitly initialize to NULL in the variable declaration to deal with this. Fixes: 877b7cb0b6f2 ("net: dsa: mv88e6xxx: Add minimal platform_data support") Signed-off-by: David S. Miller <davem@davemloft.net>
2018-05-20net: dsa: mv88e6xxx: Add support for EEPROM via platform dataAndrew Lunn
Add the size of the EEPROM to the platform data, so it can also be instantiated by a platform device. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-05-20net: dsa: mv88e6xxx: Add minimal platform_data supportAndrew Lunn
Not all the world uses device tree. Some parts of the world still use platform devices and platform data. Add basic support for probing a Marvell switch via platform data. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-05-20net: dsa: mv88e6xxx: Remove OF check for IRQ domainAndrew Lunn
An IRQ domain will work without an OF node. It is not possible to reference interrupts via a phandle, but C code can still use irq_find_mapping() to get an interrupt from the domain. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-05-16drivers: net: Remove device_node checks with of_mdiobus_register()Florian Fainelli
A number of drivers have the following pattern: if (np) of_mdiobus_register() else mdiobus_register() which the implementation of of_mdiobus_register() now takes care of. Remove that pattern in drivers that strictly adhere to it. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Reviewed-by: Fugang Duan <fugang.duan@nxp.com> Reviewed-by: Antoine Tenart <antoine.tenart@bootlin.com> Reviewed-by: Jose Abreu <joabreu@synopsys.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-05-14net: dsa: mv88e6xxx: add a stats setup functionVivien Didelot
Now that the Global 1 specific setup function only setup the statistics unit, kill it in favor of a mv88e6xxx_stats_setup function. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-05-14net: dsa: mv88e6xxx: add IEEE and IP mapping opsVivien Didelot
All Marvell switch families except 88E6390 have direct registers in Global 1 for IEEE and IP priorities override mapping. The 88E6390 uses indirect tables instead. Add .ieee_pri_map and .ip_pri_map ops to distinct that and call them from a mv88e6xxx_pri_setup helper. Only non-6390 are concerned ATM. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-05-14net: dsa: mv88e6xxx: use helper for 6390 histogramVivien Didelot
The Marvell 88E6390 model has its histogram mode bits moved in the Global 1 Control 2 register. Use the previously introduced mv88e6xxx_g1_ctl2_mask helper to set them. At the same time complete the documentation of the said register. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-05-11Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller
The bpf syscall and selftests conflicts were trivial overlapping changes. The r8169 change involved moving the added mdelay from 'net' into a different function. A TLS close bug fix overlapped with the splitting of the TLS state into separate TX and RX parts. I just expanded the tests in the bug fix from "ctx->conf == X" into "ctx->tx_conf == X && ctx->rx_conf == X". Signed-off-by: David S. Miller <davem@davemloft.net>
2018-05-11net: dsa: mv88e6xxx: add PHYLINK supportRussell King
Add rudimentary phylink support to mv88e6xxx. This allows the driver using user ports with fixed links to keep operating normally. User ports with normal PHYs are not affected since the switch automatically manages their link parameters. User facing ports which use a SFP/SFF with a non-fixed link mode might require a call to phylink_mac_change() to operate properly. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> [Andrew: fixed link setting after adding link polling] Signed-off-by: Andrew Lunn <andrew@lunn.ch> [florian: expand commit message] Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-05-10net: dsa: mv88e6xxx: add RMU disable opVivien Didelot
The RMU mode bits moved a lot within the Global Control 2 register of the Marvell switch families. Add an .rmu_disable op to support at least 3 known alternatives. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-05-10net: dsa: mv88e6xxx: set device numberVivien Didelot
All Marvell switches supported by mv88e6xxx have to set their device number in the Global Control 2 register. Extract this in a read then write function, called from the device mapping setup code. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-05-10net: dsa: mv88e6xxx: add a cascade port opVivien Didelot
Only the 88E6185 family has bits 15:12 Cascade Port bits in the Global Control 2 register. Hence inconsistent values are actually written in this register for other families. Add a .set_cascade_port operation to isolate the 88E6185 case, and call it from the device mapping setup function. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-05-10net: dsa: mv88e6xxx: 88E6141/6341 SERDES supportMarek Behún
The 88E6141/6341 switches (also known as Topaz) have 1 SGMII lane, which can be configured the same way as the SERDES lane on 88E6390. Signed-off-by: Marek Behun <marek.behun@nic.cz> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-05-07net: dsa: mv88e6xxx: Fix PHY interrupts by parameterising PHY base addressAndrew Lunn
Most of the mv88e6xxx switches have the PHYs at address 0, 1, 2, ... The 6341 however has the PHYs at 0x10, 0x11, 0x12. Add a parameter to the info structure for this base address. Testing of 6f88284f3bd7 ("net: dsa: mv88e6xxx: Add MDIO interrupts for internal PHYs") was performed on the 6341. So it works only on the 6341. Use this base information to correctly set the interrupt. Fixes: 6f88284f3bd7 ("net: dsa: mv88e6xxx: Add MDIO interrupts for internal PHYs") Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-04-29net: dsa: mv88e6xxx: remove Global 2 setupVivien Didelot
The remaining values written to the Switch Management Register in the mv88e6xxx_g2_setup function are specific to 88E6352 and older, and are the default values anyway. Thus remove completely this function. The mv88e6xxx driver no more contains setup code to access arbitrary Global 2 registers. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-04-29net: dsa: mv88e6xxx: move device mapping setupVivien Didelot
Move the Device Mapping setup out of the specific Global 2 code, into the top level device setup function. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-04-29net: dsa: mv88e6xxx: move trunk setupVivien Didelot
Move the trunking setup out of Global 2 specific setup into the top level mv88e6xxx_setup function. Note that the 88E6390 family calls this LAG instead of Trunk and supports 32 possible ID routing vectors, with LAG ID bit 4 being placed in Global 2 register 0x1D... We don't need Trunk (or LAG) IDs for the moment, thus keep it simple. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-04-27drivers: net: replace UINT64_MAX with U64_MAXJisheng Zhang
U64_MAX is well defined now while the UINT64_MAX is not, so we fall back to drivers' own definition as below: #ifndef UINT64_MAX #define UINT64_MAX (u64)(~((u64)0)) #endif I believe this is in one phy driver then copied and pasted to other phy drivers. Replace the UINT64_MAX with U64_MAX to clean up the source code. Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-04-27net: dsa: Pass stringset to ethtool operationsFlorian Fainelli
Up until now we largely assumed that we were interested in ETH_SS_STATS type of strings for all ethtool operations, this is about to change with the introduction of additional string sets, e.g: ETH_SS_PHY_STATS. Update all functions to take an appropriate stringset argument and act on it when it is different than ETH_SS_STATS for now. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-04-12net: dsa: mv88e6xxx: Fix receive time stamp race condition.Richard Cochran
The DSA stack passes received PTP frames to this driver via mv88e6xxx_port_rxtstamp() for deferred delivery. The driver then queues the frame and kicks the worker thread. The work callback reads out the latched receive time stamp and then works through the queue, delivering any non-matching frames without a time stamp. If a new frame arrives after the worker thread has read out the time stamp register but enters the queue before the worker finishes processing the queue, that frame will be delivered without a time stamp. This patch fixes the race by moving the queue onto a list on the stack before reading out the latched time stamp value. Fixes: c6fe0ad2c3499 ("net: dsa: mv88e6xxx: add rx/tx timestamping support") Signed-off-by: Richard Cochran <richardcochran@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-29net: dsa: mv88e6xxx: Make VTU miss violations less spammyAndrew Lunn
VTU miss violations can happen under normal conditions. Don't spam the kernel log, downgrade the output to debug level only. The statistics counter will indicate it is happening, if anybody not debugging is interested. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Reported-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-29net: dsa: mv88e6xxx: Keep ATU/VTU violation statisticsAndrew Lunn
Count the numbers of various ATU and VTU violation statistics and return them as part of the ethtool -S statistics. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-25net: dsa: mv88e6xxx: Call the common IRQ free codeAndrew Lunn
When free'ing the polled IRQs, call the common irq free code. Otherwise the interrupts are left registered, and when we come to load the driver a second time, we get an Opps. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-25net: dsa: mv88e6xxx: Use the DT IRQ trigger modeAndrew Lunn
By calling request_threaded_irq() with the flag IRQF_TRIGGER_FALLING we override the trigger mode provided in device tree. And the interrupt is actually active low, which is what all the current device tree descriptions use. Suggested-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Tested-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-20net: dsa: mv88e6xxx: Fix interrupt name for g2 irqUwe Kleine-König
This changes the respective line in /proc/interrupts from 49: x x mv88e6xxx-g1 7 Edge mv88e6xxx-g1 to 49: x x mv88e6xxx-g1 7 Edge mv88e6xxx-g2 which makes more sense. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-20net: dsa: mv88e6xxx: Fix typo in a commentUwe Kleine-König
Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-20net: dsa: mv88e6xxx: Fix name of switch 88E6141Uwe Kleine-König
The switch name is emitted in the kernel log, so having the right name there is nice. Fixes: 1558727a1c1b ("net: dsa: mv88e6xxx: Add support for ethernet switch 88E6141") Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-18net: dsa: mv88e6xxx: Add MDIO interrupts for internal PHYsAndrew Lunn
When registering an MDIO bus, it is possible to pass an array of interrupts, one per address on the bus. phylib will then associate the interrupt to the PHY device, if no other interrupt is provided. Some of the global2 interrupts are PHY interrupts. Place them into the MDIO bus structure. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-18net: dsa: mv88e6xxx: Add number of internal PHYsAndrew Lunn
Add to the info structure the number of internal PHYs, if they generate interrupts. Some of the older generations of switches have internal PHYs, but no interrupt registers. In this case, set the count to zero. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-18net: dsa: mv88e6xxx: Add missing g1 IRQ numbersAndrew Lunn
With the recent change to polling for interrupts, it is important that the number of global 1 interrupts is listed. Without it, the driver requests an interrupt domain for zero interrupts, which returns EINVAL, and the probe fails. Add two missing entries. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-18net: dsa: mv88e6xxx: Fix missing register lock in serdes_get_statsFlorian Fainelli
We can hit the register lock not held assertion with the following path: [ 34.170631] mv88e6085 0.1:00: Switch registers lock not held! [ 34.176510] CPU: 0 PID: 950 Comm: ethtool Not tainted 4.16.0-rc4 #143 [ 34.182985] Hardware name: Freescale Vybrid VF5xx/VF6xx (Device Tree) [ 34.189519] Backtrace: [ 34.192033] [<8010c4b4>] (dump_backtrace) from [<8010c788>] (show_stack+0x20/0x24) [ 34.199680] r6:9f5dc010 r5:00000011 r4:9f5dc010 r3:00000000 [ 34.205434] [<8010c768>] (show_stack) from [<80679d38>] (dump_stack+0x24/0x28) [ 34.212719] [<80679d14>] (dump_stack) from [<804844a8>] (mv88e6xxx_read+0x70/0x7c) [ 34.220376] [<80484438>] (mv88e6xxx_read) from [<804870dc>] (mv88e6xxx_port_get_cmode+0x34/0x4c) [ 34.229257] r5:a09cd128 r4:9ee31d07 [ 34.232880] [<804870a8>] (mv88e6xxx_port_get_cmode) from [<80487e6c>] (mv88e6352_port_has_serdes+0x24/0x64) [ 34.242690] r4:9f5dc010 [ 34.245309] [<80487e48>] (mv88e6352_port_has_serdes) from [<804880b8>] (mv88e6352_serdes_get_stats+0x28/0x12c) [ 34.255389] r4:00000001 [ 34.257973] [<80488090>] (mv88e6352_serdes_get_stats) from [<804811e8>] (mv88e6xxx_get_ethtool_stats+0xb0/0xc0) [ 34.268156] r10:00000000 r9:00000000 r8:00000000 r7:a09cd020 r6:00000001 r5:9f5dc01c [ 34.276052] r4:9f5dc010 [ 34.278631] [<80481138>] (mv88e6xxx_get_ethtool_stats) from [<8064f740>] (dsa_slave_get_ethtool_stats+0xbc/0xc4) mv88e6xxx_get_ethtool_stats() calls mv88e6xxx_get_stats() which calls both chip->info->ops->stats_get_stats(), which holds the register lock, and chip->info->ops->serdes_get_stats() which does not. Have chip->info->ops->serdes_get_stats() be running with the register lock held to avoid such assertions. Fixes: 436fe17d273b ("net: dsa: mv88e6xxx: Allow the SERDES interfaces to have statistics") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-17net: dsa: mv88e6xxx: Fix IRQ when loading moduleAndrew Lunn
Handle polled interrupts correctly when loading the module. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Fixes: 294d711ee8c0 ("net: dsa: mv88e6xxx: Poll when no interrupt defined") Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-09net: dsa: mv88e6xxx: Fix irq free'ingAndrew Lunn
Call the common irq free function, rather than going recursive and blowing away the stack, followed by the machine. Fixes: 294d711ee8c0 ("net: dsa: mv88e6xxx: Poll when no interrupt defined") Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-07net: dsa: mv88e6xxx: fix boolreturn.cocci warningsFengguang Wu
drivers/net/dsa/mv88e6xxx/serdes.c:66:9-10: WARNING: return of 0/1 in function 'mv88e6352_port_has_serdes' with return type bool Return statements in functions returning bool should use true/false instead of 1/0. Generated by: scripts/coccinelle/misc/boolreturn.cocci Fixes: eb755c3f6b7d ("net: dsa: mv88e6xxx: Add helper to determining if port has SERDES") CC: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Fengguang Wu <fengguang.wu@intel.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-04net: dsa: mv88e6xxx: Get mv88e6352 SERDES statisticsAndrew Lunn
Add support for reading the SERDES statistics of the mv88e8352, using the standard ethtool -S option. The SERDES interface can be mapped to either port 4 or 5, so only return statistics on those ports, if the SERDES interface is in use. The counters are reset on read, so need to be accumulated. Add a per port structure to hold the stats counters. The 6352 only has a single SERDES interface and so only one port will using the newly added array. However the 6390 family has as many SERDES interfaces as ports, each with statistics counters. Also, PTP has a number of counters per port which will also need accumulating. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-04net: dsa: mv88e6xxx: Add helper to determining if port has SERDESAndrew Lunn
Refactor the existing code. This helper will be used for SERDES statistics. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-04net: dsa: mv88e6xxx: Allow the SERDES interfaces to have statisticsAndrew Lunn
When gettting the number of statistics, the strings and the actual statistics, call the SERDES ops if implemented. This means the stats code needs to return the number of strings/stats they have placed into the data, so that the SERDES strings/stats can follow on. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-04net: dsa: mv88e6xxx: Hold mutex while doing stats operationsAndrew Lunn
Until now, there has been no need to hold the reg mutex while getting the count of statistics, or the strings, because the hardware was not accessed. When adding support for SERDES statistics, it is necessary to access the hardware, to determine if a port is using the SERDES interface. So add mutex lock/unlocks. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-04dsa: Pass the port to get_sset_count()Andrew Lunn
By passing the port, we allow different ports to have different statistics. This is useful since some ports have SERDES interfaces with their own statistic counters. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-02-26net: dsa: mv88e6xxx: Poll when no interrupt definedAndrew Lunn
Not all boards have the interrupt output from the switch connected to a GPIO line. In such cases, phylib has to poll the internal PHYs, rather than receive an interrupt when there is a change in the link state. phylib polls once per second, and per PHY reads around 4 words. With a switch typically having 4 internal PHYs, this means 16 MDIO transactions per second. Rather than performing this phylib level polling, have the driver poll the interrupt status register. If the status register indicates an interrupt condition processing of interrupts in the same way as if a GPIO was used. Polling 10 times a second places less load on the MDIO bus. But rather than taking on average 0.5s to detect a link change, it takes less than 0.05s. Additionally, other interrupts, such as the watchdog, ATU and VTU violations will be reported. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-02-22dsa: ptp: mark dummy helpers as 'inline'Arnd Bergmann
Declaring a static function in a header leads to a warning every time that header gets included without the function being used: In file included from drivers/net/dsa/mv88e6xxx/chip.c:42: drivers/net/dsa/mv88e6xxx/ptp.h:92:13: error: 'mv88e6xxx_hwtstamp_work' defined but not used [-Werror=unused-function] static long mv88e6xxx_hwtstamp_work(struct ptp_clock_info *ptp) In file included from drivers/net/dsa/mv88e6xxx/chip.c:38: drivers/net/dsa/mv88e6xxx/global2.h:355:12: error: 'mv88e6xxx_g2_wait' defined but not used [-Werror=unused-function] static int mv88e6xxx_g2_wait(struct mv88e6xxx_chip *chip, int reg, u16 mask) ^~~~~~~~~~~~~~~~~ drivers/net/dsa/mv88e6xxx/global2.h:350:12: error: 'mv88e6xxx_g2_update' defined but not used [-Werror=unused-function] static int mv88e6xxx_g2_update(struct mv88e6xxx_chip *chip, int reg, u16 update) ^~~~~~~~~~~~~~~~~~~ drivers/net/dsa/mv88e6xxx/global2.h:345:12: error: 'mv88e6xxx_g2_write' defined but not used [-Werror=unused-function] static int mv88e6xxx_g2_write(struct mv88e6xxx_chip *chip, int reg, u16 val) ^~~~~~~~~~~~~~~~~~ drivers/net/dsa/mv88e6xxx/global2.h:340:12: error: 'mv88e6xxx_g2_read' defined but not used [-Werror=unused-function] static int mv88e6xxx_g2_read(struct mv88e6xxx_chip *chip, int reg, u16 *val) This marks all such functions in dsa inline to make sure we don't warn about them. Fixes: c6fe0ad2c349 ("net: dsa: mv88e6xxx: add rx/tx timestamping support") Fixes: 0d632c3d6fe3 ("net: dsa: mv88e6xxx: add accessors for PTP/TAI registers") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Richard Cochran <richardcochran@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-02-22net: dsa: mv88e6xxx: scratch registers and external MDIO pinsAndrew Lunn
MV88E6352 and later switches support GPIO control through the "Scratch & Misc" global2 register. Two of the pins controlled this way on the mv88e6390 family are the external MDIO pins. They can either by used as part of the MII interface for port 0, GPIOs, or MDIO. Add a function to configure them for MDIO, if possible, and call it when registering the external MDIO bus. Suggested-by: Russell King <rmk@armlinux.org.uk> Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-02-19net: dsa: mv88e6xxx: hwtstamp: remove unnecessary range checking testsGustavo A. R. Silva
_port_ is already known to be a valid index in the callers [1]. So these checks are unnecessary. [1] https://lkml.org/lkml/2018/2/16/469 Addresses-Coverity-ID: 1465287 Addresses-Coverity-ID: 1465291 Suggested-by: Richard Cochran <richardcochran@gmail.com> Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-02-16net: dsa: mv88e6xxx: avoid unintended sign extension on a 16 bit shiftColin Ian King
The shifting of timehi by 16 bits to the left will be promoted to a 32 bit signed int and then sign-extended to an u64. If the top bit of timehi is set then all then all the upper bits of ns end up as also being set because of the sign-extension. Fix this by making timehi and timelo u64. Also move the declaration of ns. Detected by CoverityScan, CID#1465288 ("Unintended sign extension") Fixes: c6fe0ad2c349 ("net: dsa: mv88e6xxx: add rx/tx timestamping support") Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-02-16net: dsa: mv88e6xxx: Release mutex between each ATU readAndrew Lunn
The PTP code needs low latency access to the PTP hardware timestamps. Reading all the ATU entries in one go adds a lot of latency to the PTP code. So take and release the reg_lock mutex for each individual MAC address in the ATU, allowing the PTP thread jump in between. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-02-16net: dsa: mv88e6xxx: Release mutex between each statistics readAndrew Lunn
The PTP code needs low latency access to the PTP hardware timestamps. Reading all the statistics in one go adds a lot of latency to the PTP code. So take and release the reg_lock mutex for each individual statistics, allowing the PTP thread jump in between. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-02-14net: dsa: mv88e6xxx: add workaround for 6341 timestampingBrandon Streiff
88E6341 devices default to timestamping at the PHY, but due to a hardware issue, timestamps via this component are unreliable. For this family, configure the PTP hardware to force the timestamping to occur at the MAC. Signed-off-by: Brandon Streiff <brandon.streiff@ni.com> Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-02-14net: dsa: mv88e6xxx: add rx/tx timestamping supportBrandon Streiff
This patch implements RX/TX timestamping support. The Marvell PTP hardware supports RX timestamping individual message types, but for simplicity we only support the EVENT receive filter since few if any clients bother with the more specific filter types. checkpatch and reverse Christmas tree changes by Andrew Lunn. Re-factor duplicated code paths and avoid IfOk anti-pattern, use the common ptp worker thread from the class layer and time stamp UDP/IPv4 frames as well as Layer-2 frame by Richard Cochran. Signed-off-by: Brandon Streiff <brandon.streiff@ni.com> Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Richard Cochran <richardcochran@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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