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path: root/drivers/mmc/host/sdhci-cadence.c
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2017-10-30mmc: sdhci-cadence: use bitfield access macros for cleanupMasahiro Yamada
Accessing register fields generally need mask and shift part. Defining them separately, like SDHCI_CDNS_HRS06_TUNE_{SHIFT,MASK}, is tedious. Register fields can be always defined by GENMASK (or, BIT if it it a single bit). They are nicely handled by FIELD_* macros. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-08-30mmc: sdhci-pltfm: export sdhci_pltfm_suspend/resumeMasahiro Yamada
This will be useful when drivers want to reuse either suspend or resume callback instead of whole of sdhci_pltfm_pmops. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-08-30mmc: sdhci-cadence: add suspend / resume supportMasahiro Yamada
Currently, the probe function initializes the PHY, but PHY settings are lost during the sleep state. Restore the PHY registers when resuming. To facilitate this, split sdhci_cdns_phy_init() into the DT parse part and PHY update part so that the latter can be invoked from the resume hook. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-04-24mmc: sdhci-cadence: add parsing sdhci propertiesPiotr Sroka
Add calling sdhci_get_of_property function to parse sdhci properties. Signed-off-by: Piotr Sroka <piotrs@cadence.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-04-24mmc: sdhci-cadence: refactor probe functionPiotr Sroka
Use added dev variable for devm_clk_get. Signed-off-by: Piotr Sroka <piotrs@cadence.com> Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-04-24mmc: sdhci-cadence: Update PHY delay configurationPiotr Sroka
DTS properties are used instead of fixed data because PHY settings can be different for different chips/boards. Signed-off-by: Piotr Sroka <piotrs@cadence.com> Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-04-24mmc: sdhci-cadence: Fix writing PHY delayPiotr Sroka
Add polling for ACK to be sure that data are written to PHY register. Signed-off-by: Piotr Sroka <piotrs@cadence.com> Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-04-24mmc: sdhci: clarify the get_timeout_clock callbackShawn Lin
Currently the get_timeout_clock callback doesn't clearly have a statement that it needs the variant drivers to return the timeout clock rate in kHz if the SDHCI_TIMEOUT_CLK_UNIT isn't present, otherwise the variant drivers should return it in MHz. It's also very likely that further variant drivers which are going to use this callback will be confused by this situation. Given the fact that moderm sdhci variant hosts are very prone to get the timeout clock from common clock framework (actually the only three users did that), it's more natural to return the value in Hz and we make an explicit comment there. Then we put the unit conversion inside the sdhci core. Thus will improve the code and prevent further misuses. Reported-by: Anssi Hannula <anssi.hannula@bitwise.fi> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-04-24mmc: sdhci-cadence: add HS400 enhanced strobe supportPiotr Sroka
Add support for HS400ES mode to Cadence SDHCI driver. Signed-off-by: Piotr Sroka <piotrs@cadence.com> Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-02-15mmc: sdhci-cadence: fix bit shift of read data from PHY portMasahiro Yamada
This macro is currently unused, but it may be useful for debug use. Fix it just in case. Fixes: ff6af28faff5 ("mmc: sdhci-cadence: add Cadence SD4HC support") Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-02-13mmc: sdhci-cadence: Include mmc.hUlf Hansson
Don't rely on host.h to include the mmc.h header, but instead include it explicitly because the driver depends on it. Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com>
2016-12-20mmc: sdhci-cadence: add Socionext UniPhier specific compatible stringMasahiro Yamada
Add a Socionext SoC specific compatible (suggested by Rob Herring). No SoC specific data are associated with the compatible strings for now, but other SoC vendors may use this IP and want to differentiate IP variants in the future. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-12-08mmc: sdhci-cadence: add Cadence SD4HC supportMasahiro Yamada
Add a driver for the Cadence SD4HC SD/SDIO/eMMC Controller. For SD, it basically relies on the SDHCI standard code. For eMMC, this driver provides some callbacks to support the hardware part that is specific to this IP design. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>