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path: root/drivers/misc/pci_endpoint_test.c
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2020-11-03misc: pci_endpoint_test: Remove unnecessary verificationGustavo Pimentel
The first condition of the if statement can never be true, because bar variable is an enum variable type defined between 0 and 5, and also bar variable acquires the value from arg function parameter which is an unsigned long variable. The constant 5 was replaced the the equivalent enum type, in this case BAR_5. Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Link: https://lore.kernel.org/r/142cbbc215bed4243a219ea17b46f4256ceccb22.1603315690.git.gustavo.pimentel@synopsys.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-10-21Merge branch 'remotes/lorenzo/pci/rcar'Bjorn Helgaas
- Document R8A774A1, R8A774B1, R8A774E1 endpoint support in DT (Lad Prabhakar) - Add R8A774A1, R8A774B1, R8A774E1 (RZ/G2M, RZ/G2N, RZ/G2H) IDs to endpoint test (Lad Prabhakar) - Add device tree support for R8A7742 (Lad Prabhakar) - Use "fallthrough" pseudo-keyword (Gustavo A. R. Silva) * remotes/lorenzo/pci/rcar: dt-bindings: PCI: rcar: Add device tree support for r8a7742 PCI: rcar-gen2: Use fallthrough pseudo-keyword misc: pci_endpoint_test: Add Device ID for RZ/G2H PCIe controller dt-bindings: pci: rcar-pci-ep: Document r8a774e1 misc: pci_endpoint_test: Add Device ID for RZ/G2M and RZ/G2N PCIe controllers dt-bindings: pci: rcar-pci-ep: Document r8a774a1 and r8a774b1
2020-09-24misc: pci_endpoint_test: Add driver data for Layerscape PCIe controllersHou Zhiqiang
The commit 0a121f9bc3f5 ("misc: pci_endpoint_test: Use streaming DMA APIs for buffer allocation") changed to use streaming DMA APIs, however, dma_map_single() might not return a 4KB aligned address, so add the default_data as driver data for Layerscape PCIe controllers to make it 4KB aligned. Link: https://lore.kernel.org/r/20200918080024.13639-13-Zhiqiang.Hou@nxp.com Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Rob Herring <robh@kernel.org>
2020-09-24misc: pci_endpoint_test: Add LS1088a in pci_device_id tableXiaowei Bao
Add LS1088a in pci_device_id table so that pci-epf-test can be used for testing PCIe EP in LS1088a. Link: https://lore.kernel.org/r/20200918080024.13639-12-Zhiqiang.Hou@nxp.com Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Andrew Murray <andrew.murray@arm.com>
2020-09-07misc: pci_endpoint_test: Add Device ID for RZ/G2H PCIe controllerLad Prabhakar
Add Renesas R8A774E1 in pci_device_id table so that pci-epf-test can be used for testing PCIe EP on RZ/G2H. Link: https://lore.kernel.org/r/20200904103851.3946-4-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-09-07misc: pci_endpoint_test: Add Device ID for RZ/G2M and RZ/G2N PCIe controllersLad Prabhakar
Add Renesas R8A774A1 and R8A774B1 in pci_device_id table so that pci-epf-test can be used for testing PCIe EP on RZ/G2M and RZ/G2N. Link: https://lore.kernel.org/r/20200814173037.17822-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-08-03misc: pci_endpoint_test: Add J721E in pci_device_id tableKishon Vijay Abraham I
Add J721E in pci_device_id table so that pci-epf-test can be used for testing PCIe EP in J721E. Link: https://lore.kernel.org/r/20200722110317.4744-15-kishon@ti.com Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Rob Herring <robh@kernel.org>
2020-05-19misc: pci_endpoint_test: Add Device ID for RZ/G2E PCIe controllerLad Prabhakar
Add Renesas R8A774C0 in pci_device_id table so that pci-epf-test can be used for testing PCIe EP on RZ/G2E. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/1589493809-2602-1-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-04-02misc: pci_endpoint_test: remove duplicate macro PCI_ENDPOINT_TEST_STATUSLad Prabhakar
PCI_ENDPOINT_TEST_STATUS is already defined in pci_endpoint_test.c along with the status bits, drop the duplicate definition. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2020-04-02misc: pci_endpoint_test: Use full pci-endpoint-test name in request_irq()Kishon Vijay Abraham I
Use full pci-endpoint-test name in request_irq(), so that it's easy to profile the device that actually raised the interrupt. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2020-04-02misc: pci_endpoint_test: Fix to support > 10 pci-endpoint-test devicesKishon Vijay Abraham I
Adding more than 10 pci-endpoint-test devices results in "kobject_add_internal failed for pci-endpoint-test.1 with -EEXIST, don't try to register things with the same name in the same directory". This is because commit 2c156ac71c6b ("misc: Add host side PCI driver for PCI test function device") limited the length of the "name" to 20 characters. Change the length of the name to 24 in order to support upto 10000 pci-endpoint-test devices. Fixes: 2c156ac71c6b ("misc: Add host side PCI driver for PCI test function device") Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: stable@vger.kernel.org # v4.14+
2020-04-02misc: pci_endpoint_test: Add ioctl to clear IRQKishon Vijay Abraham I
Add ioctl to clear IRQ which can be used to free the allocated IRQ vectors and free the requested IRQ. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2020-04-02misc: pci_endpoint_test: Avoid using module parameter to determine irqtypeKishon Vijay Abraham I
commit e03327122e2c ("pci_endpoint_test: Add 2 ioctl commands") uses module parameter 'irqtype' in pci_endpoint_test_set_irq() to check if IRQ vectors of a particular type (MSI or MSI-X or LEGACY) is already allocated. However with multi-function devices, 'irqtype' will not correctly reflect the IRQ type of the PCI device. Fix it here by adding 'irqtype' for each PCI device to show the IRQ type of a particular PCI device. Fixes: e03327122e2c ("pci_endpoint_test: Add 2 ioctl commands") Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: stable@vger.kernel.org # v4.19+
2020-04-02misc: pci_endpoint_test: Add support to get DMA option from userspaceKishon Vijay Abraham I
'pcitest' utility now uses '-d' option to allow the user to test DMA. Add support to parse option to use DMA from userspace application. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Tested-by: Alan Mikhak <alan.mikhak@sifive.com>
2020-04-02misc: pci_endpoint_test: Use streaming DMA APIs for buffer allocationKishon Vijay Abraham I
Use streaming DMA APIs (dma_map_single/dma_unmap_single) for buffers transmitted/received by the endpoint device instead of allocating a coherent memory. Also add default_data to set the alignment to 4KB since dma_map_single might not return a 4KB aligned address. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Tested-by: Alan Mikhak <alan.mikhak@sifive.com>
2019-10-14PCI: Add PCI_STD_NUM_BARS for the number of standard BARsDenis Efremov
Code that iterates over all standard PCI BARs typically uses PCI_STD_RESOURCE_END. However, that requires the unusual test "i <= PCI_STD_RESOURCE_END" rather than something the typical "i < PCI_STD_NUM_BARS". Add a definition for PCI_STD_NUM_BARS and change loops to use the more idiomatic C style to help avoid fencepost errors. Link: https://lore.kernel.org/r/20190927234026.23342-1-efremov@linux.com Link: https://lore.kernel.org/r/20190927234308.23935-1-efremov@linux.com Link: https://lore.kernel.org/r/20190916204158.6889-3-efremov@linux.com Signed-off-by: Denis Efremov <efremov@linux.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Sebastian Ott <sebott@linux.ibm.com> # arch/s390/ Acked-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> # video/fbdev/ Acked-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> # pci/controller/dwc/ Acked-by: Jack Wang <jinpu.wang@cloud.ionos.com> # scsi/pm8001/ Acked-by: Martin K. Petersen <martin.petersen@oracle.com> # scsi/pm8001/ Acked-by: Ulf Hansson <ulf.hansson@linaro.org> # memstick/
2019-07-17Merge tag 'dmaengine-5.3-rc1' of git://git.infradead.org/users/vkoul/slave-dmaLinus Torvalds
Pull dmaengine updates from Vinod Koul: - Add support in dmaengine core to do device node checks for DT devices and update bunch of drivers to use that and remove open coding from drivers - New driver/driver support for new hardware, namely: - MediaTek UART APDMA - Freescale i.mx7ulp edma2 - Synopsys eDMA IP core version 0 - Allwinner H6 DMA - Updates to axi-dma and support for interleaved cyclic transfers - Greg's debugfs return value check removals on drivers - Updates to stm32-dma, hsu, dw, pl330, tegra drivers * tag 'dmaengine-5.3-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (68 commits) dmaengine: Revert "dmaengine: fsl-edma: add i.mx7ulp edma2 version support" dmaengine: at_xdmac: check for non-empty xfers_list before invoking callback Documentation: dmaengine: clean up description of dmatest usage dmaengine: tegra210-adma: remove PM_CLK dependency dmaengine: fsl-edma: add i.mx7ulp edma2 version support dt-bindings: dma: fsl-edma: add new i.mx7ulp-edma dmaengine: fsl-edma-common: version check for v2 instead dmaengine: fsl-edma-common: move dmamux register to another single function dmaengine: fsl-edma: add drvdata for fsl-edma dmaengine: Revert "dmaengine: fsl-edma: support little endian for edma driver" dmaengine: rcar-dmac: Reject zero-length slave DMA requests dmaengine: dw: Enable iDMA 32-bit on Intel Elkhart Lake dmaengine: dw-edma: fix semicolon.cocci warnings dmaengine: sh: usb-dmac: Use [] to denote a flexible array member dmaengine: dmatest: timeout value of -1 should specify infinite wait dmaengine: dw: Distinguish ->remove() between DW and iDMA 32-bit dmaengine: fsl-edma: support little endian for edma driver dmaengine: hsu: Revert "set HSU_CH_MTSR to memory width" dmagengine: pl330: add code to get reset property dt-bindings: pl330: document the optional resets property ...
2019-06-10PCI: Add Synopsys endpoint EDDA Device IDGustavo Pimentel
Create and add Synopsys Endpoint EDDA Device ID to PCI ID list, since this ID is now being use on two different drivers (pci_endpoint_test.ko and dw-edma-pcie.ko). Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Kishon Vijay Abraham I <kishon@ti.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Joao Pinto <jpinto@synopsys.com> Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-06-05treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 341Thomas Gleixner
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 of the license as published by the free software foundation this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not see http www gnu org licenses extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 8 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Reviewed-by: Armijn Hemel <armijn@tjaldur.nl> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190530000437.144869442@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-01misc: pci_endpoint_test: Fix test_reg_bar to be updated in pci_endpoint_testKishon Vijay Abraham I
commit 834b90519925 ("misc: pci_endpoint_test: Add support for PCI_ENDPOINT_TEST regs to be mapped to any BAR") while adding test_reg_bar in order to map PCI_ENDPOINT_TEST regs to be mapped to any BAR failed to update test_reg_bar in pci_endpoint_test, resulting in test_reg_bar having invalid value when used outside probe. Fix it. Fixes: 834b90519925 ("misc: pci_endpoint_test: Add support for PCI_ENDPOINT_TEST regs to be mapped to any BAR") Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2019-05-01misc: pci_endpoint_test: Add support to test PCI EP in AM654xKishon Vijay Abraham I
TI's AM654x PCIe EP has a restriction that BAR_0 is mapped to application registers. "PCIe Inbound Address Translation" section in AM65x Sitara Processors TRM (SPRUID7 – April 2018) describes BAR0 as reserved. Configure pci_endpoint_test to use BAR_2 instead. Also set alignment to 64K since "PCIe Subsystem Address Translation" section in TRM indicates minimum ATU window size is 64K. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2019-02-21misc: pci_endpoint_test: Add the layerscape EP device supportXiaowei Bao
Add the layerscape EP device support in pci_endpoint_test driver. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Minghuan Lian <minghuan.lian@nxp.com> Reviewed-by: Zhiqiang Hou <zhiqiang.hou@nxp.com> Reviewed-by: Greg KH <gregkh@linuxfoundation.org>
2018-07-19pci_endpoint_test: Add 2 ioctl commandsGustavo Pimentel
Add MSI-X support and update driver documentation accordingly. Add 2 new IOCTL commands: - Allow to reconfigure driver IRQ type in runtime. - Allow to retrieve current driver IRQ type configured. Add IRQ type validation before executing the READ/WRITE/COPY tests. Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-07-19pci-epf-test/pci_endpoint_test: Add MSI-X supportGustavo Pimentel
Add MSI-X support and update driver documentation accordingly. Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-07-19pci-epf-test/pci_endpoint_test: Use irq_type module parameterGustavo Pimentel
Add new driver parameter to allow interruption type selection. Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-07-19pci-epf-test/pci_endpoint_test: Cleanup PCI_ENDPOINT_TEST memspaceGustavo Pimentel
Cleanup PCI_ENDPOINT_TEST memspace (by moving the interrupt number away from command section). Add IRQ_TYPE register to identify the triggered ID interrupt required for the READ/WRITE/COPY tests and raise IRQ test commands. Update documentation accordingly. Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-06-06Merge branch 'lorenzo/pci/endpoint'Bjorn Helgaas
- use usleep() instead of mdelay() in endpoint test (Jia-Ju Bai) - add configfs entries for pci_epf_driver device IDs (Kishon Vijay Abraham I) - clean up pci_endpoint_test driver (Gustavo Pimentel) * lorenzo/pci/endpoint: PCI: endpoint: Create configfs entry for each pci_epf_device_id table entry misc: pci_endpoint_test: Use pci_irq_vector function PCI: endpoint: functions/pci-epf-test: Replace lower into upper case characters misc: pci_endpoint_test: Replace lower into upper case characters PCI: endpoint: Replace mdelay with usleep_range() in pci_epf_test_write()
2018-05-15misc: pci_endpoint_test: Use pci_irq_vector functionGustavo Pimentel
Replace "pdev->irq + index" operation by the pci_irq_vector() call, that converts from device vector to Linux IRQ. Suggested-by: Alan Douglas <adouglas@cadence.com> Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> [lorenzo.pieralisi@arm.com: updated commit log] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2018-05-15misc: pci_endpoint_test: Add DesignWare EP entryGustavo Pimentel
Add the DesignWare EP device ID entry to pci_endpoint_test driver table. Allow the device to be recognized and handled by the pci_endpoint_test driver. Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-05-15misc: pci_endpoint_test: Replace lower into upper case charactersGustavo Pimentel
Replace all initial lower case character into upper case in comments and debug printks. Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2018-04-03misc: pci_endpoint_test: Handle 64-bit BARs properlyNiklas Cassel
A 64-bit BAR consists of a BAR pair, where the second BAR has the upper bits, so we cannot simply call pci_ioremap_bar() on every single BAR index. The second BAR in a BAR pair will not have the IORESOURCE_MEM resource flag set. Only call ioremap on BARs that have the IORESOURCE_MEM resource flag set. pci 0000:01:00.0: BAR 4: assigned [mem 0xc0300000-0xc031ffff 64bit] pci 0000:01:00.0: BAR 2: assigned [mem 0xc0320000-0xc03203ff 64bit] pci 0000:01:00.0: BAR 0: assigned [mem 0xc0320400-0xc03204ff 64bit] pci-endpoint-test 0000:01:00.0: can't ioremap BAR 1: [??? 0x00000000 flags 0x0] pci-endpoint-test 0000:01:00.0: failed to read BAR1 pci-endpoint-test 0000:01:00.0: can't ioremap BAR 3: [??? 0x00000000 flags 0x0] pci-endpoint-test 0000:01:00.0: failed to read BAR3 pci-endpoint-test 0000:01:00.0: can't ioremap BAR 5: [??? 0x00000000 flags 0x0] pci-endpoint-test 0000:01:00.0: failed to read BAR5 Signed-off-by: Niklas Cassel <niklas.cassel@axis.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-10-31misc: pci_endpoint_test: Fix BUG_ON error during pci_disable_msi()Kishon Vijay Abraham I
pci_disable_msi() throws a Kernel BUG if the driver has successfully requested an IRQ and not released it. Fix it here by freeing IRQs before invoking pci_disable_msi(). Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2017-10-31misc: pci_endpoint_test: Fix pci_endpoint_test not releasing resources on removeKishon Vijay Abraham I
sscanf(misc_device->name, DRV_MODULE_NAME ".%d", &id) in pci_endpoint_test_remove() returns 0, which results in returning early without releasing the resources. This is as a result of misc_device not having a valid name. Fix it here. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2017-10-31misc: pci_endpoint_test: Fix failure path return values in probeKishon Vijay Abraham I
Return value of pci_endpoint_test_probe is not set properly in a couple of failure cases. Fix it here. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2017-10-31misc: pci_endpoint_test: Avoid triggering a BUG()Dan Carpenter
If you call ida_simple_remove(&pci_endpoint_test_ida, id) with a negative "id" then it triggers an immediate BUG_ON(). Let's not allow that. Fixes: 2c156ac71c6b ("misc: Add host side PCI driver for PCI test function device") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-10-17misc: pci_endpoint_test: Prevent some integer overflowsDan Carpenter
"size + max" can have an arithmetic overflow when we're allocating: orig_src_addr = dma_alloc_coherent(dev, size + alignment, ... Add a few checks to prevent that. Fixes: 13107c60681f ("misc: pci_endpoint_test: Add support to provide aligned buffer addresses") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-08-29misc: pci_endpoint_test: Enable/Disable MSI using module paramKishon Vijay Abraham I
In certain platforms like TI's DRA7 SoCs, use of legacy PCI interrupt is exclusive with use of MSI (Section 24.9.4.6.2.1 Legacy PCI Interrupts in http://www.ti.com/lit/ug/spruhz6i/spruhz6i.pdf). However pci_endpoint_test driver enables MSI by default in probe. In order for pci_endpoint_test to be able to test legacy interrupt, MSI should be disabled. Add a module param 'no_msi' to disable MSI (only when legacy interrupt has to be tested). Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> [bhelgaas: folded in static fix from Colin Ian King <colin.king@canonical.com>] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2017-08-29misc: pci_endpoint_test: Avoid using hard-coded BAR sizesKishon Vijay Abraham I
BAR sizes are hard-coded in pci_endpoint_test driver corresponding to the sizes used in pci-epf-test function driver. This might break if the sizes in pci-epf-test function driver are modified (and the corresponding change is not done in pci_endpoint_test PCI driver). To avoid hard coding BAR sizes, use pci_resource_len() API. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2017-08-29misc: pci_endpoint_test: Add support to not enable MSI interruptsKishon Vijay Abraham I
Some platforms like TI's K2G have a restriction that the host side buffer address should be aligned to either 1MB/2MB/4MB or 8MB addresses depending on how it is configured in the endpoint (Ref: 11.14.4.9.1 Outbound Address Translation in K2G TRM SPRUHY8F January 2016 – Revised May 2017). This restriction also applies to the MSI addresses provided by the RC. However it's not possible for the RC to know about this restriction and it may not provide 1MB/2MB/4MB or 8MB aligned address. So MSI interrupts should be disabled even if the K2G EP has MSI capabiltiy register. Add support to not enable MSI interrupts in pci_endpoint_test driver so that it can be used to test K2G EP. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2017-08-29misc: pci_endpoint_test: Add support to provide aligned buffer addressesKishon Vijay Abraham I
Some platforms like TI's K2G have a restriction that the host side buffer address should be aligned to either 1MB/2MB/4MB or 8MB (Ref: 11.14.4.9.1 Outbound Address Translation in K2G TRM SPRUHY8F January 2016 – Revised May 2017) addresses depending on how it is configured in the endpoint. Add support to provide such aligned address here so that pci_endpoint_test driver can be used to test K2G EP. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2017-08-29misc: pci_endpoint_test: Add support for PCI_ENDPOINT_TEST regs to be mapped ↵Kishon Vijay Abraham I
to any BAR pci_endpoint_test driver assumes the PCI_ENDPOINT_TEST registers will always be mapped to BAR_0. This need not always be the case like in TI's K2G where BAR_0 is mapped to PCI controller application registers. Add support so that PCI_ENDPOINT_TEST registers can be mapped to any BAR. Change the bar_size used for BAR test accordingly. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2017-04-28misc: Add host side PCI driver for PCI test function deviceKishon Vijay Abraham I
Add PCI endpoint test driver that can verify base address register, legacy interrupt/MSI interrupt and read/write/copy buffers between host and device. The corresponding pci-epf-test function driver should be used on the EP side. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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