Age | Commit message (Collapse) | Author |
|
Based on 1 normalized pattern(s):
this program is free software you can redistribute it and or modify
it under the terms and conditions of the gnu general public license
version 2 as published by the free software foundation this program
is distributed in the hope it will be useful but without any
warranty without even the implied warranty of merchantability or
fitness for a particular purpose see the gnu general public license
for more details
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference in 263 file(s).
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Alexios Zavras <alexios.zavras@intel.com>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190529141901.208660670@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
|
Get rid of some boilerplate driver removal code by using the newly added
device-managed registration API.
Reviewed-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
|
|
The newly added rockchip mailbox driver causes a bug in
the ARM allyesconfig build because of a division of a resource_size_t
variable that may be 64 bit wide:
drivers/mailbox/built-in.o: In function `rockchip_mbox_probe':
:(.text+0x6614): undefined reference to `__aeabi_uldivmod'
This adds a cast to size_t, which turns it into a 32-bit division
in this case. This is safe because we know that we cannot possibly
map a resource that is longer than what a pointer contains, and
in practice it will be very short instead.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
|
|
This driver is found on RK3368 SoCs.
The Mailbox module is a simple APB peripheral that allows both
the Cortex-A53 MCU system to communicate by writing operation to
generate interrupt.
The registers are accessible by both CPU via APB interface.
The Mailbox has the following main features:
1) Support dual-core system: Cortex-A53 and MCU.
2) Support APB interface.
3) Support four mailbox elements, each element includes one data word,
one command word register and one flag bit that can represent
one interrupt.
4) Four interrupts to Cortex-A53.
5) Four interrupts to MCU.
6) Provide 32 lock registers for software to use to indicate whether
mailbox is occupied.
[Jassi: Removed unused variable buf_base]
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
|