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path: root/drivers/irqchip/irq-crossbar.c
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2015-10-13irqchip: Convert all alloc/xlate users from of_node to fwnodeMarc Zyngier
Since we now have a generic data structure to express an interrupt specifier, convert all hierarchical irqchips that are OF based to use a fwnode_handle as part of their alloc and xlate (which becomes translate) callbacks. As most of these drivers have dependencies (they exchange IRQ specifiers), change them all in a single, massive patch... Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Reviewed-and-tested-by: Hanjun Guo <hanjun.guo@linaro.org> Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: <linux-arm-kernel@lists.infradead.org> Cc: Tomasz Nowicki <tomasz.nowicki@linaro.org> Cc: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> Cc: Graeme Gregory <graeme@xora.org.uk> Cc: Jake Oshins <jakeo@microsoft.com> Cc: Jiang Liu <jiang.liu@linux.intel.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Rafael J. Wysocki <rjw@rjwysocki.net> Link: http://lkml.kernel.org/r/1444737105-31573-6-git-send-email-marc.zyngier@arm.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-10-13irqdomain: Use irq_domain_get_of_node() instead of direct field accessMarc Zyngier
The struct irq_domain contains a "struct device_node *" field (of_node) that is almost the only link between the irqdomain and the device tree infrastructure. In order to prepare for the removal of that field, convert all users to use irq_domain_get_of_node() instead. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Reviewed-and-tested-by: Hanjun Guo <hanjun.guo@linaro.org> Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: <linux-arm-kernel@lists.infradead.org> Cc: Tomasz Nowicki <tomasz.nowicki@linaro.org> Cc: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> Cc: Graeme Gregory <graeme@xora.org.uk> Cc: Jake Oshins <jakeo@microsoft.com> Cc: Jiang Liu <jiang.liu@linux.intel.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Rafael J. Wysocki <rjw@rjwysocki.net> Link: http://lkml.kernel.org/r/1444737105-31573-2-git-send-email-marc.zyngier@arm.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-09-01Merge branch 'irq-core-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull irq updates from Thomas Gleixner: "This updated pull request does not contain the last few GIC related patches which were reported to cause a regression. There is a fix available, but I let it breed for a couple of days first. The irq departement provides: - new infrastructure to support non PCI based MSI interrupts - a couple of new irq chip drivers - the usual pile of fixlets and updates to irq chip drivers - preparatory changes for removal of the irq argument from interrupt flow handlers - preparatory changes to remove IRQF_VALID" * 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (129 commits) irqchip/imx-gpcv2: IMX GPCv2 driver for wakeup sources irqchip: Add bcm2836 interrupt controller for Raspberry Pi 2 irqchip: Add documentation for the bcm2836 interrupt controller irqchip/bcm2835: Add support for being used as a second level controller irqchip/bcm2835: Refactor handle_IRQ() calls out of MAKE_HWIRQ PCI: xilinx: Fix typo in function name irqchip/gic: Ensure gic_cpu_if_up/down() programs correct GIC instance irqchip/gic: Only allow the primary GIC to set the CPU map PCI/MSI: pci-xgene-msi: Consolidate chained IRQ handler install/remove unicore32/irq: Prepare puv3_gpio_handler for irq argument removal tile/pci_gx: Prepare trio_handle_level_irq for irq argument removal m68k/irq: Prepare irq handlers for irq argument removal C6X/megamode-pic: Prepare megamod_irq_cascade for irq argument removal blackfin: Prepare irq handlers for irq argument removal arc/irq: Prepare idu_cascade_isr for irq argument removal sparc/irq: Use access helper irq_data_get_affinity_mask() sparc/irq: Use helper irq_data_get_irq_handler_data() parisc/irq: Use access helper irq_data_get_affinity_mask() mn10300/irq: Use access helper irq_data_get_affinity_mask() irqchip/i8259: Prepare i8259_irq_dispatch for irq argument removal ...
2015-08-20irqchip/crossbar: Restore set_wake functionalityGrygorii Strashko
The TI crossbar irqchip doesn't provides any facility to configure the wakeup sources, but the conversion to hierarchical irqdomains set the irq_set_wake callback to irq_chip_set_wake_parent. The parent chip (OMAP wakeupgen) has no irq_set_wake function either so the call will fail with -ENOSYS. As a result the irq_set_wake() call in the resume path will trigger an 'Unbalanced wake disable' warning. Before the conversion the GIC irqchip was the top level irqchip and correctly flagged with IRQCHIP_SKIP_SET_WAKE. Restore the correct behaviour by removing the irq_set_type callback from the crossbar irqchip and set the IRQCHIP_SKIP_SET_WAKE flag which lets the irq_set_irq_wake() call from the driver succeed. [ tglx: Massaged changelog ] Fixes: 783d31863fb8 ('irqchip: crossbar: Convert dra7 crossbar...') Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Sudeep Holla <sudeep.holla@arm.com> Cc: <linux@arm.linux.org.uk> Cc: <nsekhar@ti.com> Cc: <jason@lakedaemon.net> Cc: <balbi@ti.com> Cc: <linux-arm-kernel@lists.infradead.org> Cc: <tony@atomide.com> Cc: <marc.zyngier@arm.com> Cc: stable@vger.kernel.org # 4.1 Link: http://lkml.kernel.org/r/1439554830-19502-7-git-send-email-grygorii.strashko@ti.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-08-20irqchip/crossbar: Restore the mask on suspend behaviourGrygorii Strashko
The ARM GIC requires that all interrupts which are not used as a wakeup source have to be masked during suspend. The conversion of the crossbar irqchip to hierarchical irq domains failed to mark the crossbar irqchip with the IRQCHIP_MASK_ON_SUSPEND flag and therefor broke the suspend requirement of the GIC. Before the conversion the flags were visible because the GIC was the top level irqchip. After the conversion the crossbar irqchip is the top level irq chip whose flags are evaluated in suspend_device_irq(). As the flag is not set the masking of the non-wakeup irqs is not invoked which breaks suspend. Add the IRQCHIP_MASK_ON_SUSPEND flag to the crossbar irqchip, so the GIC interrupts get masked properly. [ tglx: Massaged changelog ] Fixes: 783d31863fb8 ('irqchip: crossbar: Convert dra7 crossbar...') Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Sudeep Holla <sudeep.holla@arm.com> Cc: <linux@arm.linux.org.uk> Cc: <nsekhar@ti.com> Cc: <jason@lakedaemon.net> Cc: <balbi@ti.com> Cc: <linux-arm-kernel@lists.infradead.org> Cc: <tony@atomide.com> Cc: <marc.zyngier@arm.com> Cc: stable@vger.kernel.org # 4.1 Link: http://lkml.kernel.org/r/1439554830-19502-6-git-send-email-grygorii.strashko@ti.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-08-20irqchip/crossbar: Restore the irq_set_type() mechanismGrygorii Strashko
The conversion of the crossbar irqchip to hierarchical irq domains failed to provide a mechanism to properly set the trigger type of an interrupt. The crossbar irq chip itself has no mechanism and therefor no irq_set_type() callback. The code before the conversion relayed the trigger configuration directly to the underlying GIC. Restore the correct behaviour by setting the crossbar irq_set_type callback to irq_chip_set_type_parent(). This propagates the set_trigger() call to the underlying GIC irqchip. [ tglx: Massaged changelog ] Fixes: 783d31863fb8 ('irqchip: crossbar: Convert dra7 crossbar...') Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Sudeep Holla <sudeep.holla@arm.com> Cc: <linux@arm.linux.org.uk> Cc: <nsekhar@ti.com> Cc: <jason@lakedaemon.net> Cc: <balbi@ti.com> Cc: <linux-arm-kernel@lists.infradead.org> Cc: <tony@atomide.com> Cc: <marc.zyngier@arm.com> Cc: stable@vger.kernel.org # 4.1 Link: http://lkml.kernel.org/r/1439554830-19502-4-git-send-email-grygorii.strashko@ti.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-07-11irqchip: Prepare for local stub header removalJoel Porquet
The IRQCHIP_DECLARE macro moved to to 'include/linux/irqchip.h', so the local irqchip.h became an empty shell, which solely includes include/linux/irqchip.h Include the global header in all irqchip drivers instead of the local header, so we can remove it. Signed-off-by: Joel Porquet <joel@porquet.org> Cc: vgupta@synopsys.com Cc: monstr@monstr.eu Cc: ralf@linux-mips.org Cc: jason@lakedaemon.net Link: http://lkml.kernel.org/r/1882096.X39jVG8e0D@joel-zenbook Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-03-15irqchip: crossbar: Convert dra7 crossbar to stacked domainsMarc Zyngier
Support for the TI crossbar used on the DRA7 family of chips is implemented as an ugly hack on the side of the GIC. Converting it to stacked domains makes it slightly more palatable, as it results in a cleanup. Unfortunately, as the DT bindings failed to acknowledge the fact that this is actually yet another interrupt controller (the third, actually), we have yet another breakage. Oh well. Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Link: https://lkml.kernel.org/r/1426088629-15377-3-git-send-email-marc.zyngier@arm.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-08-18irqchip: crossbar: Off by one bugs in initDan Carpenter
My static checker complains that the ">" should be ">=" or else we go beyond the end of the cb->irq_map[] array on the next line. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-06-30irqchip: crossbar: Allow for quirky hardware with direct hardwiring of GICNishanth Menon
On certain platforms such as DRA7, SPIs 0, 1, 2, 3, 5, 6, 10, 131, 132, 133 are direct wired to hardware blocks bypassing crossbar. This quirky implementation is *NOT* supposed to be the expectation of crossbar hardware usage. However, these are already marked in our description of the hardware with SKIP and RESERVED where appropriate. Unfortunately, we need to be able to refer to these hardwired IRQs. So, to request these, crossbar driver can use the existing information from it's table that these SKIP/RESERVED maps are direct wired sources and generic allocation/programming of crossbar should be avoided. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Sricharan R <r.sricharan@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Link: https://lkml.kernel.org/r/1403766634-18543-17-git-send-email-r.sricharan@ti.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-06-30irqchip: crossbar: Introduce centralized check for crossbar writeNishanth Menon
This is a basic check to ensure that crossbar register needs to be written. This ensures that we have a common check which is used in both map and unmap logic. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Sricharan R <r.sricharan@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Link: https://lkml.kernel.org/r/1403766634-18543-15-git-send-email-r.sricharan@ti.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-06-30irqchip: crossbar: Introduce ti, max-crossbar-sources to identify valid ↵Nishanth Menon
crossbar mapping Currently we attempt to map any crossbar value to an IRQ, however, this is not correct from hardware perspective. There is a max crossbar event number upto which hardware supports. So describe the same in device tree using 'ti,max-crossbar-sources' property and use it to validate requests. [ jac - remove MAX_SOURCES from binding doc, use integer because we shouldn't put implementation details in the binding docs ] Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Sricharan R <r.sricharan@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Link: https://lkml.kernel.org/r/1403766634-18543-14-git-send-email-r.sricharan@ti.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-06-30irqchip: crossbar: Add kerneldoc for crossbar_domain_unmap callbackSricharan R
Adding kerneldoc for unmap callback function. Signed-off-by: Sricharan R <r.sricharan@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Link: https://lkml.kernel.org/r/1403766634-18543-13-git-send-email-r.sricharan@ti.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-06-30irqchip: crossbar: Set cb pointer to null in case of errorSricharan R
If crossbar_of_init returns with a error, then set the cb pointer to null. Signed-off-by: Sricharan R <r.sricharan@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Link: https://lkml.kernel.org/r/1403766634-18543-12-git-send-email-r.sricharan@ti.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-06-30irqchip: crossbar: Change the goto namingNishanth Menon
Using err1,2,3,4 etc makes it hard to ensure a new exit path in the middle will not result in spurious changes, so rename the error paths as per the function it does. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Sricharan R <r.sricharan@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Link: https://lkml.kernel.org/r/1403766634-18543-11-git-send-email-r.sricharan@ti.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-06-30irqchip: crossbar: Return proper error valueNishanth Menon
crossbar_of_init always returns -ENOMEM in case of errors. There can be other causes of failure like invalid data from DT. So return a appropriate error value for that case. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Sricharan R <r.sricharan@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Link: https://lkml.kernel.org/r/1403766634-18543-10-git-send-email-r.sricharan@ti.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-06-30irqchip: crossbar: Fix kerneldoc warningNishanth Menon
Adding missing properties for kerneldoc (@write) and cleanup of harmless warnings while we are here. kerneldoc warnings: Warning(drivers/irqchip/irq-crossbar.c:27): missing initial short description on line: * struct crossbar_device: crossbar device description Info(drivers/irqchip/irq-crossbar.c:27): Scanning doc for struct Warning(drivers/irqchip/irq-crossbar.c:39): No description found for parameter 'write' 2 warnings Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Sricharan R <r.sricharan@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Link: https://lkml.kernel.org/r/1403766634-18543-9-git-send-email-r.sricharan@ti.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-06-30irqchip: crossbar: Fix sparse and checkpatch warningsNishanth Menon
There is absolutely no need for crossbar driver to expose functions and variables into global namespace. So make them all static Also fix a couple of checkpatch warnings. Fixes sparse warnings: drivers/irqchip/irq-crossbar.c:129:29: warning: symbol 'routable_irq_domain_ops' was not declared. Should it be static? drivers/irqchip/irq-crossbar.c:261:12: warning: symbol 'irqcrossbar_init' was not declared. Should it be static? Checkpatch warnings: WARNING: Prefer kcalloc over kzalloc with multiply + cb->irq_map = kzalloc(max * sizeof(int), GFP_KERNEL); WARNING: Prefer kcalloc over kzalloc with multiply + cb->register_offsets = kzalloc(max * sizeof(int), GFP_KERNEL); Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Sricharan R <r.sricharan@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Link: https://lkml.kernel.org/r/1403766634-18543-8-git-send-email-r.sricharan@ti.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-06-30irqchip: crossbar: Remove IS_ERR_VALUE checkNishanth Menon
IS_ERR_VALUE makes sense only *if* there could be valid values in negative error range. But in the cases that we do use it, there is no such case. Just remove the same. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Sricharan R <r.sricharan@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Link: https://lkml.kernel.org/r/1403766634-18543-7-git-send-email-r.sricharan@ti.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-06-30irqchip: crossbar: Change allocation logic by reversing search for free irqsNishanth Menon
Reverse the search algorithm to ensure that address mapping and IRQ allocation logics are proper. This makes the below bugs visible sooner. class 1. address space errors -> example: reg = <a size_b> ti,max-irqs = is a wrong parameter class 2: irq-reserved list - which decides which entries in the address space is not actually wired in class 3: wrong list of routable-irqs. In general allocating from max to min tends to have benefits in ensuring the different issues that may be present in dts is easily caught at definition time, rather than at a later point in time. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Sricharan R <r.sricharan@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Link: https://lkml.kernel.org/r/1403766634-18543-6-git-send-email-r.sricharan@ti.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-06-30irqchip: crossbar: Initialise the crossbar with a safe valueNishanth Menon
Since crossbar is s/w configurable, the initial settings of the crossbar cannot be assumed to be sane. This implies that: a) On initialization all un-reserved crossbars must be initialized to a known 'safe' value. b) When unmapping the interrupt, the safe value must be written to ensure that the crossbar mapping matches with interrupt controller usage. So provide a safe value in the dt data to map if '0' is not safe for the platform and use it during init and unmap While at this, fix the below checkpatch warning. Fixes checkpatch warning: WARNING: Unnecessary space before function pointer arguments #37: FILE: drivers/irqchip/irq-crossbar.c:37: + void (*write) (int, int); Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Sricharan R <r.sricharan@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Link: https://lkml.kernel.org/r/1403766634-18543-5-git-send-email-r.sricharan@ti.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-06-30irqchip: crossbar: Introduce ti, irqs-skip to skip irqs that bypass crossbarNishanth Menon
When, in the system due to varied reasons, interrupts might be unusable due to hardware behavior, but register maps do exist, then those interrupts should be skipped while mapping irq to crossbars. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Sricharan R <r.sricharan@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Link: https://lkml.kernel.org/r/1403766634-18543-4-git-send-email-r.sricharan@ti.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-06-30irqchip: crossbar: Check for premapped crossbar before allocatingNishanth Menon
If irq_of_parse_and_map is executed twice, the same crossbar is mapped to two different GIC interrupts. This is completely undesirable. Instead, check if the requested crossbar event is pre-allocated and provide that GIC mapping back to caller if already allocated. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Sricharan R <r.sricharan@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Link: https://lkml.kernel.org/r/1403766634-18543-3-git-send-email-r.sricharan@ti.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-06-30irqchip: crossbar: Dont use '0' to mark reserved interruptsNishanth Menon
Today '0' is actually reserved, but may not be the same in the future. So, use a flag to mark the GIC interrupts that are reserved. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Sricharan R <r.sricharan@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Link: https://lkml.kernel.org/r/1403766634-18543-2-git-send-email-r.sricharan@ti.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-04-28irqchip: irq-crossbar: Not allocating enough memoryDan Carpenter
We are allocating the size of a pointer and not the size of the data. This will lead to memory corruption. There isn't actually a "cb_device" struct, btw. The code is only able to compile because GCC knows that all pointers are the same size. Fixes: 96ca848ef7ea ('DRIVERS: IRQCHIP: CROSSBAR: Add support for Crossbar IP') Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Acked-by: Sricharan R <r.sricharan@ti.com> Cc: Grant Likely <grant.likely@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Link: http://lkml.kernel.org/r/20140403072134.GA14286@mwanda Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2014-02-05DRIVERS: IRQCHIP: CROSSBAR: Add support for Crossbar IPSricharan R
Some socs have a large number of interrupts requests to service the needs of its many peripherals and subsystems. All of the interrupt lines from the subsystems are not needed at the same time, so they have to be muxed to the irq-controller appropriately. In such places a interrupt controllers are preceded by an CROSSBAR that provides flexibility in muxing the device requests to the controller inputs. This driver takes care a allocating a free irq and then configuring the crossbar IP as a part of the mpu's irqchip callbacks. crossbar_init should be called right before the irqchip_init, so that it is setup to handle the irqchip callbacks. Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Tony Lindgren <tony@atomide.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Grant Likely <grant.likely@linaro.org> Cc: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Sricharan R <r.sricharan@ti.com> Acked-by: Kumar Gala <galak@codeaurora.org> (for DT binding portion) Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Thomas Gleixner <tglx@linutronix.de>
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