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path: root/drivers/irqchip/irq-bcm2836.c
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2021-06-10irqchip: Bulk conversion to generic_handle_domain_irq()Marc Zyngier
Wherever possible, replace constructs that match either generic_handle_irq(irq_find_mapping()) or generic_handle_irq(irq_linear_revmap()) to a single call to generic_handle_domain_irq(). Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Marc Zyngier <maz@kernel.org>
2020-12-18irqchip/bcm2836: Fix IPI acknowledgement after conversion to ↵Marc Zyngier
handle_percpu_devid_irq It appears that despite its name, the bcm2836_arm_irqchip_ipi_eoi() callback is an acknowledgement, and not an EOI. This means that we lose IPIs that are made pending between the handling of the IPI and the write to LOCAL_MAILBOX0_CLR0. With the right timing, things fail nicely. This used to work with handle_percpu_devid_fasteoi_ipi(), which started by eoi-ing the interrupt. With the standard fasteoi flow, this doesn't work anymore. So let's use this callback for what it is, an ack. Your favourite RPi-2/3 is back up and running. Fixes: ffdad793d579 ("irqchip/bcm2836: Make IPIs use handle_percpu_devid_irq()") Cc: Valentin Schneider <valentin.schneider@arm.com> Reported-by: Guenter Roeck <linux@roeck-us.net> Tested-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/c9fb4ab3-a5cb-648c-6de3-c6a871e60870@roeck-us.net
2020-12-11irqchip/bcm2836: Make IPIs use handle_percpu_devid_irq()Valentin Schneider
As done for the Arm GIC irqchips, move IPIs to handle_percpu_devid_irq() as handle_percpu_devid_fasteoi_ipi() isn't actually required. Signed-off-by: Valentin Schneider <valentin.schneider@arm.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20201109094121.29975-4-valentin.schneider@arm.com
2020-10-25irqchip/bcm2836: Fix missing __init annotationMarc Zyngier
bcm2836_arm_irqchip_smp_init() calls set_smp_ipi_range(), which has an __init annotation. Make sure the caller has the same annotation. Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Marc Zyngier <maz@kernel.org>
2020-09-17irqchip/bcm2836: Provide mask/unmask dummy methods for IPIsMarc Zyngier
Although it doesn't seem possible to disable individual mailbox interrupts, we still need to provide some callbacks. Fixes: 09eb672ce4fb ("irqchip/bcm2836: Configure mailbox interrupts as standard interrupts") Reported-by: Marek Szyprowski <m.szyprowski@samsung.com> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Marc Zyngier <maz@kernel.org>
2020-09-17irqchip/bcm2836: Configure mailbox interrupts as standard interruptsMarc Zyngier
In order to switch the bcm2836 driver to privide standard interrupts for IPIs, it first needs to stop lying about the way things work. The mailbox interrupt is actually a multiplexer, with enough bits to store 32 pending interrupts per CPU. So let's turn it into a chained irqchip. Once this is done, we can instanciate the corresponding IPIs, and pass them to the architecture code. Signed-off-by: Marc Zyngier <maz@kernel.org>
2018-12-13irqchip: bcm283x: Switch to SPDX identifierStefan Wahren
Adopt the SPDX license identifier headers to ease license compliance management. Cc: Simon Arlott <simon@arlott.org> Cc: Eric Anholt <eric@anholt.net> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2018-01-04irqchip/irq-bcm2836: Add support for DT interrupt polarityStefan Wahren
In order to properly define the polarity of the per-cpu interrupts, we need to support for a second property cell. But this must be optional to keep backward compatibility with old DT blobs. Suggested-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2017-09-25irqchip: bcm2836: Move SMP startup code to arch/arm (v2)Stefan Wahren
In order to easily provide SMP for BCM2837 on 32-bit and 64-bit the SMP startup code was placed in irq-bcm2836. That's not the right approach. So move this code where it belongs. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Fixes: 41f4988cc287 ("irqchip/bcm2836: Add SMP support for the 2836") Tested-by: Eric Anholt <eric@anholt.net> Acked-by: Marc Zyngier <marc.zyngier@arm.com>
2017-08-23irqchip: Convert to using %pOF instead of full_nameRob Herring
Now that we have a custom printf format specifier, convert users of full_name to use %pOF instead. This is preparation to remove storing of the full path string for each node. Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Lee Jones <lee@kernel.org> Cc: Stefan Wahren <stefan.wahren@i2se.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Ray Jui <rjui@broadcom.com> Cc: Scott Branden <sbranden@broadcom.com> Cc: bcm-kernel-feedback-list@broadcom.com Cc: Sylvain Lemieux <slemieux.tyco@gmail.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Chen-Yu Tsai <wens@csie.org> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Jonathan Hunter <jonathanh@nvidia.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: "Sören Brinkmann" <soren.brinkmann@xilinx.com> Cc: linux-rpi-kernel@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-mediatek@lists.infradead.org Cc: linux-tegra@vger.kernel.org Acked-by: Eric Anholt <eric@anholt.net> Acked-by: Baruch Siach <baruch@tkos.co.il> Acked-by: Vladimir Zapolskiy <vz@mleia.com> Acked-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Alexandre Torgue <alexandre.torgue@st.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2016-12-25cpu/hotplug: Cleanup state namesThomas Gleixner
When the state names got added a script was used to add the extra argument to the calls. The script basically converted the state constant to a string, but the cleanup to convert these strings into meaningful ones did not happen. Replace all the useless strings with 'subsys/xxx/yyy:state' strings which are used in all the other places already. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Sebastian Siewior <bigeasy@linutronix.de> Link: http://lkml.kernel.org/r/20161221192112.085444152@linutronix.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2016-07-29Merge branch 'smp-hotplug-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull smp hotplug updates from Thomas Gleixner: "This is the next part of the hotplug rework. - Convert all notifiers with a priority assigned - Convert all CPU_STARTING/DYING notifiers The final removal of the STARTING/DYING infrastructure will happen when the merge window closes. Another 700 hundred line of unpenetrable maze gone :)" * 'smp-hotplug-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (70 commits) timers/core: Correct callback order during CPU hot plug leds/trigger/cpu: Move from CPU_STARTING to ONLINE level powerpc/numa: Convert to hotplug state machine arm/perf: Fix hotplug state machine conversion irqchip/armada: Avoid unused function warnings ARC/time: Convert to hotplug state machine clocksource/atlas7: Convert to hotplug state machine clocksource/armada-370-xp: Convert to hotplug state machine clocksource/exynos_mct: Convert to hotplug state machine clocksource/arm_global_timer: Convert to hotplug state machine rcu: Convert rcutree to hotplug state machine KVM/arm/arm64/vgic-new: Convert to hotplug state machine smp/cfd: Convert core to hotplug state machine x86/x2apic: Convert to CPU hotplug state machine profile: Convert to hotplug state machine timers/core: Convert to hotplug state machine hrtimer: Convert to hotplug state machine x86/tboot: Convert to hotplug state machine arm64/armv8 deprecated: Convert to hotplug state machine hwtracing/coresight-etm4x: Convert to hotplug state machine ...
2016-07-14irqchip/bcm2836: Convert to hotplug state machineSebastian Andrzej Siewior
Install the callbacks via the state machine. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Anna-Maria Gleixner <anna-maria@linutronix.de> Acked-by: Jason Cooper <jason@lakedaemon.net> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: rt@linutronix.de Link: http://lkml.kernel.org/r/20160713153333.416260485@linutronix.de Signed-off-by: Ingo Molnar <mingo@kernel.org>
2016-06-23Merge branch 'irqchip/misc' into irqchip/coreJason Cooper
2016-06-13irqchip/bcm2836: Make bcm2836_smp_boot_secondary staticBen Dooks
The bcm2836_smp_boot_secondary() is not declared or used elsewhere so make it static to fix the following warning: drivers/irqchip/irq-bcm2836.c:227:12: warning: symbol 'bcm2836_smp_boot_secondary' was not declared. Should it be static? Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Link: https://lkml.kernel.org/r/1465407697-8116-1-git-send-email-ben.dooks@codethink.co.uk Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2016-06-04irqchip: bcm2835: Avoid arch/arm-specific handle_IRQEric Anholt
With commit 76ba59f8366f genirq: Add irq_domain-aware core IRQ handler architecture-specific irq handlers are no longer necessary. Update the bcm2835 irq driver to use the core irq handler. As a bonus, this allows the driver to support arm64 as well. Signed-off-by: Eric Anholt <eric@anholt.net> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Link: https://lkml.kernel.org/r/1464728727-16300-1-git-send-email-eric@anholt.net [jac reworded commit message for clarity] Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2016-05-11irqchip/bcm2836: Use a more generic memory barrier callEric Anholt
dsb() requires an argument on arm64, so we needed to add "sy". Instead, take this opportunity to switch to the same smp_wmb() call that gic uses for its IPIs. This is a less strong barrier than we were doing before (dmb(ishst) compared to dsb(sy)), but it seems to be the correct one. Signed-off-by: Eric Anholt <eric@anholt.net> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2016-05-11irqchip/bcm2836: Fix compiler warning on 64-bit buildEric Anholt
Signed-off-by: Eric Anholt <eric@anholt.net> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2016-05-11irqchip/bcm2836: Drop smp_set_ops on arm64 buildsEric Anholt
For arm64, the bootloader will instead be implementing the spin-table enable method. Signed-off-by: Eric Anholt <eric@anholt.net> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2016-02-18irqchip/bcm2836: Drop extra memory barrier in SMP boot.Eric Anholt
The writel() immediately after this has a barrier, anyway. Signed-off-by: Eric Anholt <eric@anholt.net> Link: https://lkml.kernel.org/r/1454620468-31303-1-git-send-email-eric@anholt.net Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2015-12-29irqchip/bcm2836: Make code more readableAndrea Merello
Avoid using hardcoded magics. We have a #define for this number. No functional changes. Signed-off-by: Andrea Merello <andrea.merello@gmail.com> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Eric Anholt <eric@anholt.net> Cc: linux-arm-kernel@lists.infradead.org Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Lee Jones <lee@kernel.org> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: linux-rpi-kernel@lists.infradead.org Link: http://lkml.kernel.org/r/1451166444-11044-5-git-send-email-eric@anholt.net Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-12-29irqchip/bcm2836: Tolerate IRQs while no flag is set in ISRAndrea Merello
On my RPi2 I got a lot of: unexpected IRQ trap at vector 00 This happens because bcm2836_arm_irqchip_handle_irq() is sometimes invoked even if the ISR is clear, and this case is not handled. This patch explicitly handle this case, fixing the kernel complaints about the bad IRQ lookup. Signed-off-by: Andrea Merello <andrea.merello@gmail.com> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Eric Anholt <eric@anholt.net> Cc: linux-arm-kernel@lists.infradead.org Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Lee Jones <lee@kernel.org> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: linux-rpi-kernel@lists.infradead.org Link: http://lkml.kernel.org/r/1451166444-11044-4-git-send-email-eric@anholt.net Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-12-29irqchip/bcm2836: Add SMP support for the 2836Andrea Merello
The firmware sets the secondaries spinning waiting for a non-NULL value to show up in the last IPI mailbox. The original SMP port from the downstream tree was done by Andrea, and Eric cleaned it up/rewrote it a few times from there. Signed-off-by: Andrea Merello <andrea.merello@gmail.com> Signed-off-by: Eric Anholt <eric@anholt.net> Cc: linux-arm-kernel@lists.infradead.org Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Lee Jones <lee@kernel.org> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: linux-rpi-kernel@lists.infradead.org Link: http://lkml.kernel.org/r/1451166444-11044-3-git-send-email-eric@anholt.net Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-12-29irqchip/bcm2836: Fix initialization of the LOCAL_IRQ_CNT timersEric Anholt
The irqchip's register area includes the the setup for the timer's scaling factors, and for the platform we want a fixed configuration of these registers. Signed-off-by: Eric Anholt <eric@anholt.net> Cc: linux-arm-kernel@lists.infradead.org Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Lee Jones <lee@kernel.org> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: linux-rpi-kernel@lists.infradead.org Link: http://lkml.kernel.org/r/1451166444-11044-2-git-send-email-eric@anholt.net Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-08-20irqchip: Add bcm2836 interrupt controller for Raspberry Pi 2Eric Anholt
This interrupt controller is the new root interrupt controller with the timer, PMU events, and IPIs, and the bcm2835's interrupt controller is chained off of it to handle the peripherals. I wrote the interrupt chip support, while Andrea Merello wrote the IPI code. Signed-off-by: Andrea Merello <andrea.merello@gmail.com> Signed-off-by: Eric Anholt <eric@anholt.net> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Cc: linux-rpi-kernel@lists.infradead.org Cc: Lee Jones <lee@kernel.org> Cc: Jason Cooper <jason@lakedaemon.net> Cc: linux-arm-kernel@lists.infradead.org Link: http://lkml.kernel.org/r/1438902033-31477-5-git-send-email-eric@anholt.net Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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