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path: root/drivers/hwtracing/coresight
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2016-07-15hwtracing/coresight-etm4x: Convert to hotplug state machineSebastian Andrzej Siewior
This driver has an asymmetry of ONLINE code without any corresponding tear down code. Otherwise, this is a straightforward conversion. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Anna-Maria Gleixner <anna-maria@linutronix.de> Acked-by: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-arm-kernel@lists.infradead.org Cc: rt@linutronix.de Link: http://lkml.kernel.org/r/20160713153337.228918408@linutronix.de Signed-off-by: Ingo Molnar <mingo@kernel.org>
2016-07-15hwtracing/coresight-etm3x: Convert to hotplug state machineRichard Cochran
This driver has an asymmetry of ONLINE code without any corresponding tear down code. Otherwise, this is a straightforward conversion. Signed-off-by: Richard Cochran <rcochran@linutronix.de> Signed-off-by: Anna-Maria Gleixner <anna-maria@linutronix.de> Reviewed-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Acked-by: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-arm-kernel@lists.infradead.org Cc: rt@linutronix.de Link: http://lkml.kernel.org/r/20160713153337.147128995@linutronix.de Signed-off-by: Ingo Molnar <mingo@kernel.org>
2016-06-16coresight: Handle build path errorSuzuki K Poulose
Enabling a component via sysfs (echo 1 > enable_source), would trigger building a path from the enabled sources to the sink. If there is an error in the process (e.g, sink not enabled or the device (CPU corresponding to ETM) is not online), we never report failure, except for leaving a message in the dmesg. Do proper error checking for the build path and return the error. Before: $ echo 0 > /sys/devices/system/cpu/cpu2/online $ echo 1 > /sys/devices/cs_etm/cpu2/enable_source $ echo $? 0 After: $ echo 0 > /sys/devices/system/cpu/cpu2/online $ echo 1 > /sys/devices/cs_etm/cpu2/enable_source -bash: echo: write error: No such device or address Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Acked-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-06-16coresight: Fix erroneous memset in tmc_read_unprepare_etrSuzuki K Poulose
At the end of a trace collection, we try to clear the entire buffer and enable the ETR back if it was already enabled. But, we would have adjusted the drvdata->buf to point to the beginning of the trace data in the trace buffer @drvdata->vaddr. So, the following code which clears the buffer is dangerous and can cause crashes, like below : memset(drvdata->buf, 0, drvdata->size); Unable to handle kernel paging request at virtual address ffffff800a145000 pgd = ffffffc974726000 *pgd=00000009f3e91003, *pud=00000009f3e91003, *pmd=0000000000000000 PREEMPT SMP Modules linked in: CPU: 4 PID: 1692 Comm: dd Not tainted 4.7.0-rc2+ #1721 Hardware name: ARM Juno development board (r0) (DT) task: ffffffc9734a0080 ti: ffffffc974460000 task.ti: ffffffc974460000 PC is at __memset+0x1ac/0x200 LR is at tmc_read_unprepare_etr+0x144/0x1bc pc : [<ffffff80083a05ac>] lr : [<ffffff800859c984>] pstate: 200001c5 ... [<ffffff80083a05ac>] __memset+0x1ac/0x200 [<ffffff800859b2e4>] tmc_release+0x90/0x94 [<ffffff8008202f58>] __fput+0xa8/0x1ec [<ffffff80082030f4>] ____fput+0xc/0x14 [<ffffff80080c3ef8>] task_work_run+0xb0/0xe4 [<ffffff8008088bf4>] do_notify_resume+0x64/0x6c [<ffffff8008084d5c>] work_pending+0x10/0x14 Code: 91010108 54ffff4a 8b040108 cb050042 (d50b7428) Since we clear the buffer anyway in the following call to tmc_etr_enable_hw(), remove the erroneous memset(). Fixes: commit de5461970b3e9e1 ("coresight: tmc: allocating memory when needed") Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-06-16coresight: Fix tmc_read_unprepare_etrSuzuki K Poulose
At the end of the trace capture, we free the allocated memory, resetting the drvdata->buf to NULL, to indicate that trace data was collected and the next trace session should allocate the memory in tmc_enable_etr_sink_sysfs. The tmc_enable_etr_sink_sysfs, we only allocate memory if drvdata->vaddr is not NULL (which is not performed at the end of previous session). This can cause, drvdata->vaddr getting assigned NULL and later we do memset() which causes a crash as below : Unable to handle kernel NULL pointer dereference at virtual address 00000000 pgd = ffffffc9747f0000 [00000000] *pgd=00000009f402e003, *pud=00000009f402e003, *pmd=0000000000000000 Internal error: Oops: 96000046 [#1] PREEMPT SMP Modules linked in: CPU: 0 PID: 1592 Comm: bash Not tainted 4.7.0-rc1+ #1712 Hardware name: ARM Juno development board (r0) (DT) task: ffffffc078fe0080 ti: ffffffc974178000 task.ti: ffffffc974178000 PC is at __memset+0x1ac/0x200 LR is at tmc_enable_etr_sink+0xf8/0x304 pc : [<ffffff80083a002c>] lr : [<ffffff800859be44>] pstate: 400001c5 sp : ffffffc97417bc00 x29: ffffffc97417bc00 x28: ffffffc974178000 Call trace: Exception stack(0xffffffc97417ba40 to 0xffffffc97417bb60) ba40: 0000000000000001 ffffffc974a5d098 ffffffc97417bc00 ffffff80083a002c ba60: ffffffc974a5d118 0000000000000000 0000000000000000 0000000000000000 ba80: 0000000000000001 0000000000000000 ffffff800859bdec 0000000000000040 baa0: ffffff8008b45b58 00000000000001c0 ffffffc97417baf0 ffffff80080eddb4 bac0: 0000000000000003 ffffffc078fe0080 ffffffc078fe0960 ffffffc078fe0940 bae0: 0000000000000000 0000000000000000 00000000007fffc0 0000000000000004 bb00: 0000000000000000 0000000000000040 000000000000003f 0000000000000000 bb20: 0000000000000000 0000000000000000 0000000000000000 0000000000000001 bb40: ffffffc078fe0960 0000000000000018 ffffffffffffffff 0008669628000000 [<ffffff80083a002c>] __memset+0x1ac/0x200 [<ffffff8008599814>] coresight_enable_path+0xa8/0x1dc [<ffffff8008599b10>] coresight_enable+0x88/0x1b8 [<ffffff8008599d88>] enable_source_store+0x3c/0x6c [<ffffff800845eaf4>] dev_attr_store+0x18/0x28 [<ffffff80082829e8>] sysfs_kf_write+0x54/0x64 [<ffffff8008281c30>] kernfs_fop_write+0x148/0x1d8 [<ffffff8008200128>] __vfs_write+0x28/0x110 [<ffffff8008200e88>] vfs_write+0xa0/0x198 [<ffffff80082021b0>] SyS_write+0x44/0xa0 [<ffffff8008084e70>] el0_svc_naked+0x24/0x28 Code: 91010108 54ffff4a 8b040108 cb050042 (d50b7428) This patch fixes the issue by clearing the drvdata->vaddr while we free the allocated buffer at the end of a session, so that we allocate the memory again. Cc: mathieu.poirier@linaro.org Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-06-16coresight: Fix NULL pointer dereference in _coresight_build_pathSuzuki K Poulose
_coresight_build_path assumes that all the connections of a csdev has the child_dev initialised. This may not be true if the particular component is not supported by the kernel config(e.g TPIU) but is present in the DT. In which case, building a path can cause a crash like this : Unable to handle kernel NULL pointer dereference at virtual address 00000010 pgd = ffffffc9750dd000 [00000010] *pgd=00000009f5e90003, *pud=00000009f5e90003, *pmd=0000000000000000 Internal error: Oops: 96000006 [#1] PREEMPT SMP Modules linked in: CPU: 4 PID: 1348 Comm: bash Not tainted 4.6.0-next-20160517 #1646 Hardware name: ARM Juno development board (r0) (DT) task: ffffffc97517a280 ti: ffffffc9762c4000 task.ti: ffffffc9762c4000 PC is at _coresight_build_path+0x18/0xe4 LR is at _coresight_build_path+0xc0/0xe4 pc : [<ffffff80083d5130>] lr : [<ffffff80083d51d8>] pstate: 20000145 sp : ffffffc9762c7ba0 [<ffffff80083d5130>] _coresight_build_path+0x18/0xe4 [<ffffff80083d51d8>] _coresight_build_path+0xc0/0xe4 [<ffffff80083d51d8>] _coresight_build_path+0xc0/0xe4 [<ffffff80083d51d8>] _coresight_build_path+0xc0/0xe4 [<ffffff80083d51d8>] _coresight_build_path+0xc0/0xe4 [<ffffff80083d51d8>] _coresight_build_path+0xc0/0xe4 [<ffffff80083d5cdc>] coresight_build_path+0x40/0x68 [<ffffff80083d5e14>] coresight_enable+0x74/0x1bc [<ffffff80083d60a0>] enable_source_store+0x3c/0x6c [<ffffff800830b17c>] dev_attr_store+0x18/0x28 [<ffffff80081ca9c4>] sysfs_kf_write+0x40/0x50 [<ffffff80081c9e38>] kernfs_fop_write+0x140/0x1cc [<ffffff8008163ec8>] __vfs_write+0x28/0x110 [<ffffff8008164bf0>] vfs_write+0xa0/0x174 [<ffffff8008165d18>] SyS_write+0x44/0xa0 [<ffffff8008084e70>] el0_svc_naked+0x24/0x28 Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-05-03coresight: etb10: adjust read pointer only when neededMathieu Poirier
The read pointer (read_ptr) needs to be adjusted only if its value has gone beyond the length of the memory buffer. Reported-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-05-03coresight: configuring ETF in FIFO mode when acting as linkMathieu Poirier
When part of a path but not identified as a sink, the EFT has to be configured as a link and placed in HW FIFO mode. As such when enabling a path, call the right configuration function based on the role the ETF if playing in this trace run. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-05-03coresight: tmc: implementing TMC-ETF AUX space APIMathieu Poirier
This patch implement the AUX area interfaces required to use the TMC (configured as an ETF) from the Perf sub-system. The heuristic is heavily borrowed from the ETB10 implementation. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-05-03coresight: moving struct cs_buffers to header fileMathieu Poirier
That way we can re-use the structure in other drivers. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-05-03coresight: tmc: keep track of memory widthMathieu Poirier
Accessing the HW configuration register each time the memory width is needed simply doesn't make sense. It is much more efficient to read the value once and keep a reference for later use. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-05-03coresight: tmc: make sysFS and Perf mode mutually exclusiveMathieu Poirier
The sysFS and Perf access methods can't be allowed to interfere with one another. As such introducing guards to access functions that prevents moving forward if a TMC is already being used. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-05-03coresight: tmc: dump system memory content only when neededMathieu Poirier
Calling tmc_etf/etr_dump_hw() is required only when operating from sysFS. When working from Perf, the system memory is harvested from the AUX trace API. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-05-03coresight: tmc: adding mode of operation for link/sinksMathieu Poirier
Moving tmc_drvdata::enable to a local_t mode. That way the sink interface is aware of it's orgin and the foundation for mutual exclusion between the sysFS and Perf interface can be laid out. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-05-03coresight: tmc: getting rid of multiple read accessMathieu Poirier
Allowing multiple readers to access the trace data simultaniously via sysFS provides no shortage of opportunity for race condition, mandates two variable to be maintained (drvdata::read_count and drvdata::reading), makes the code complex and provide little advantages, if any. This patch streamlines the read process by restricting trace data access to a single user. That way drvdata::read_count can be eliminated and race conditions (along with faulty error handling) in function tmc_open() and tmc_release() eliminated. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-05-03coresight: tmc: allocating memory when neededMathieu Poirier
In it's current form the TMC probe() function allocates trace buffer memory at boot time, event if coresight isn't used. This is highly inefficient since trace buffers can occupy a lot of memory that could be used otherwised. This patch allocates trace buffers on the fly, when the coresight subsystem is solicited. Allocated buffers are released when traces are read using the device descriptors under /dev. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-05-03coresight: tmc: making prepare/unprepare functions genericMathieu Poirier
Dealing with HW related matters in tmc_read_prepare/unprepare becomes convoluted when many cases need to be handled distinctively. As such moving processing related to HW setup to individual driver files and keep the core driver generic. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-05-03coresight: tmc: splitting driver in ETB/ETF and ETR componentsMathieu Poirier
The TMC block can operate in 3 modes (ETB, ETF and ETR) and accessed via two interfaces (sysFS and Perf). That makes 6 mode to cover, which is way too much coupling for a single file. This patch splits the original TMC driver in 2 halves, one for ETB/ETF and another one for ETR mode. A common core is kept for functionality common to all 3 modes. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-05-03coresight: tmc: cleaning up header fileMathieu Poirier
This patch first move the TMC_STS_TMCREADY_BIT and TMC_FFCR_FLUSHMAN_BIT defines to their respective section. It also removes TMC_FFCR_FLUSHMAN, since the same result can easily be obtained using the BIT() macro. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-05-03coresight: tmc: introducing new header fileMathieu Poirier
The amount of #define, enumeration and structure definition is big enough to justify moving them to a new header file. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-05-03coresight: tmc: clearly define number of transfers per burstMathieu Poirier
This patch makes the name of the define reflect the amount of data tranfers per burst, in this case 16. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-05-03coresight: tmc: re-implementing tmc_read_prepare/unprepare() functionsMathieu Poirier
In their current implementation the tmc_read_prepare/unprepare() are a lump of if/else that is difficult to read. This patch is alleviating that by using a switch statement. The latter also allows for a better control on the error path. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-05-03coresight: tmc: waiting for TMCReady bit before programmingMathieu Poirier
According to the TRM before programming the TMC in circular buffer mode (and that for any configuration, ETB, ETR, ETF), the TMCReady bit in the status register has to be set. This patch adds a check to make sure the state machine is in a state where it can be configured, and complains otherwise. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-05-03coresight: tmc: modifying naming conventionMathieu Poirier
According to the TMC architectural state machine, the 'stopped' state is reached when bit 2 (TMCReady) of the TMC Status register turns to '1'. The code is correct but the naming convention isn't. The 'Triggered' bit occupies position '1' of the TMC Status register and has nothing to do with the indication of the TMC entering the stopped state. As such renaming function "tmc_wait_for_triggered()" and changing the #define to reflect what the code is really doing. This patch has no effect other than clarifying the semantic. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-05-03coresight: tmc: adding sysFS management entriesMathieu Poirier
Adding management registers that convey implementation specific characteristics. Those are useful for trace configuration and collection along with general trouble shooting. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-05-03coresight: etm4x: add tracer ID for A72 Maia processor.Li Pengcheng
This patch adds a cellID for the ETMv4 tracer found on HiSillicon's A72 Maia processor. Signed-off-by: Li Pengcheng <lipengcheng8@huawei.com> Signed-off-by: Li Zhong <lizhong11@hisilicon.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-05-03coresight: etb10: fixing the right amount of words to readMathieu Poirier
This patch rectifies the amount of words to read when the internal buffer is deemed bigger than the amount of space available in the perf ring buffer. The amount to read is set to the amount of space in the perf ring buffer rather than being subtracted by it. Reported-by: Suzuki K Poulose <Suzuki.Poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-05-03coresight: stm: adding driver for CoreSight STM componentPratik Patel
This driver adds support for the STM CoreSight IP block, allowing any system compoment (HW or SW) to log and aggregate messages via a single entity. The CoreSight STM exposes an application defined number of channels called stimulus port. Configuration is done using entries in sysfs and channels made available to userspace via configfs. Signed-off-by: Pratik Patel <pratikp@codeaurora.org> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Reviewed-by: Michael Williams <michael.williams@arm.com> Signed-off-by: Chunyan Zhang <zhang.chunyan@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-05-03coresight: adding path for STM deviceMathieu Poirier
>From a core framework point of view an STM device is a source that is treated the same way as any other tracers. Unlike tracers though STM devices are not associated with a CPU. As such it doesn't make sense to associate the path from an STM device to its sink with a per-cpu variable as it is done for tracers. This patch simply adds another global variable to keep STM paths and the processing in coresight_enable/disable() is updated to deal with STM devices properly. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Chunyan Zhang <zhang.chunyan@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-05-03coresight: etm4x: modify q_support typeLi Pengcheng
Because this operation exceed the range of boolean, so we should modify q_support to unit8 bit. drvdata->q_support = BMVAL(etmidr0, 15, 16) Signed-off-by: Li Pengcheng <lipengcheng8@huawei.com> Signed-off-by: Li Zhong <lizhong11@hisilicon.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-05-03coresight: no need to do the forced type conversionLi Pengcheng
activated and enable are already unsigned type, no need to change them to unsigned. Signed-off-by: Li Pengcheng <lipengcheng8@huawei.com> Signed-off-by: Li Zhong <lizhong11@hisilicon.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-05-01coresight: removing gratuitous boot time log messagesMathieu Poirier
Removing boot time log for drivers that don't report useful information other than they came up properly. The same information can be found in sysFS once the system has booted and as such doesn't provide any value in the boot log. Reported-by: Mark Brown <broonie@linaro.org> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-05-01coresight: etb10: splitting sysFS "status" entryMathieu Poirier
The sysFS "status" entry conveys a wealth of information about the status of the HW but goes agains the sysFS rule of one topic per file. This patch rectify the situation by adding read-only entries for each of the field formaly displayed by "status". The ABI documentation is kept up to date. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-05-01coresight: moving coresight_simple_func() to header fileMathieu Poirier
Macro "coresight_simple_func()" can be used by several drivers. As such making the structure type generic and moving to a globally available header file. That way individual drivers can use the functionality by simply specifying the structure they need to work with. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-05-01coresight: etm4x: implementing the perf PMU APIMathieu Poirier
Adding a set of API allowing the Perf core to treat ETMv4 tracers like other PMUs. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-05-01coresight: etm4x: implementing user/kernel mode tracingMathieu Poirier
Adding new mode to limit tracing to kernel or user space. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-05-01coresight: etm4x: moving etm_drvdata::enable to atomic fieldMathieu Poirier
Similarly to ETMv3, moving etmv4_drvdata::enable to an atomic type that gives the 'mode' of a tracer and prevents multiple, simultanious access by different subsystems. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-05-01coresight: etm4x: unlocking tracers in default arch initMathieu Poirier
As with the ETMv3.x driver, calling 'smp_call_function_single()' twice in a row is highly ineffective. As such moving function 'etm4_os_unlock()' before the default initialisation takes place, which results in the same outcome. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-05-01coresight: etm4x: splitting etmv4 default configurationMathieu Poirier
Splitting and updating the default initialisation for each etmv4 configuration so that it can be called at the beginning of each session rather than initialisation time only. Since the trace ID isn't expected to change with every session, moving it with the default tracer initialisation. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-05-01coresight: etm4x: splitting struct etmv4_drvdataMathieu Poirier
Similar to what was done on etm3x, splitting driver structure etmv4_drvdata in two. One half is concerned with the HW characteristics that are generally static in nature. The other half deals with user configuration and will change from one trace session to another. No gain/loss of functionality is incurred from this patch. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-05-01coresight: etm4x: adding config and traceid registersMathieu Poirier
Adding new sysFS management interface to query the configuration and the traceid registers. Both are required to convey information to the perf cmd line tools when using ETMv4 tracers as PMU. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-05-01coresight: etm4x: moving sysFS entries to a dedicated fileMathieu Poirier
As with the etm3x driver, sysFS entries are big enough to justify their own file. As such moving all sysFS related declarations to a dedicated location. No gain/loss of functionality is incurred from this patch. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-03-05drivers/hwtracing: make coresight-etm-perf.c explicitly non-modularPaul Gortmaker
In commit 941943cf519f7cacbbcecee5c4ef4b77b466bd5c ("drivers/hwtracing: make coresight-* explicitly non-modular") we removed all uses of modular functions/macros in favour of their built-in equivlents in this subsystem. However that commit and commit 0bcbf2e30ff2271b54f54c8697a185f7d86ec6e4 ("coresight: etm-perf: new PMU driver for ETM tracers") were in flight at the same time, and hence one new non-modular user of module_init crept back in. Fix it up like we did all the others. Since module_init translates to device_initcall in the non-modular case, the init ordering remains unchanged with this commit. Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Acked-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-02-20drivers/hwtracing: make coresight-* explicitly non-modularPaul Gortmaker
None of the Kconfig currently controlling compilation of any of the files here are tristate, meaning that none of it currently is being built as a module by anyone. We need not be concerned about .remove functions and blocking the unbind sysfs operations, since that was already done in a recent commit. Lets remove any remaining modular references, so that when reading the drivers there is no doubt they are builtin-only. All drivers get mostly the same changes, so they are handled in batch. Changes are (1) convert to builtin_amba_driver, (2) delete module.h include where unused, and (3) relocate the description into the comments so we don't need MODULE_DESCRIPTION and associated tags. The etm3x and etm4x use module_param_named, and have been adjusted to just include moduleparam.h for that purpose. In commit f309d4443130bf814e991f836e919dca22df37ae ("platform_device: better support builtin boilerplate avoidance") we introduced the builtin_driver macro. Here we use that support and extend it to amba driver registration, so where a driver is clearly non-modular and builtin-only, we can update with the simple mapping of module_amba_driver(...) ---> builtin_amba_driver(...) Since module_amba_driver() uses the same init level priority as builtin_amba_driver() the init ordering remains unchanged with this commit. Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-02-20coresight: introducing a global trace ID functionMathieu Poirier
TraceID values have to be unique for all tracers and consistent between drivers and user space. As such introducing a central function to be used whenever a traceID value is required. The patch also account for data traceIDs, which are usually I(N) + 1. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-02-20coresight: etm-perf: new PMU driver for ETM tracersMathieu Poirier
Perf is a well known and used tool for performance monitoring and much more. A such it is an ideal candidate for integration with coresight based HW tracing. This patch introduces a PMU that represent a coresight tracer to the Perf core. Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-02-20coresight: etb10: implementing AUX APIMathieu Poirier
Adding an ETB10 specific AUX area operations to be used by the perf framework when events are initialised. Part of this operation involves modeling the mmap'ed area based on the specific ways a sink buffer gathers information. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-02-20coresight: etb10: adding operation mode for sink->enable()Mathieu Poirier
Adding an operation mode to the sink->enable() API in order to prevent simultaneous access from different callers. TPIU and TMC won't be supplemented with the AUX area API immediately and as such ignore the new mode. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-02-20coresight: etb10: moving to local atomic operationsMathieu Poirier
Moving to use local atomic operations to take advantage of the lockless implementation, something that will come handy when the ETB is accessed from the Perf subsystem. Also changing the name of the variable to something more meaningful. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-02-20coresight: etm3x: implementing perf_enable/disable() APIMathieu Poirier
That way traces can be enabled and disabled automatically from the Perf subystem using the PMU abstraction. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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