| Age | Commit message (Collapse) | Author |
|---|
|
Change hwspinlock to a bool in case some drivers will meet dependency
issue when hwspinlock is built as a module.
Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
|
|
The Spreadtrum hardware spinlock device can provide hardware assistance
for synchronization between the multiple subsystems.
Signed-off-by: Baolin Wang <baolin.wang@spreadtrum.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
|
|
So that there's no need to get into the submenu to disable all related config
entries.
Signed-off-by: Vincent Legoll <vincent.legoll@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
|
|
Add hwspinlock support for the CSR atlas7 SoC.
The Hardware Spinlock device on atlas7 provides hardware assistance
for synchronization between the multiple processors in the system
(dual Cortex-A7, CAN bus Cortex-M3 and audio DSP).
Reviewed-by: Suman Anna <s-anna@ti.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Wei Chen <wei.chen@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
|
|
Add driver for Qualcomm Hardware Mutex block found in many Qualcomm
SoCs.
Based on initial effort by Kumar Gala <galak@codeaurora.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Reviewed-by: Andy Gross <agross@codeaurora.org>
Reviewed-by: Jeffrey Hugo <jhugo@codeaurora.org>
Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
|
|
HwSpinlocks are supported on TI's AM33xx, AM43xx and DRA7xx SoC
device families as well. The IPs are identical to that of
OMAP4/OMAP5, except for the number of locks.
Add a depends on to the above family of SoCs to enable the
build support for OMAP hwspinlock driver for any of the above
SoC configs.
Signed-off-by: Suman Anna <s-anna@ti.com>
[small commit log changes]
Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
|
|
OMAP5 has spinlocks, too.
Signed-off-by: Vincent Stehlé <v-stehle@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
|
|
Add hwspinlock driver for U8500's Hsem hardware.
At this point only HSem's protocol 1 is used (i.e. no interrupts).
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
[ohad@wizery.com: adopt recent hwspin_lock_{un}register API changes]
[ohad@wizery.com: set the owner member of the driver]
[ohad@wizery.com: mark ->remove() function as __devexit]
[ohad@wizery.com: write commit log]
[ohad@wizery.com: small cleanups]
Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
|
|
Simplify hwspinlock's Kconfig by making the global CONFIG_HWSPINLOCK
entry invisible; users will just select it when needed.
This also prepares the ground for adding hwspinlock support for other
platforms (the 'depends on ARCH_OMAP4' was rather hideous, and while
we're at it, a dedicated menu is added).
Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
|
|
Currently only OMAP4 supports hwspinlocks, so don't bother asking
anyone else.
Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
|
Add hwspinlock support for the OMAP4 Hardware Spinlock device.
The Hardware Spinlock device on OMAP4 provides hardware assistance
for synchronization between the multiple processors in the system
(dual Cortex-A9, dual Cortex-M3 and a C64x+ DSP).
[ohad@wizery.com: adapt to hwspinlock framework, tidy up]
Signed-off-by: Simon Que <sque@ti.com>
Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com>
Signed-off-by: Krishnamoorthy, Balaji T <balajitk@ti.com>
Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
|
Add a platform-independent hwspinlock framework.
Hardware spinlock devices are needed, e.g., in order to access data
that is shared between remote processors, that otherwise have no
alternative mechanism to accomplish synchronization and mutual exclusion
operations.
Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
Cc: Hari Kanigeri <h-kanigeri2@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Russell King <linux@arm.linux.org.uk>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
|
