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path: root/drivers/gpu/drm
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2018-12-18drm/amd/display: Don't log error if we have no connectorsHarry Wentland
[Why] In certain configurations, such as PX configs or some Vega20 parts DC gets created without connectors. [How] Drop the dm_error print when no connectors. Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-12-18drm/amd/display: Add functionality to get XGMI SS infoLeo Li
[Why] When XGMI is enabled, the DP reference clock needs to be adjusted according to the XGMI spread spectrum percentage and mode. But first, we need the ability to fetch this info. [How] Within the BIOS parser, Read from vBIOS when XGMI SS info is requested. In addition, diags build uses include_legacy/atomfirmware.h for the smu_info_v3_3 table headers. Update that as well. Signed-off-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-12-18drm/amd/display: Add DCE_VERSION_12_1 enum for Vega 20Leo Li
[Why] We'll need a way to differentiate Vega 20 in DC [How] Add a DCE_VERSION_12_1 enum, which will be returned as the DC version if the ASIC used is a Vega 20. Signed-off-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: David Francis <David.Francis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-12-18drm/amd/display: Add below the range support for FreeSyncNicholas Kazlauskas
[Why] When the flip-rate is below the minimum supported variable refresh rate range for the monitor the front porch wait will timeout and be frequently misaligned resulting in stuttering and/or flickering. The FreeSync module can still maintain a smooth and flicker free image when the monitor has a refresh rate range such that the maximum refresh > 2 * minimum refresh by utilizing low framerate compensation, "below the range". [How] Hook up the pre-flip and post-flip handlers from the FreeSync module. These adjust the minimum/maximum vrr range to duplicate frames when appropriate by tracking flip timestamps. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-12-18drm/amd/display: Raise dispclk value for PolarisRoman Li
[Why] The visual corruption due to low display clock value observed on some systems [How] There was earlier patch for dspclk: 'drm/amd/display: Raise dispclk value for dce_update_clocks' Adding +15% workaround also to to dce112_update_clocks Signed-off-by: Roman Li <Roman.Li@amd.com> Reviewed-by: Leo Li <Sunpeng.Li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-12-18drm/amd/display: Skip fast cursor updates for fb changesNicholas Kazlauskas
[Why] The behavior of drm_atomic_helper_cleanup_planes differs depending on whether the commit was asynchronous or not. When it's called from amdgpu_dm_atomic_commit_tail during a typical atomic commit the plane state has been swapped so it calls cleanup_fb on the old plane state. However, in the asynchronous commit codepath the call to drm_atomic_helper_commit also calls dm_plane_helper_cleanup_fb after atomic_async_update has been called. Since the plane state is updated in place and has not been swapped the cleanup_fb call affects the new plane state. This results in a use after free for the given sequence: - Fast update, fb1 pin/ref, fb1 unpin/unref - Fast update, fb2 pin/ref, fb2 unpin/unref - Slow update, fb1 pin/ref, fb2 unpin/unref - Fast update, fb2 pin/ref -> use after free. bug [How] Disallow framebuffer changes in the fast path. Since this includes a NULL framebuffer, this means that only framebuffers that have been previously pin+ref at least once will be used, preventing a use after free. This has a significant throughput reduction for cursor updates where the framebuffer changes. For most desktop usage this isn't a problem, but it does introduce performance regressions for two specific IGT tests: - cursor-vs-flip-toggle - cursor-vs-flip-varying-size Fixes: 2cc751931afc ("drm/amd/display: Add fast path for cursor plane updates") Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-12-18drm/amdgpu: correct the return value for error caseEvan Quan
It should not return 0 for error case as '0' is actually a special value for index. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-12-18drm/amdkfd: Fix handling of return code of dma_buf_getFelix Kuehling
On errors, dma_buf_get returns a negative error code, rather than NULL. Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-12-18drm/amdgpu:Improves robustness of SOC15_WAIT_ON_RREGJames Zhu
If register value is updating, reset timeout counter. It improves robustness of SOC15_WAIT_ON_RREG. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-12-18drm/amdgpu/vcn:Remove bit 31 for scratch2 to indicate the WA is activeJames Zhu
Remove bit 31 for scratch2 to indicate the Hardware bug work around is active. Signed-off-by: James Zhu <James.Zhu@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-12-18drm/amdgpu/vcn:Scan enc/jpeg fences to init dpg pause new stateJames Zhu
Scan enc/jpeg fences to init dpg pause new state in begin use. It will help set dpg mode to desire state actively. Signed-off-by: James Zhu <James.Zhu@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-12-18drm/amdgpu/vcn:Always check all vcn ring status during dpg mode stopJames Zhu
Always check all vcn ring status during dpg mode stop, it will help identify which vcn ring may cause the issue. Signed-off-by: James Zhu <James.Zhu@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-12-18drm/amdgpu/vcn:Update ring point to JPEG before init JPEG wptrJames Zhu
It is a bug fix. Signed-off-by: James Zhu <James.Zhu@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-12-18drm/amdgpu/vcn:Always gate vcn block during hw finishingJames Zhu
Under Dynamic Power Gate mode, UVD_STATUS needn't be checked. Signed-off-by: James Zhu <James.Zhu@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-12-18drm/amdgpu/vcn: Update vcn.cur_state during suspendJames Zhu
Replace vcn_v1_0_stop with vcn_v1_0_set_powergating_state during suspend, to keep adev->vcn.cur_state update. It will fix VCN S3 hung issue. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-12-14drm/amdgpu: WARN once if amdgpu_bo_unpin is called for an unpinned BOMichel Dänzer
It indicates a pin/unpin imbalance bug somewhere. While the bug isn't necessarily in the call chain hitting this, it's at least one part involved. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-12-14drm/amdgpu: enable Vega20 page queue supportEvan Quan
Page queue is supported on Vega20 with SDMA firmware 123 onwards. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-12-14drm/amdgpu: use different irq ring ID for Vega20 page queuesEvan Quan
Vega20 uses ring id 1 for page queues EOP irq while previous ASICs take ring id 3. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-12-14drm/amdgpu: update the vm invalidation engine layout V2Evan Quan
We need new invalidation engine layout due to new SDMA page queues added. V2: fix coding style and add correct return value Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Oak Zeng <Oak.Zeng@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-12-14drm/amdgpu: increase the MAX ring numberEvan Quan
As two more SDMA page queue rings are added on Vega20. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Oak Zeng <Oak.Zeng@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-12-14drm/amdgpu: fix NULL fence handling in amdgpu_cs_fence_to_handle_ioctlChristian König
When the fence is already signaled it is perfectly normal to get a NULL fence here. But since we can't export that we need to use a stub fence. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-12-14drm/amdgpu/psp: Correct and refine the vmr support. (v2)Emily Deng
Currently driver only psp v11 support vmr. v2: squash in unused variable removal (Alex) Signed-off-by: Emily Deng <Emily.Deng@amd.com> Reviewed-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-12-14drm/amdgpu/psp_v3_1: Get psp fw version through reading registerEmily Deng
If PSP FW is running already, driver will not load PSP FW again and skip it. So psp fw version is not correct if reading it from FW binary file, need to get right version from register. Signed-off-by: Emily Deng <Emily.Deng@amd.com> Reviewed-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-12-14drm/amdgpu: access register without KIQEmily Deng
There is no need to access register such as mmSMC_IND_INDEX_11 and mmSMC_IND_DATA_11, PCIE_INDEX, PCIE_DATA through KIQ because they are VF-copy. Signed-off-by: Emily Deng <Emily.Deng@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-12-14drm/amdgpu: kfd_pre_reset outside req_full_gpu cause sriov hangwentalou
XGMI hive put kfd_pre_reset into amdgpu_device_lock_adev, but outside req_full_gpu of sriov. It would make sriov hang during reset. Signed-off-by: Wentao Lou <Wentao.Lou@amd.com> Reviewed-by: Shaoyun Liu <Shaoyun.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-12-14Merge tag 'vmwgfx-next-2018-12-13' of ↵Dave Airlie
git://people.freedesktop.org/~thomash/linux into drm-next Pull request of 2018-12-13 Two minor fixes for next pull. Signed-off-by: Dave Airlie <airlied@redhat.com> From: Thomas Hellstrom <thellstrom@vmware.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181213130848.3080-1-thellstrom@vmware.com
2018-12-13Merge tag 'drm-msm-next-2018-12-12' of ↵Dave Airlie
git://people.freedesktop.org/~robclark/linux into drm-next This time around, seeing some love for some older hw: - a2xx gpu support for apq8060 (hp touchpad) and imx5 (headless gpu-only mode) - a2xx gpummu support (a2xx was pre-iommu) - mdp4 display support for apq8060/touchpad For display/dpu: - a big pile of continuing dpu fixes and cleanups On the gpu side of things: - per-submit statistics and traceevents for better profiling - a6xx crashdump support - decouple get_iova() and page pinning.. so we can unpin from physical memory inactive bo's while using softpin to lower cpu overhead - new interface to set debug names on GEM BOs and debugfs output improvements - additional submit flag to indicate buffers that are used to dump (so $debugfs/rd cmdstream dumping is useful with softpin + state-objects) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Rob Clark <robdclark@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGvVvLPD9_Z4kyfGe98Y--byj6HbxHivEYSgF7Rq7=bFnw@mail.gmail.com
2018-12-13Merge branch 'linux-4.21' of git://github.com/skeggsb/linux into drm-nextDave Airlie
Mostly just initial support for Turing TU104/TU106 chipsets. Support for TU102 is missing as I don't yet have HW, but it should be trivial to add in later in the merge window (in theory). It's a bit of a rough first pass that'll get improved in future releases as a finish figuring out some of the other HW changes, but it's good enough as it stands for modesetting and suspend/resume etc. Acceleration bring-up is incomplete due to NVIDIA not yet having provided FW images for me to use, though command submission and copy engines are functional already. Signed-off-by: Dave Airlie <airlied@redhat.com> From: Ben Skeggs <skeggsb@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/CACAvsv7KmfcQqZcx+wh_1UKjTovp4PH_5UVMfeyxUu-M9WLZfw@mail.gmail.com
2018-12-13Merge tag 'drm/tegra/for-4.21-rc1' of ↵Dave Airlie
git://anongit.freedesktop.org/tegra/linux into drm-next drm/tegra: Changes for v4.21-rc1 These changes contain a couple of minor fixes for host1x and the Falcon library in Tegra DRM. There are also a couple of missing pieces that finally enable support for host1x, VIC and display on Tegra194. I've also added a patch that enables audio over HDMI using the SOR which has been tested, and works, on both Tegra186 and Tegra194. Signed-off-by: Dave Airlie <airlied@redhat.com> From: Thierry Reding <thierry.reding@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181207134712.32683-1-thierry.reding@gmail.com
2018-12-13Merge branch 'drm-next-4.21' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie
into drm-next [airlied: make etnaviv build again] amdgpu: - DC trace support - More DC documentation - XGMI hive reset support - Rework IH interaction with KFD - Misc fixes and cleanups - Powerplay updates for newer polaris variants - Add cursor plane update fast path - Enable gpu reset by default on CI parts - Fix config with KFD/HSA not enabled amdkfd: - Limit vram overcommit - dmabuf support - Support for doorbell BOs ttm: - Support for simultaneous submissions to multiple engines scheduler: - Add helpers for hw with preemption support Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexdeucher@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181207233119.16861-1-alexander.deucher@amd.com
2018-12-12drm/amd/display: Add fast path for cursor plane updatesNicholas Kazlauskas
[Why] Legacy cursor plane updates from drm helpers go through the full atomic codepath. A high volume of cursor updates through this slow code path can cause subsequent page-flips to skip vblank intervals since each individual update is slow. This problem is particularly noticeable for the compton compositor. [How] A fast path for cursor plane updates is added by using DRM asynchronous commit support provided by async_check and async_update. These don't do a full state/flip_done dependency stall and they don't block other commit work. However, DC still expects itself to be single-threaded for anything that can issue register writes. Screen corruption or hangs can occur if write sequences overlap. Every call that potentially perform register writes needs to be guarded for asynchronous updates to work. The dc_lock mutex was added for this. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106175 Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Acked-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-12-12drm/amdgpu: Enable GPU recovery by default for CIAndrey Grodzovsky
I retested Bonaire (gfx7 dGPU) and it works fine. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-12-11drm/amd/display: Fix duplicating scaling/underscan connector stateNicholas Kazlauskas
[Why] These properties aren't being carried over when the atomic state. This tricks atomic check and commit tail into performing underscan and scaling operations when they aren't needed. With the patch that forced scaling/RMX_ASPECT on by default this results in many unnecessary surface updates and hangs under certain conditions. [How] Duplicate the properties. Fixes: 91b66c47ba34 ("drm/amd/display: Set RMX_ASPECT as default") Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-12-11drm/amd/display: Fix unintialized max_bpc state valuesNicholas Kazlauskas
[Why] If the "max bpc" isn't explicitly set in the atomic state then it have a value of 0. This has the correct behavior of limiting a panel to 8bpc in the case where the panel supports 8bpc. In the case of eDP panels this isn't a true assumption - there are panels that can only do 6bpc. Banding occurs for these displays. [How] Initialize the max_bpc when the connector resets to 8bpc. Also carry over the value when the state is duplicated. Bugzilla: https://bugs.freedesktop.org/108825 Fixes: 307638884f72 ("drm/amd/display: Support amdgpu "max bpc" connector property") Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-12-11Revert "drm/amd/display: Set RMX_ASPECT as default"Nicholas Kazlauskas
This reverts commit 91b66c47ba3468f7882ea4a84d5e0e0c186b638f. Forcing RMX_ASPECT as default uses the preferred/native mode's timings for any mode the user selects and scales the image. This provides a a consistently nicer result in the case where the selected mode's refresh rate matches the native mode's refresh but this isn't always the case. For example, if the monitor is 1080p@144Hz and the preferred mode is 60Hz then even if the user selects 1080p@144Hz as their selected mode they'll get 1080p@60Hz. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-12-11drm/amdgpu: Fix stub function nameKuehling, Felix
This function was renamed in a previous commit. Update the stub function name for builds with CONFIG_HSA_AMD disabled. Fixes: 611736d8447c ("drm/amdgpu: Add KFD VRAM limit checking") Acked-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-12-11drm/msm/dpu: Fix clock issue after bind failureJayant Shekhar
In case of msm drm bind failure, pm runtime put sync is called from dsi driver which issues an asynchronous put on mdss device. Subsequently when dpu_mdss_destroy is triggered the change will make sure to put the mdss device in suspend and clearing pending work if not scheduled. Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm/dpu: Clean up dpu_media_info.h static inline functionsJordan Crouse
Do some cleanup in the static inline functions defined in dpu_media_info.h by cleaning up gotos and unneeded local variables. v3: Added spaces between operators per Seal Paul and Sam Ravnborg Reviewed-by: Sean Paul <sean@poorly.run> Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm/dpu: Further cleanups for static inline functionsJordan Crouse
Remove more static inline functions that are lightly used and/or very simple and easy to build into the calling functions. v3: Fix a nit from Sean Paul v2: Removed another unused function from dpu_hw_lm.c and add back dpu_crtc_get_client_type() since there was a question regarding its usefulness. Reviewed-by: Sean Paul <sean@poorly.run> Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm/dpu: Cleanup the debugfs functionsJordan Crouse
Do some debugfs cleanups from across the DPU driver. The DRM destroy functions will do a recursive delete on the entire debugfs node so there is no need to store dentry pointers for the debugfs files that are persistent for the life of the driver. This also means that the destroy functions can go away too. Also, use standard API functions where applicable instead of using hand written code. v3: No changes v2: Add more code; most of the dpu debugfs files should be addressed now. Reviewed-by: Sean Paul <sean@poorly.run> Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm/dpu: Remove dpu_irq and unused functionsJordan Crouse
dpu_irq.c does some unneeded checks and passes control to dpu_core_irq.c The simple functions can be defined in the same file where we use them and the files and their associated hangers on can be deleted. Additionally the postinstall hook isn't used even in dpu_core_irq.c so zap that entire path. v3: No changes Reviewed-by: Sean Paul <sean@poorly.run> Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm: Make irq_postinstall optionalJordan Crouse
Allow the KMS operation 'irq_postinstall' to be optional so that the target display drivers don't need to define a dummy function if they don't need one. v3: No changes Reviewed-by: Sean Paul <sean@poorly.run> Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm/dpu: Cleanup callers of dpu_hw_blk_initJordan Crouse
Outside of superfluous parameter checks the dpu_hw_blk_init() doesn't have any failure paths. Switch it over to be a void function and we can remove error handling paths in all the functions that call it. While we're in those functions remove unneeded initialization for a static variable. v3: No changes v2: Removed a cleanup intended for a different patch Reviewed-by: Sean Paul <sean@poorly.run> Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm/dpu: Remove unused functionsJordan Crouse
Remove some unused container_of() helper functions. v3: No changes v2: Retained still used helper functions in the name of readability Reviewed-by: Sean Paul <sean@poorly.run> Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm/dpu: Remove dpu_crtc_is_enabled()Jordan Crouse
The static inline function dpu_crtc_enabled() is only called once and the function that calls it in turn is only called once and the return value can be easily checked in the calling functions so collapse everything down. v3: No changes Reviewed-by: Sean Paul <sean@poorly.run> Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm/dpu: Remove dpu_crtc_get_mixer_heightJordan Crouse
dpu_crtc_get_mixer_height() is only used once and the value it returns can be easily derived from the calling function. v3: No changes Reviewed-by: Sean Paul <sean@poorly.run> Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm/dpu: Remove dpu_dbgJordan Crouse
The functions in dpu_dbg.c aren't used. The two main dump functions fail after a lookup from dpu_dbg_base.reg_base_list which turns out to never be populated and once those are removed the rest of the file doesn't make any sense. v3: No changes v2: Moved some unrelated changes to another patch Reviewed-by: Sean Paul <sean@poorly.run> Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm: dpu: Remove crtc_lockSean Paul
Each time it's called we're holding the crtc modeset lock, so it's redundant. Changes in v2: - None Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm: dpu: Remove vblank_requested flag from dpu_crtcSean Paul
It's just for debugfs output, we don't need it Changes in v2: - None Cc: Jeykumar Sankaran <jsanka@codeaurora.org> Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-12-11drm/msm: dpu: Separate crtc assignment from vblank enableSean Paul
Instead of assigning/clearing the crtc on vblank enable/disable, we can just assign and clear the crtc on modeset. That allows us to just toggle the encoder's vblank interrupts on vblank_enable. So why is this important? Previously the driver was using the legacy pointers to assign/clear the crtc. Legacy pointers are cleared _after_ disabling the hardware, so the legacy pointer was valid during vblank_disable, but that's not something we should rely on. Instead of relying on the core ordering the legacy pointer assignments just so, we'll assign the crtc in dpu_crtc enable/disable. This is the only place that mapping can change, so we're covered there. We're also taking advantage of drm_crtc_vblank_on/off. By using this, we ensure that vblank_enable/disable can never be called while the crtc is off (which means the assigned crtc will always be valid). As such, we don't need to use modeset locks or the crtc_lock in the vblank_enable/disable routine to be sure state is consistent. ...I think. Changes in v2: - Changed crtc check in toggle_vblank to != (Jeykumar) Cc: Jeykumar Sankaran <jsanka@codeaurora.org> Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> [dpu_crtc.c change needed to be manually applied b/c of the dpu_crtc_reset change] Signed-off-by: Rob Clark <robdclark@gmail.com>
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