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path: root/drivers/gpu/drm/nouveau
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2017-03-30drm/nouveau: Don't register Thunderbolt eGPU with vga_switcherooLukas Wunner
An external Thunderbolt GPU can neither drive the laptop's panel nor be powered off by the platform, so there's no point in registering it with vga_switcheroo. In fact, when the external GPU is runtime suspended, vga_switcheroo will cut power to the internal discrete GPU, resulting in a lockup. Cc: Ben Skeggs <bskeggs@redhat.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Lukas Wunner <lukas@wunner.de> Link: http://patchwork.freedesktop.org/patch/msgid/8e733152b13e7c14501ad5af45c1c5c736584111.1489145162.git.lukas@wunner.de
2017-03-29drm: Add acquire ctx parameter to ->set_configDaniel Vetter
Surprisingly a lot of legacy drivers roll their own, for runtime pm and because vmwgfx. Also make nouveau's set_config static while at it. Cc: Sinclair Yeh <syeh@vmware.com> Cc: Thomas Hellstrom <thellstrom@vmware.com> Cc: Ben Skeggs <bskeggs@redhat.com> Cc: Patrik Jakobsson <patrik.r.jakobsson@gmail.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/20170322215058.8671-19-daniel.vetter@ffwll.ch
2017-03-29drm: Add acquire ctx parameter to ->page_flip(_target)Daniel Vetter
Again just going through the motions, no functional changes in here. Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Ben Skeggs <bskeggs@redhat.com> Cc: Russell King <linux@armlinux.org.uk> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Eric Anholt <eric@anholt.net> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>t Link: http://patchwork.freedesktop.org/patch/msgid/20170322215058.8671-12-daniel.vetter@ffwll.ch
2017-03-29drm: Add acquire ctx parameter to ->plane_disableDaniel Vetter
Nouveau had a few direct calls to ->disable_plane, I replaced those with drm_plane_force_disable. Same story for shmob. Otherwise no code changes. Cc: Ben Skeggs <bskeggs@redhat.com> Cc: Russell King <linux@armlinux.org.uk> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170322215058.8671-5-daniel.vetter@ffwll.ch
2017-03-29drm: Add acquire ctx parameter to ->update_planeDaniel Vetter
Just rolling it out, no code change here. Cc: Ben Skeggs <bskeggs@redhat.com> Cc: Russell King <linux@armlinux.org.uk> Cc: Rob Clark <robdclark@gmail.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Eric Anholt <eric@anholt.net> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170322215058.8671-3-daniel.vetter@ffwll.ch
2017-03-27drm/atomic: Introduce drm_atomic_helper_shutdownDaniel Vetter
The trouble here is that it does multiple atomic commits under one drm_modeset_lock_all, which breaks the behind-the-scenes acquire context magic that function pulls off. It's much better to have one overall atomic commit. That we still have multiple atomic commits prevents us from adding some pretty useful debug checks to the atomic machinery. Hence it is really a bad idea to call the legacy drm_crtc_force_disable_all() function. There's 2 atomic drivers using this still, nouveau and tinydrm. To fix this, introduce a new drm_atomic_helper_shutdown() by extracting the code from i915. While at it improve kernel-doc and catch future offenders by sprinkling a WARN_ON into the legacy function. We should probably move those into the legacy modeset helpers, too ... v2: Make it compile on arm drivers too (Noralf). v3: Correct kerneldoc to point at _disable_all(). Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Acked-by: Noralf Trønnes <noralf@tronnes.org> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Noralf Trønnes <noralf@tronnes.org> Cc: Ben Skeggs <bskeggs@redhat.com> Tested-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170321164149.31531-1-daniel.vetter@ffwll.ch
2017-03-23Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux into ↵Daniel Vetter
drm-misc-next Resync with drm-next, I have a patch which currently can't be applied because drm-misc-next lacked the latest drm/i915 code. Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2017-03-23Merge tag 'drm-misc-next-2017-03-21' of ↵Dave Airlie
git://anongit.freedesktop.org/git/drm-misc into drm-next drm-misc for 4.12, 2nd attempt this week: - topic branch from Jon Corbet for the new graph kerneldoc support - lots of graphs for kms/atomic things using the above - some vblank query tuning from Chris - gem/cma_fops macros - moar docs Driver stuff: - vc4 hdmi audio, yay (Eric) - dw-hdmi polish from a bunch of people - some rockchip dp updates that didn't make last week (Chris Zhong) - misc bridge&driver updates * tag 'drm-misc-next-2017-03-21' of git://anongit.freedesktop.org/git/drm-misc: (37 commits) drm/edid: detect SCDC support in HF-VSDB drm/edid: detect SCDC support in HF-VSDB drm/edid: check for HF-VSDB block drm: Add SCDC helpers drm: bridge: dw-hdmi: add HDMI vendor specific infoframe config drm/bridge: dw_hdmi: support i2c extended read mode drm/msm: add stubs for msm_{perf,rd}_debugfs_cleanup drm: bochs: Don't remove uninitialized fbdev framebuffer drm: vc4: remove redundant check of plane being non-null drm/vc4: use platform_register_drivers dma-fence: add dma_fence_match_context helper drm/vc4: Add HDMI audio support dt-bindings: Document the dmas and dma-names properties for VC4 HDMI drm/atmel-hlcdc: Fix suspend/resume implementation drm: Skip the waitqueue setup for vblank queries drm: Defer disabling the vblank IRQ until the next interrupt (for instant-off) drm/doc: atomic overview, with graph drm/doc: diagram for mode objects and properties drm/doc: Consistent kerneldoc include order drm/doc: Add KMS overview graphs ...
2017-03-22drm/dp: Split drm_dp_mst_allocate_vcpiPandiyan, Dhinakaran
drm_dp_mst_allocate_vcpi() apart from setting up the vcpi structure, also finds if there are enough slots available. This check is a duplicate of that implemented in drm_dp_mst_find_vcpi_slots(). Let's move this check out and reuse the existing drm_dp_mst_find_vcpi_slots() function to check if there are enough vcpi slots before allocating them. This brings the check to one place. Additionally drivers that will use MST state tracking for atomic modesets can use the atomic version of find_vcpi_slots() and reuse drm_dp_mst_allocate_vcpi() Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> Reviewed-by: Dave Airlie <airlied@redhat.com> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1489648231-30700-4-git-send-email-dhinakaran.pandiyan@intel.com
2017-03-17drm/nouveau/secboot: fix NULL pointer dereferenceAlexandre Courbot
The msgqueue pointer validity should be checked by its owner, not by the msgqueue code itself to avoid this situation. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Reported-by: Julia Lawall <julia.lawall@lip6.fr> Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-03-17drm/nouveau/secboot: fix inconsistent pointer checkingAlexandre Courbot
We were returning PTR_ERR() on a NULL pointer, which obviously won't work. nvkm_engine_ref() will return an error in case something went wrong. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-03-15Merge tag 'drm-misc-next-2017-03-12' of ↵Dave Airlie
git://anongit.freedesktop.org/git/drm-misc into drm-next More drm-misc stuff for 4.12: - drm_platform removal from Laurent - more dw-hdmi bridge driver updates (Laurent, Kieran, Neil) - more header cleanup and documentation - more drm_debugs_remove_files removal (Noralf) - minor qxl updates (Gerd) - edp crc support in helper + analogix_dp (Tomeu) for more igt testing! - old/new iterator roll-out (Maarten) - new bridge drivers: lvds (Laurent), megachips-something (Peter Senna) * tag 'drm-misc-next-2017-03-12' of git://anongit.freedesktop.org/git/drm-misc: (51 commits) drm: bridge: dw-hdmi: Move the driver to a separate directory. drm: bridge: dw-hdmi: Switch to regmap for register access drm: bridge: dw-hdmi: Remove device type from platform data drm: bridge: dw-hdmi: Add support for custom PHY configuration drm: bridge: dw-hdmi: Create PHY operations drm: bridge: dw-hdmi: Fix the PHY power up sequence drm: bridge: dw-hdmi: Fix the PHY power down sequence drm: bridge: dw-hdmi: Enable CSC even for DVI drm: bridge: dw-hdmi: Move CSC configuration out of PHY code drm: bridge: dw-hdmi: Remove unused functions drm: Extract drm_file.h drm: Remove DRM_MINOR_CNT drm: rename drm_fops.c to drm_file.c drm/doc: document fallback behaviour for atomic events drm: Remove drmP.h include from drm_kms_helper_common.c drm: Extract drm_pci.h drm: Move drm_lock_data out of drmP.h drm: Extract drm_prime.h drm/doc: Add todo about connector_list_iter drm/qxl: Remove qxl_debugfs_remove_files() ...
2017-03-14Merge tag 'doc-4.11-images' of git://git.lwn.net/linux into drm-misc-nextDaniel Vetter
Pointer for Markus's image conversion work. We need this so we can merge all the pretty drm graphs for 4.12. Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2017-03-14drm: Remove drm_pending_event->pidDaniel Vetter
We might as well dump the drm_file pointer, that's about as useful a cookie as the pid. Noticed while typing docs for drm_file and friends. Since the only consumer of this is the tracepoints I think we can safely change this - those tracepoints should not be uapi relevant at all. It all goes back to commit b9c2c9ae882f058084e13e339925dbf8d2d20271 Author: Jesse Barnes <jbarnes@virtuousgeek.org> Date: Thu Jul 1 16:48:09 2010 -0700 drm: add per-event vblank event trace points which doesn't give a special justification for using pid over a pointer. Also note that the nouveau code setting it is entirely pointless: Since this isn't a vblank event, it will never hit the vblank tracepoints. Cc: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Sean Paul <seanpaul@chromium.org> Reviewed-by: Liviu Dudau <Liviu.Dudau@arm.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/20170308141257.12119-11-daniel.vetter@ffwll.ch
2017-03-11Merge branch 'drm/next/platform' of git://linuxtv.org/pinchartl/media into ↵Daniel Vetter
drm-misc-next Merge Laurent's drm_platform removal code. Only conflict is with the drm_pci.h extraction, which allows me to fix up the misplayed drm_platform_init fumble that 0day and Stephen Rothwell reported. Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2017-03-08Merge branch 'linux-4.12' of git://github.com/skeggsb/linux into drm-nextDave Airlie
- Re-architecture of the code to handle proprietary fw, more abstracted to support the multitude of differences that NVIDIA introduce - Support in the said code for GP10x ACR and GR fw, giving acceleration support \o/ - Fix for GTX 970 GPUs that are in an odd MMU configuration * 'linux-4.12' of git://github.com/skeggsb/linux: (60 commits) drm/nouveau/fb/gf100-: rework ram detection drm/nouveau/fb/gm200: split ram implementation from gm107 drm/nouveau/fb/gf108: split implementation from gf100 drm/nouveau/fb/gf100-: modify constructors to allow more customisation drm/nouveau/kms/nv50: use drm core i2c-over-aux algorithm drm/nouveau/i2c/g94-: return REPLY_M value on reads drm/nouveau/i2c: modify aux interface to return length actually transferred drm/nouveau/gp10x: enable secboot and GR drm/nouveau/gr/gp102: initial support drm/nouveau/falcon: support for gp10x msgqueue drm/nouveau/secboot: add gp102/gp104/gp106/gp107 support drm/nouveau/secboot: put HS code loading code into own file drm/nouveau/secboot: support for r375 ACR drm/nouveau/secboot: support for r367 ACR drm/nouveau/secboot: support for r364 ACR drm/nouveau/secboot: workaround bug when starting SEC2 firmware drm/nouveau/secboot: support standard NVIDIA HS binaries drm/nouveau/secboot: support for unload blob bootloader drm/nouveau/secboot: let callers interpret return value of blobs drm/nouveau/secboot: support for different load and unload falcons ...
2017-03-07drm/nouveau/fb/gf100-: rework ram detectionBen Skeggs
This commit reworks the RAM detection algorithm, using RAM-per-LTC to determine whether a board has a mixed-memory configuration instead of using RAM-per-FBPA. I'm not certain the algorithm is perfect, but it should handle all currently known configurations in the very least. This should fix GTX 970 boards with 4GiB of RAM where the last 512MiB isn't fully accessible, as well as only detecting half the VRAM on GF108 boards. As a nice side-effect, GP10x memory detection now reuses the majority of the code from earlier chipsets. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-03-07drm/nouveau/fb/gm200: split ram implementation from gm107Ben Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-03-07drm/nouveau/fb/gf108: split implementation from gf100Ben Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-03-07drm/nouveau/fb/gf100-: modify constructors to allow more customisationBen Skeggs
GF108/GM107 implementations will want slightly different functions for the upcoming RAM detection improvements. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-03-07drm/nouveau/kms/nv50: use drm core i2c-over-aux algorithmBen Skeggs
I'm not entirely sure NVKM needs to support this now, but I haven't removed it as of yet just in case it's needed from DEVINIT scripts where DRM isn't available. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-03-07drm/nouveau/i2c/g94-: return REPLY_M value on readsBen Skeggs
This value represents the actual number of bytes recieved on the AUX channel as the result of a read transaction. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-03-07drm/nouveau/i2c: modify aux interface to return length actually transferredBen Skeggs
Apparently sinks are allows to respond with ACK even if they didn't fully complete a transaction... It seems like a missed opportunity for DEFER to me, but what do I know :) Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-03-07drm/nouveau/gp10x: enable secboot and GRAlexandre Courbot
All the bricks are in place for secure boot to be enabled. This in turn makes GR usable so enable them all. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-03-07drm/nouveau/gr/gp102: initial supportBen Skeggs
Differences from GP100: - 3 PPCs/GPC. - Another random reg to calculate/write. - Attrib CB setup a little different. - PascalB - PascalComputeB Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-03-07drm/nouveau/falcon: support for gp10x msgqueueAlexandre Courbot
Add support for the msgqueue firmware used to process SEC2 commands for gp10x chips. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-03-07drm/nouveau/secboot: add gp102/gp104/gp106/gp107 supportAlexandre Courbot
These gp10x chips are supporting using (roughly) the same firmware. Compared to previous secure chips, ACR runs on SEC2 and so does the low-secure msgqueue. ACR for these chips is based on r367. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-03-07drm/nouveau/secboot: put HS code loading code into own fileAlexandre Courbot
We will also need to load HS blobs outside of acr_r352 (for instance, to run the NVDEC VPR scrubber), so make this code reusable. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-03-07drm/nouveau/secboot: support for r375 ACRAlexandre Courbot
r375 ACR uses a unified bootloader descriptor for the GR and PMU firmwares. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-03-07drm/nouveau/secboot: support for r367 ACRAlexandre Courbot
r367 uses a different hsflcn_desc layout and LS firmware signature format, requiring a rewrite of some functions. It also makes use of the shadow region, and uses SEC as the boot falcon. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-03-07drm/nouveau/secboot: support for r364 ACRAlexandre Courbot
r364 is similar to r361, but uses a different hsflcn_desc structure to introduce the shadow region address (even though it is not yet used by this version). Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-03-07drm/nouveau/secboot: workaround bug when starting SEC2 firmwareAlexandre Courbot
For some unknown reason the LS SEC2 firmware needs to be started twice to operate. Detect and address that condition. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-03-07drm/nouveau/secboot: support standard NVIDIA HS binariesAlexandre Courbot
I had the brilliant idea to "improve" the binary format by removing a useless indirection in the HS binary files. In the end it just makes things more complicated than they ought to be as NVIDIA-provided files need to be adapted. Since the format used can be identified by the header, support both. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-03-07drm/nouveau/secboot: support for unload blob bootloaderAlexandre Courbot
If the load and unload falcons are different, then a different bootloader must also be used. Support this case. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-03-07drm/nouveau/secboot: let callers interpret return value of blobsAlexandre Courbot
Since the HS blobs are provided and signed by NVIDIA, we cannot expect always-consistent behavior. In this case, on GP10x the unload blob may return 0x1d even though things have run perfectly well. This behavior has been confirmed by NVIDIA. So let the callers of the run_blob() hook receive the blob return's value (a positive integer) and decide what it means. This allows us to workaround the 0x1d code instead of issuing an error. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-03-07drm/nouveau/secboot: support for different load and unload falconsAlexandre Courbot
On some secure boot instances (e.g. gp10x) the load and unload blobs do not run on the same falcon. Support this case by introducing a new member to the ACR structure and making related functions take the falcon to use as an argument instead of assuming the boot falcon is to be used. The rule is that the load blob can be run on either the SEC or PMU falcons, but the unload blob must be always run on PMU. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-03-07drm/nouveau/secboot: share r361 BL structures and functionsAlexandre Courbot
Share elements of r361 that will be reused in other ACRs. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-03-07drm/nouveau/secboot: add support for SEC LS firmwareAlexandre Courbot
Support running a message queue firmware on SEC. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-03-07drm/nouveau/secboot: support running ACR on SECAlexandre Courbot
Add support for running the ACR binary on the SEC falcon. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-03-07drm/nouveau/secboot: get start address of blob from ACRAlexandre Courbot
The start address used for secure blobs is not unique to the ACR, but rather blob-dependent. Remove the unique member stored in the ACR structure and make the load function return the start address for the current blob instead. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-03-07drm/nouveau/secboot: add shadow blob argumentAlexandre Courbot
ACR firmware from r364 on need a shadow region for the ACR to copy the WPR region into. Add a flag to indicate that a shadow region is required and manage memory allocations accordingly. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-03-07drm/nouveau/falcon/msgqueue: add SEC2 supportAlexandre Courbot
Add support for running a msgqueue on the SEC2 falcon. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-03-07drm/nouveau/falcon: support for EMEMAlexandre Courbot
On SEC, DMEM is unaccessible by the CPU when the falcon is running in LS mode. This makes communication with the firmware using DMEM impossible. For this purpose, a new kind of memory (EMEM) has been added. It works similarly to DMEM, with the difference that its address space starts at 0x1000000. For this reason, it makes sense to treat it like a special case of DMEM. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-03-07drm/nouveau/falcon: fix base address of FBIF registersAlexandre Courbot
All falcons have their FBIF registers starting at offset 0x600, with the exception of the PMU and NVENC engines. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-03-07drm/nouveau/falcon: better detection of debug registerAlexandre Courbot
Not all falcons have a debug register, and it is not always found at the same offset. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-03-07drm/nouveau/core: add SEC2 engineAlexandre Courbot
SEC2 is the name given by NVIDIA to the SEC engine post-Fermi (reasons unknown). Even though it shares the same address range as SEC, its usage is quite different and this justifies a new engine. Add this engine and make TOP use it all post-TOP devices should use this implementation and not the older SEC. Also quickly add the short gp102 implementation which will be used for falcon booting purposes. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-03-07drm/nouveau/nvdec: add gp102 supportAlexandre Courbot
gp10x' secure boot requires a blob to be run on NVDEC. Expose the falcon through a dummy device. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-03-07drm/nouveau/falcon: delay construction of falcons to oneinit()Alexandre Courbot
Reading registers at device construction time can be harmful, as there is no guarantee the underlying engine will be up, or in its runtime configuration. Defer register reading to the oneinit() hook and update users accordingly. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-03-07drm/nouveau/falcon: use NXTCTX register instead of NEW_INSTBLKAlexandre Courbot
Both registers allow to bind a new context, but NXTCTX will work on all falcons, while legacy NEW_INSTBLK is reserved to PMU. After setting NXTCTX we trigger a context switch by writing 0x090 and 0x0a4. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-03-07drm/nouveau/secboot/gm20b: enable PMU firmwareAlexandre Courbot
Enable the PMU firmware in gm20b, managed by secure boot. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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