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path: root/drivers/gpu/drm/msm
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2020-01-02msm:disp:dpu1: add mixer selection for display topologyKalyan Thota
mixer selection in the display topology is based on multiple factors 1) mixers available in the hw 2) interfaces to be enabled 3) merge capability change will pickup mixer as per the topology need. Signed-off-by: Kalyan Thota <kalyan_t@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-01-02msm:disp:dpu1: setup display datapath for SC7180 targetKalyan Thota
Add changes to setup display datapath on SC7180 target. Changes in v1: - Add changes to support ctl_active on SC7180 target. - While selecting the number of mixers in the topology consider the interface width. Changes in v2: - Spawn topology mixer selection into separate patch (Rob Clark). - Add co-developed-by tags in the commit msg (Stephen Boyd). Changes in v3: - Fix kernel checkpatch errors in v2. This patch has dependency on the below series https://patchwork.kernel.org/patch/11253747/ Co-developed-by: Shubhashree Dhar <dhar@codeaurora.org> Signed-off-by: Shubhashree Dhar <dhar@codeaurora.org> Co-developed-by: Raviteja Tamatam <travitej@codeaurora.org> Signed-off-by: Raviteja Tamatam <travitej@codeaurora.org> Signed-off-by: Kalyan Thota <kalyan_t@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-01-02msm:disp:dpu1: add support for display for SC7180 targetKalyan Thota
Add display hw catalog changes for SC7180 target. Changes in v1: - Configure register offsets and capabilities for the display hw blocks. Changes in v2: - mdss_irq data type has changed in the dependent patch, accommodate the necessary changes. - Add co-developed-by tags in the commit msg (Stephen Boyd). Changes in v3: - fix kernel checkpatch errors in v2 Changes in v4: - move documentation into seperate patch (Rob Herring). This patch has dependency on the below series https://patchwork.kernel.org/patch/11253647/ Co-developed-by: Shubhashree Dhar <dhar@codeaurora.org> Signed-off-by: Shubhashree Dhar <dhar@codeaurora.org> Co-developed-by: Raviteja Tamatam <travitej@codeaurora.org> Signed-off-by: Raviteja Tamatam <travitej@codeaurora.org> Signed-off-by: Kalyan Thota <kalyan_t@codeaurora.org> [rebase on hw catalog const'ification, and add more const's] Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-01-02msm: disp: dpu1: add support to access hw irqs regs depending on revisionShubhashree Dhar
Current code assumes that all the irqs registers offsets can be accessed in all the hw revisions; this is not the case for some targets that should not access some of the irq registers. This change adds the support to selectively remove the irqs that are not supported in some of the hw revisions. Changes in v1: - Add support to selectively remove the hw irqs that are not not supported. Changes in v2: - Remove unrelated changes. Changes in v3: - Remove change-id (Stephen Boyd). - Add colon in variable description to match kernel-doc (Stephen Boyd). - Change macro-y way of variable description (Jordon Crouse). - Remove unnecessary if checks (Jordon Crouse). - Remove extra blank line (Jordon Crouse). Changes in v4: - Remove checkpatch errors. Signed-off-by: Shubhashree Dhar <dhar@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-01-02drm/msm/dpu: Add UBWC support for RGB8888 formatsFritz Koenig
Hardware only natively supports BGR8888 UBWC. UBWC support for RGB8888 can be had by pretending that the buffer is BGR. Signed-off-by: Fritz Koenig <frkoenig@google.com> Reviewed-by: Rob Clark <robdclark@gmail.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-01-02drm/msm/dpu: Mark various data tables as constStephen Boyd
These structures look like a bunch of data tables that aren't going to change after boot. Let's move them to the const RO section of memory so that they can't be modified at runtime on modern machines. Signed-off-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-01-02drm/msm/a4xx: set interconnect bandwidth voteBrian Masney
Set the two interconnect paths for the GPU to maximum speed for now to work towards getting the GPU working upstream. We can revisit a later time to optimize this for battery life. Signed-off-by: Brian Masney <masneyb@onstation.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-01-02drm/msm/a3xx: set interconnect bandwidth voteBrian Masney
Set the two interconnect paths for the GPU to maximum speed for now to work towards getting the GPU working upstream. We can revisit a later time to optimize this for battery life. Signed-off-by: Brian Masney <masneyb@onstation.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-01-02drm/msm/gpu: add support for ocmem interconnect pathBrian Masney
Some A3xx and all A4xx Adreno GPUs do not have GMEM inside the GPU core and must use the On Chip MEMory (OCMEM) in order to be functional. There's a separate interconnect path that needs to be setup to OCMEM. Add support for this second path to the GPU core. In the downstream MSM 3.4 sources, the two interconnect paths for the GPU are between: - MSM_BUS_MASTER_GRAPHICS_3D and MSM_BUS_SLAVE_EBI_CH0 - MSM_BUS_MASTER_V_OCMEM_GFX3D and MSM_BUS_SLAVE_OCMEM Signed-off-by: Brian Masney <masneyb@onstation.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-01-02drm/msm/adreno: fix zap vs no-zap handlingRob Clark
We can have two cases, when it comes to "zap" fw. Either the fw requires zap fw to take the GPU out of secure mode at boot, or it does not and we can write RBBM_SECVID_TRUST_CNTL directly. Previously we decided based on whether zap fw load succeeded, but this is not a great plan because: 1) we could have zap fw in the filesystem on a device where it is not required 2) we could have the inverse case Instead, shift to deciding based on whether we have a 'zap-shader' node in dt. In practice, there is only one device (currently) with upstream dt that does not use zap (cheza), and it already has a /delete-node/ for the zap-shader node. Fixes: abccb9fe3267 ("drm/msm/a6xx: Add zap shader load") Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-01-02drm/msm/a6xx: restore previous freq on resumeRob Clark
Previously, if the freq were overriden (ie. via sysfs), it would get reset to max on resume. Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org>
2020-01-02drm/msm/dpu: ignore NULL clocksRob Clark
This isn't an error. Also the clk APIs handle the NULL case, so we can just delete the check. Signed-off-by: Rob Clark <robdclark@chromium.org> Tested-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Stephen Boyd <sboyd@kernel.org>
2019-12-02Merge tag 'drm-msm-next-2019-11-05' of ↵Dave Airlie
https://gitlab.freedesktop.org/drm/msm into drm-next + OCMEM support to enable the couple generations that had shared OCMEM rather than GMEM exclusively for the GPU (late a3xx and I think basically all of a4xx). Bjorn and Brian decided to land this through the drm tree to avoid having to coordinate merge requests. + a510 support, and various associated display support + the usual misc cleanups and fixes Signed-off-by: Dave Airlie <airlied@redhat.com> From: Rob Clark <robdclark@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/ <CAF6AEGv-JWswEJRxe5AmnGQO1SZnpxK05kO1E29K6UUzC9GMMw@mail.gmail.com
2019-11-13drm/msm: fix memleak on releaseJohan Hovold
If a process is interrupted while accessing the "gpu" debugfs file and the drm device struct_mutex is contended, release() could return early and fail to free related resources. Note that the return value from release() is ignored. Fixes: 4f776f4511c7 ("drm/msm/gpu: Convert the GPU show function to use the GPU state") Cc: stable <stable@vger.kernel.org> # 4.18 Cc: Jordan Crouse <jcrouse@codeaurora.org> Cc: Rob Clark <robdclark@gmail.com> Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20191010131333.23635-2-johan@kernel.org
2019-11-06drm: msm: a6xx: fix debug bus register configurationSharat Masetty
Fix the cx debugbus related register configuration, to collect accurate bus data during gpu snapshot. This helps with complete snapshot dump and also complete proper GPU recovery. Fixes: 1707add81551 ("drm/msm/a6xx: Add a6xx gpu state") Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Sharat Masetty <smasetty@codeaurora.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: https://patchwork.freedesktop.org/patch/339165
2019-11-04drm/msm/adreno: Add support for Adreno 510 GPUAngeloGioacchino Del Regno
The Adreno 510 GPU is a stripped version of the Adreno 5xx, found in low-end SoCs like 8x56 and 8x76, which has 256K of GMEM, with no GPMU nor ZAP. Also, since the Adreno 5xx part of this driver seems to be developed with high-end Adreno GPUs in mind, and since this is a lower end one, add a comment making clear which GPUs which support is not implemented yet is not using the GPMU related hw init code, so that future developers will not go crazy with that. By the way, the lower end Adreno GPUs with no GPMU are: A505/A506/A510 (usually no ZAP firmware) A508/A509/A512 (usually with ZAP firmware) Signed-off-by: AngeloGioacchino Del Regno <kholk11@gmail.com> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-11-04drm/msm/dsi: Add configuration for 8x76AngeloGioacchino Del Regno
MSM8976, MSM8976 and APQ variants have DSI version 3:10040002 (DSI 6G V1.4.2), featuring two DSIs. They need three clocks (mdp_core, iface, bus), one GDSC and two vregs, VDDA at 1.2V and VDDIO at 1.8V. Signed-off-by: AngeloGioacchino Del Regno <kholk11@gmail.com> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-11-04drm/msm/dsi: Add configuration for 28nm PLL on family BAngeloGioacchino Del Regno
The 28nm PLL has a different iospace on MSM/APQ family B SoCs: add a new configuration and use it when the DT reports the "qcom,dsi-phy-28nm-hpm-fam-b" compatible. Signed-off-by: AngeloGioacchino Del Regno <kholk11@gmail.com> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-11-04drm/msm/mdp5: Add configuration for msm8x76AngeloGioacchino Del Regno
Add the configuration entries for the MDP5 v1.11, found on MSM8956, MSM8976 and APQ variants. Signed-off-by: AngeloGioacchino Del Regno <kholk11@gmail.com> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-11-02drm/msm/mdp5: Add optional TBU and TBU_RT clocksAngeloGioacchino Del Regno
Some SoCs, like MSM8956/8976 (and APQ variants), do feature these clocks and we need to enable them in order to get both of the hw (mdp5/rot) Translation Buffer Units (TBUs) to properly work. Signed-off-by: AngeloGioacchino Del Regno <kholk11@gmail.com> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-11-02drm/msm: always dump buffer base/sizeRob Clark
Even if we are not dumping the buffer's contents, it is useful to log their base address and size. This makes it easier to see when different gpu pointers point to a single buffer, for example higher mipmap levels of a single texture. Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-11-02drm/msm: fix rd dumping for split-IB1Rob Clark
When IB1 is split into multiple cmd buffers, we'd emit multiple RD_CMDSTREAM_ADDR per submit. But after this packet is handled by the cffdump parser, it resets it's known buffers on the next GPUADDR packet, so subsequent RD_CMDSTREAM_ADDR packets from the same submit would not find their buffers. Re-work the loop to snapshot all buffers before RD_CMDSTREAM_ADDR to avoid this problem. Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-11-02drm/msm/hdmi: silence -EPROBE_DEFER warningBrian Masney
Silence a warning message due to an -EPROBE_DEFER error to help cleanup the system boot log. Signed-off-by: Brian Masney <masneyb@onstation.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-10-24drm/msm/dsi: Implement qcom, dsi-phy-regulator-ldo-mode for 28nm PHYStephan Gerhold
The DSI PHY regulator supports two regulator modes: LDO and DCDC. This mode can be selected using the "qcom,dsi-phy-regulator-ldo-mode" device tree property. However, at the moment only the 20nm PHY driver actually implements that option. Add a check in the 28nm PHY driver to program the registers correctly for LDO mode. Tested-by: Nikita Travkin <nikitos.tr@gmail.com> # l8150 Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20191023165617.28738-1-stephan@gerhold.net
2019-10-23drm/msm: edp: Avoid drm_dp_link helpersThierry Reding
During the discussion of patches that enhance the drm_dp_link helpers it was concluded that these helpers aren't very useful to begin with. Start pushing the equivalent code into individual drivers to ultimately remove them. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20191021143437.1477719-12-thierry.reding@gmail.com
2019-10-23Merge v5.4-rc4 into drm-nextDaniel Vetter
Thierry needs fd70c7755bf0 ("drm/bridge: tc358767: fix max_tu_symbol value") to be able to merge his dp_link patch series. Some adjacent changes conflicts, plus some clashes in i915 due to cherry-picking and git trying to be helpful and leaving both versions in. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2019-10-11drm/msm/dsi: Implement reset correctlyJeffrey Hugo
On msm8998, vblank timeouts are observed because the DSI controller is not reset properly, which ends up stalling the MDP. This is because the reset logic is not correct per the hardware documentation. The documentation states that after asserting reset, software should wait some time (no indication of how long), or poll the status register until it returns 0 before deasserting reset. wmb() is insufficient for this purpose since it just ensures ordering, not timing between writes. Since asserting and deasserting reset occurs on the same register, ordering is already guaranteed by the architecture, making the wmb extraneous. Since we would define a timeout for polling the status register to avoid a possible infinite loop, lets just use a static delay of 20 ms, since 16.666 ms is the time available to process one frame at 60 fps. Fixes: a689554ba6ed ("drm/msm: Initial add DSI connector support") Cc: Hai Li <hali@codeaurora.org> Cc: Rob Clark <robdclark@gmail.com> Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com> Reviewed-by: Sean Paul <sean@poorly.run> [seanpaul renamed RESET_DELAY to DSI_RESET_TOGGLE_DELAY_MS] Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20191011133939.16551-1-jeffrey.l.hugo@gmail.com
2019-10-10drm/msm/mdp5: make config variables staticBen Dooks
A number of the config structs are not exported so make them static to avoid the following sparse warnings: drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c:17:26: warning: symbol 'msm8x74v1_config' was not declared. Should it be static? drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c:101:26: warning: symbol 'msm8x74v2_config' was not declared. Should it be static? drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c:183:26: warning: symbol 'apq8084_config' was not declared. Should it be static? drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c:278:26: warning: symbol 'msm8x16_config' was not declared. Should it be static? drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c:345:26: warning: symbol 'msm8x94_config' was not declared. Should it be static? drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c:440:26: warning: symbol 'msm8x96_config' was not declared. Should it be static? drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c:548:26: warning: symbol 'msm8917_config' was not declared. Should it be static? drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c:633:26: warning: symbol 'msm8998_config' was not declared. Should it be static? Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20191009120522.17019-1-ben.dooks@codethink.co.uk Link: https://patchwork.freedesktop.org/patch/msgid/20190918195722.2149227-1-arnd@arndb.de
2019-10-10drm/msm: make a5xx_show and a5xx_gpu_state_put staticBen Dooks
The a5xx_show and a5xx_gpu_state_put objects are not exported outside of the file, so make them static to avoid the following warnings from sparse: drivers/gpu/drm/msm/adreno/a5xx_gpu.c:1292:5: warning: symbol 'a5xx_gpu_state_put' was not declared. Should it be static? drivers/gpu/drm/msm/adreno/a5xx_gpu.c:1302:6: warning: symbol 'a5xx_show' was not declared. Should it be static? Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20191009114607.701-1-ben.dooks@codethink.co.uk
2019-10-10drm/msm/mdp5: Remove set but not used variable 'hw_cfg' in modeset_initzhengbin
Fixes gcc '-Wunused-but-set-variable' warning: drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c: In function modeset_init: drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c:458:28: warning: variable hw_cfg set but not used [-Wunused-but-set-variable] It is not used since commit 36d1364abbed ("drm/msm/mdp5: Clean up interface assignment") Reported-by: Hulk Robot <hulkci@huawei.com> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: zhengbin <zhengbin13@huawei.com> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/1570630403-92371-1-git-send-email-zhengbin13@huawei.com
2019-10-10drm/msm/dsi: Remove set but not used variable 'lp'zhengbin
Fixes gcc '-Wunused-but-set-variable' warning: drivers/gpu/drm/msm/dsi/dsi_host.c: In function dsi_cmd_dma_rx: drivers/gpu/drm/msm/dsi/dsi_host.c:1302:7: warning: variable lp set but not used [-Wunused-but-set-variable] It is not used since commit a689554ba6ed ("drm/msm: Initial add DSI connector support") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: zhengbin <zhengbin13@huawei.com> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/1570690506-83287-5-git-send-email-zhengbin13@huawei.com
2019-10-10drm/msm/dsi: Remove set but not used variable 'lpx'zhengbin
Fixes gcc '-Wunused-but-set-variable' warning: drivers/gpu/drm/msm/dsi/phy/dsi_phy.c: In function msm_dsi_dphy_timing_calc_v2: drivers/gpu/drm/msm/dsi/phy/dsi_phy.c:156:17: warning: variable lpx set but not used [-Wunused-but-set-variable] drivers/gpu/drm/msm/dsi/phy/dsi_phy.c: In function msm_dsi_dphy_timing_calc_v3: drivers/gpu/drm/msm/dsi/phy/dsi_phy.c:273:17: warning: variable lpx set but not used [-Wunused-but-set-variable] 'lpx' in msm_dsi_dphy_timing_calc_v2 is not used since commit a4df68fa232e ("drm/msm/dsi: Add new method to calculate 14nm PHY timings") 'lpx' in msm_dsi_dphy_timing_calc_v3 is not used since commit f1fa7ff44056 ("drm/msm/dsi: implement auto PHY timing calculator for 10nm PHY") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: zhengbin <zhengbin13@huawei.com> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/1570690506-83287-4-git-send-email-zhengbin13@huawei.com
2019-10-10drm/msm/mdp5: Remove set but not used variable 'hw_cfg' in blend_setupzhengbin
Fixes gcc '-Wunused-but-set-variable' warning: drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c: In function blend_setup: drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c:225:28: warning: variable hw_cfg set but not used [-Wunused-but-set-variable] It is not used since commit 14be3200cd5f ("drm/msm: rename mdp->disp") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: zhengbin <zhengbin13@huawei.com> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/1570690506-83287-3-git-send-email-zhengbin13@huawei.com
2019-10-10drm/msm/mdp5: Remove set but not used variable 'fmt'zhengbin
Fixes gcc '-Wunused-but-set-variable' warning: drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c: In function mdp5_smp_calculate: drivers/gpu/drm/msm/disp/mdp5/mdp5_smp.c:134:6: warning: variable fmt set but not used [-Wunused-but-set-variable] It is not used since commit 24c478ead0bf ("drm/fourcc: Pass the format_info pointer to drm_format_plane_cpp") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: zhengbin <zhengbin13@huawei.com> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/1570690506-83287-2-git-send-email-zhengbin13@huawei.com
2019-10-10drm/msm: Sanitize the modeset_is_locked checks in dpuSean Paul
As Daniel mentions in his email [1], non-blocking commits don't hold the modeset locks, so we can safely access state as long as these functions are in the commit path. So remove the WARN_ON in dpu_kms_encoder_enable. In dpu_crtc_get_intf_mode, things are a bit more complicated. So keep the WARN_ON, but add a comment explaining the situation and hope someone comes along and fixes the issue. [1]- https://lists.freedesktop.org/archives/dri-devel/2019-October/239441.html Link to v1: https://patchwork.freedesktop.org/patch/msgid/20191010151351.126735-1-sean@poorly.run Changes in v2: - Restored the WARN_ON in get_intf_mode and added a clarifying comment (Daniel) Fixes: 1dfdb0e107db ("drm/msm: dpu: Add modeset lock checks where applicable") Cc: Jeykumar Sankaran <jsanka@codeaurora.org> Cc: Rob Clark <robdclark@chromium.org> Suggested-by: Daniel Vetter <daniel@ffwll.ch> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20191010181801.186069-1-sean@poorly.run
2019-10-07drm/msm/dpu: Remove set but not used variables 'mode', 'dpu_kms', 'priv'zhengbin
Fixes gcc '-Wunused-but-set-variable' warning: drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c: In function dpu_encoder_virt_disable: drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c:1199:27: warning: variable mode set but not used [-Wunused-but-set-variable] drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c: In function _dpu_encoder_init_debugfs: drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c:1963:18: warning: variable dpu_kms set but not used [-Wunused-but-set-variable] drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c: In function dpu_encoder_frame_done_timeout: drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c:2183:26: warning: variable priv set but not used [-Wunused-but-set-variable] They are not used since commit 25fdd5933e4c ("drm/msm: Add SDM845 DPU support") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: zhengbin <zhengbin13@huawei.com> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-10-07drm/msm/dpu: Remove set but not used variables 'cmd_enc', 'priv'zhengbin
Fixes gcc '-Wunused-but-set-variable' warning: drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c: In function dpu_encoder_phys_cmd_ctl_start_irq: drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c:136:31: warning: variable cmd_enc set but not used [-Wunused-but-set-variable] drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c: In function dpu_encoder_phys_cmd_irq_control: drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c:328:31: warning: variable cmd_enc set but not used [-Wunused-but-set-variable] drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c: In function dpu_encoder_phys_cmd_tearcheck_config: drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c:367:26: warning: variable priv set but not used [-Wunused-but-set-variable] drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c: In function dpu_encoder_phys_cmd_wait_for_tx_complete: drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c:662:31: warning: variable cmd_enc set but not used [-Wunused-but-set-variable] They are not used since commit 25fdd5933e4c ("drm/msm: Add SDM845 DPU support") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: zhengbin <zhengbin13@huawei.com> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-10-07drm/msm/dpu: Remove set but not used variables 'dpu_cstate', 'priv'zhengbin
Fixes gcc '-Wunused-but-set-variable' warning: drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c: In function dpu_core_perf_crtc_release_bw: drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c:248:25: warning: variable dpu_cstate set but not used [-Wunused-but-set-variable] drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c: In function dpu_core_perf_crtc_update: drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c:337:26: warning: variable priv set but not used [-Wunused-but-set-variable] They are not used since commit 25fdd5933e4c ("drm/msm: Add SDM845 DPU support") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: zhengbin <zhengbin13@huawei.com> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-10-07drm/msm/dpu: Remove set but not used variable 'priv' in dpu_core_irq.czhengbin
Fixes gcc '-Wunused-but-set-variable' warning: drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c: In function dpu_core_irq_preinstall: drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c:354:26: warning: variable priv set but not used [-Wunused-but-set-variable] drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c: In function dpu_core_irq_uninstall: drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c:390:26: warning: variable priv set but not used [-Wunused-but-set-variable] It is not used since commit 25fdd5933e4c ("drm/msm: Add SDM845 DPU support") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: zhengbin <zhengbin13@huawei.com> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-10-07drm/msm/dpu: Remove set but not used variable 'priv' in dpu_encoder_phys_vid.czhengbin
Fixes gcc '-Wunused-but-set-variable' warning: drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c: In function dpu_encoder_phys_vid_disable: drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c:566:26: warning: variable priv set but not used [-Wunused-but-set-variable] It is not used since commit 25fdd5933e4c ("drm/msm: Add SDM845 DPU support") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: zhengbin <zhengbin13@huawei.com> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-10-07drm/msm/dpu: Remove set but not used variable 'priv' in dpu_kms.czhengbin
Fixes gcc '-Wunused-but-set-variable' warning: drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c: In function _dpu_danger_signal_status: drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c:80:26: warning: variable priv set but not used [-Wunused-but-set-variable] drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c: In function dpu_kms_prepare_commit: drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c:271:26: warning: variable priv set but not used [-Wunused-but-set-variable] It is not used since commit 25fdd5933e4c ("drm/msm: Add SDM845 DPU support") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: zhengbin <zhengbin13@huawei.com> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-10-07drm/msm: include linux/sched/task.hArnd Bergmann
Without this header file, compile-testing may run into a missing declaration: drivers/gpu/drm/msm/msm_gpu.c:444:4: error: implicit declaration of function 'put_task_struct' [-Werror,-Wimplicit-function-declaration] Fixes: 482f96324a4e ("drm/msm: Fix task dump in gpu recovery") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-10-07drm/msm/dsi: Move static keyword to the front of declarationsKrzysztof Wilczynski
Move the static keyword to the front of declarations of msm_dsi_v2_host_ops, msm_dsi_6g_host_ops and msm_dsi_6g_v2_host_ops, and resolve the following compiler warnings that can be seen when building with warnings enabled (W=1): drivers/gpu/drm/msm/dsi/dsi_cfg.c:150:1: warning: ‘static’ is not at beginning of declaration [-Wold-style-declaration] drivers/gpu/drm/msm/dsi/dsi_cfg.c:161:1: warning: ‘static’ is not at beginning of declaration [-Wold-style-declaration] drivers/gpu/drm/msm/dsi/dsi_cfg.c:172:1: warning: ‘static’ is not at beginning of declaration [-Wold-style-declaration] Signed-off-by: Krzysztof Wilczynski <kw@linux.com> Reviewed-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-10-07drm/msm: Remove unused function argumentsDrew Davenport
The arguments related to IOMMU port name have been unused since commit 944fc36c31ed ("drm/msm: use upstream iommu") and can be removed. Signed-off-by: Drew Davenport <ddavenport@chromium.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-10-07drm/msm/dpu: Remove unnecessary NULL checksDrew Davenport
dpu_kms.dev will never be NULL, so don't bother checking. Signed-off-by: Drew Davenport <ddavenport@chromium.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-10-07drm/msm/dpu: Remove unnecessary NULL checksDrew Davenport
msm_drm_private.kms will only be NULL in the dummy headless case, so there is no need to check it in the dpu display driver. Signed-off-by: Drew Davenport <ddavenport@chromium.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-10-07drm/msm/dpu: Remove unnecessary NULL checksDrew Davenport
drm_crtc.dev will never be NULL, so no need to check it. Signed-off-by: Drew Davenport <ddavenport@chromium.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-10-07drm/msm/dpu: Remove unnecessary NULL checksDrew Davenport
drm_device.dev_private is set to a non-NULL msm_drm_private struct in msm_drm_init. Successful initialization of msm means that dev_private is non-NULL so there is no need to check it everywhere. Signed-off-by: Drew Davenport <ddavenport@chromium.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-10-07drm/msm/dpu: Remove unused macroDrew Davenport
Signed-off-by: Drew Davenport <ddavenport@chromium.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-10-07drm/msm/dpu: Remove unused variablesDrew Davenport
Signed-off-by: Drew Davenport <ddavenport@chromium.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
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