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path: root/drivers/gpu/drm/amd/amdgpu
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2018-02-19drm/amdgpu: fix semicolon.cocci warningsFengguang Wu
drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c:281:2-3: Unneeded semicolon Remove unneeded semicolon. Generated by: scripts/coccinelle/misc/semicolon.cocci Fixes: 620f774f4687 ("drm/amdgpu: separate VMID and PASID handling") CC: Christian König <christian.koenig@amd.com> Signed-off-by: Fengguang Wu <fengguang.wu@intel.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amdgpu: drop extra tlb invalidation in gpuvmAlex Deucher
We only need to flush the HDP here, not invalidate the TLB. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amdgpu: adjust HDP write queue flushing for tlb invalidationAlex Deucher
Separate tlb invalidation and hdp flushing and move the HDP flush to the caller. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amdgpu: add HDP asic callbacks for SOC15 (v2)Alex Deucher
Needed to flush and invalidate the HDP block using the CPU. v2: use preferred register on soc15. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Samuel Li <Samuel.Li@amd.com> (v1)
2018-02-19drm/amdgpu: add HDP asic callbacks for VIAlex Deucher
Needed to flush and invalidate the HDP block using the CPU. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Samuel Li <Samuel.Li@amd.com>
2018-02-19drm/amdgpu: add HDP asic callbacks for CIKAlex Deucher
Needed to flush and invalidate the HDP block using the CPU. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Samuel Li <Samuel.Li@amd.com>
2018-02-19drm/amdgpu: add HDP asic callbacks for SIAlex Deucher
Needed to flush and invalidate the HDP block using the CPU. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Samuel Li <Samuel.Li@amd.com>
2018-02-19drm/amdgpu: add new asic callbacks for HDP flush/invalidationAlex Deucher
Needed to properly flush the HDP cache with the CPU from rather than the GPU. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Samuel Li <Samuel.Li@amd.com>
2018-02-19drm/amdgpu: bump version for gfx9 high priority computeAndres Rodriguez
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Andres Rodriguez <andresx7@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amdgpu: add high priority compute support for gfx9Andres Rodriguez
We follow the same approach as gfx8. The only changes are register access macros. Tested on vega10. The execution latency results fall within the expected ranges from the polaris10 data. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Andres Rodriguez <andresx7@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amd/powerplay: new cgs interface setting dpm thermal rangeEvan Quan
This will be used by powerplay to update the dpm temp range structure used to interface with hwmon. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-19drm/amd/powerplay: removed hwmgr_handle_task unused parameter and given a ↵Evan Quan
better name for other parameter Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-02-16Merge tag 'drm-misc-next-2018-02-13' of ↵Dave Airlie
git://anongit.freedesktop.org/drm/drm-misc into drm-next drm-misc-next for 4.17: UAPI Changes: - drm/vc4: Expose performance counters to userspace (Boris) Cross-subsystem Changes: - MAINTAINERS: Linus to maintain panel-arm-versatile in -misc (Linus) Core Changes: - Only use swiotlb when necessary (Chunming) Driver Changes: - drm/panel: Add support for ARM Versatile panels (Linus) - pl111: Improvements around versatile panel support (Linus) ---------------------------------------- Tagged on 2018-02-06: drm-misc-next for 4.17: UAPI Changes: - Validate mode flags + type (Ville) - Deprecate unused mode flags PIXMUX, BCAST (Ville) - Deprecate unused mode types BUILTIN, CRTC_C, CLOCK_C, DEFAULT (Ville) Cross-subsystem Changes: - MAINTAINERS: s/Daniel/Maarten/ for drm-misc (Daniel) Core Changes: - gem: Export gem functions for drivers to use (Samuel) - bridge: Introduce bridge timings in drm_bridge (Linus) - dma-buf: Allow exclusive fence to be bundled in fence array when calling reservation_object_get_fences_rcu (Christian) - dp: Add training pattern 4 and HBR3 support to dp helpers (Manasi) - fourcc: Add alpha bit to formats to avoid driver format LUTs (Maxime) - mode: Various cleanups + add new device-wide .mode_valid hook (Ville) - atomic: Fix state leak when non-blocking commits fail (Leo) NOTE: IIRC, this was cross-picked to -fixes so it might fall out - crc: Allow polling on the data fd (Maarten) Driver Changes: - bridge/vga-dac: Add THS8134* support (Linus) - tinydrm: Various MIPI DBI improvements/cleanups (Noralf) - bridge/dw-mipi-dsi: Cleanups + use create_packet helper (Brian) - drm/sun4i: Add Display Engine frontend support (Maxime) - drm/sun4i: Add zpos support + increase num planes from 2 to 4 (Maxime) - various: Use drm_mode_get_hv_timing() to fill plane clip rectangle (Ville) - stm: Add 8-bit clut support, add dsi phy v1.31 support, +fixes (Phillipe) Cc: Boris Brezillon <boris.brezillon@free-electrons.com> Cc: Chunming Zhou <david1.zhou@amd.com> Cc: Samuel Li <Samuel.Li@amd.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Noralf Trønnes <noralf@tronnes.org> Cc: Brian Norris <briannorris@chromium.org> Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Ville Syrjala <ville.syrjala@linux.intel.com> Cc: Christian König <christian.koenig@amd.com> Cc: Manasi Navare <manasi.d.navare@intel.com> Cc: Philippe Cornu <philippe.cornu@st.com> Cc: Leo (Sunpeng) Li <sunpeng.li@amd.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> * tag 'drm-misc-next-2018-02-13' of git://anongit.freedesktop.org/drm/drm-misc: (115 commits) drm/radeon: only enable swiotlb path when need v2 drm/amdgpu: only enable swiotlb alloc when need v2 drm: add func to get max iomem address v2 drm/vc4: Expose performance counters to userspace drm: Print the pid when debug logging an ioctl error. drm/stm: ltdc: remove non-alpha color formats on layer 2 for older hw drm/stm: ltdc: add non-alpha color formats drm/bridge/synopsys: dsi: Add 1.31 version support drm/bridge/synopsys: dsi: Add read feature drm/pl111: Support multiple endpoints on the CLCD drm/pl111: Support variants with broken VBLANK drm/pl111: Support variants with broken clock divider drm/pl111: Handle the Versatile RGB/BGR565 mode drm/pl111: Properly detect the ARM PL110 variants drm/panel: Add support for ARM Versatile panels drm/panel: Device tree bindings for ARM Versatile panels drm/bridge: Rename argument from crtc to bridge drm/crc: Add support for polling on the data fd. drm/sun4i: Use drm_mode_get_hv_timing() to populate plane clip rectangle drm/rcar-du: Use drm_mode_get_hv_timing() to populate plane clip rectangle ...
2018-02-13drm/amdgpu: only enable swiotlb alloc when need v2Chunming Zhou
get the max io mapping address of system memory to see if it is over our card accessing range. v2: move checking later Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180209024410.1469-2-david1.zhou@amd.com
2018-02-06drm/amdgpu: re-enable CGCG on CZ and disable on STShirish S
The CGCG feature on Stoney is causing GFX related issues such as freezes and blank outs. Signed-off-by: Shirish S <shirish.s@amd.com> Reviewed-by: Arindam Nath <arindam.nath@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-01-29drm/amdgpu: disable coarse grain clockgating for STShirish S
The CGCG feature on Stoney is causing GFX related issues such as freezes and blank outs. Signed-off-by: Shirish S <shirish.s@amd.com> Reviewed-by: Arindam Nath <arindam.nath@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-01-29drm/amdgpu: remove WARN_ON when VM isn't found v2Christian König
It can easily be that the VM is already destroyed when this runs. v2: fix test inversion Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-01-29drm/amdgpu: fix locking in vega10_ih_prescreen_ivChristian König
The vm pointer can become invalid as soon as the lock is released. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-01-29drm/amdgpu: fix another potential cause of VM faultsChristian König
The root PD can be evicted directly after allocating it, just validate it on first use. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-01-29drm/amdgpu: use queue 0 for kiq ringHuang Rui
It must use queue id 0, because CGPG_IDLE/SAVE/LOAD/RUN only can be issued on queue 0. Signed-off-by: Huang Rui <ray.huang@amd.com> Acked-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-01-23drm/amdgpu: Avoid leaking PM domain on driver unbind (v2)Alex Deucher
We only support vga_switcheroo and runtime pm on PX/HG systems so forcing runpm to 1 doesn't do anything useful anyway. Only call vga_switcheroo_init_domain_pm_ops() for PX/HG so that the cleanup path is correct as well. This mirrors what radeon does as well. v2: rework the patch originally sent by Lukas (Alex) Acked-by: Lukas Wunner <lukas@wunner.de> Reported-by: Lukas Wunner <lukas@wunner.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Lukas Wunner <lukas@wunner.de> (v1) Cc: stable@vger.kernel.org
2018-01-23drm/amd/amdgpu: Add Polaris version checkJames Zhu
Add Polaris version check if firmware support UVD encode Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: James Zhu <James.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2018-01-23drm/amdgpu: Reenable manual GPU reset from sysfsAndrey Grodzovsky
Otherwise it keeps rejecting the reset. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-01-19drm/amdgpu: disable MMHUB power gating on ravenHuang Rui
MMHUB power gating still has issue, and doesn't work on raven at current. So disable it for the moment. Signed-off-by: Huang Rui <ray.huang@amd.com> Acked-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2018-01-18drm/amdgpu: only check for ECC on Vega10Alex Deucher
RV doesn't support it. Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2018-01-16drm/amdgpu/gfx9: fix ngg enablement to clear gds reserved memory (v2)Junwei Zhang
v2: fix register access Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Ken Wang <ken.wang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-01-16drm/amdgpu: fix CPU based VM updatesChristian König
That got accidentially removed. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-01-16drm/amdgpu: fix typo in amdgpu_vce_validate_boChristian König
Otherwise buffer placement is very restrictive and might fail. Fixes: "drm/amdgpu: fix VCE buffer placement restrictions v2" Signed-off-by: Christian König <christian.koenig@amd.com> Reported-by: Deng, Emily <Emily.Deng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2018-01-16drm/amdgpu: fix amdgpu_vm_pasid_fault_creditChristian König
As soon as the lock is dropped the VM pointer can be invalid. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-01-10drm/amdgpu: fix 64bit BAR detectionChristian König
Windows added by the BIOS are not marked as 64bit because they are usually not changeable anyway. This fixes large BAR support on my new Ryzen build system. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-01-10drm/amdgpu: optimize moved handling only when vm_debug is inactiveChristian König
Otherwise we would completely circumvent that debugging feature. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Roger He <Hongbo.He@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-01-10drm/amdgpu: simplify huge page handlingChristian König
Update the PDEs after resetting the huge flag. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Acked-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-01-10drm/amdgpu: update VM PDs after the PTsChristian König
Necessary for the next patch. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Acked-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-01-10drm/amdgpu: minor optimize VM moved handling v2Christian König
Try to lock moved BOs if it's successful we can update the PTEs directly to the new location. v2: rebase Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-01-10drm/amdgpu: loosen the criteria for huge pages a bitChristian König
We can actually handle invalid huge pages perfectly fine now. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Acked-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-01-10drm/amdgpu/gfx9: only init the apertures used by KGD (v2)Alex Deucher
Use adev->vm_manager.id_mgr[0].num_ids rather than hardcoded 16. v2: use AMDGPU_GFXHUB rather than hardcoded 0 (Christian) Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Noticed-by: Felix Kuehling <felix.kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-01-10drm/amdgpu: add atpx quirk handling (v2)Alex Deucher
Add quirks for handling PX/HG systems. In this case, add a quirk for a weston dGPU that only seems to properly power down using ATPX power control rather than HG (_PR3). v2: append a new weston XT Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com> (v2) Reviewed-and-Tested-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Cc: stable@vger.kernel.org
2018-01-10drm/amdgpu: Add dpm quirk for Jet PRO (v2)Alex Deucher
Fixes stability issues. v2: clamp sclk to 600 Mhz Bug: https://bugs.freedesktop.org/show_bug.cgi?id=103370 Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2018-01-09drm/amdgpu: use %pap format string for phys_addr_tArnd Bergmann
The newly added get_local_mem_info() function prints a phys_addr_t using 0x%llx, which is wrong on most 32-bit systems, as shown by this warning: drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c: In function 'get_local_mem_info': include/linux/kern_levels.h:5:18: error: format '%llx' expects argument of type 'long long unsigned int', but argument 2 has type 'resource_size_t {aka unsigned int}' [-Werror=format=] drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c:297:31: note: format string is defined here pr_debug("Address base: 0x%llx limit 0x%llx public 0x%llx private 0x%llx\n", Passing the address by reference to the special %pap format string will produce the correct output and avoid the warning. Fixes: 30f1c0421ec5 ("drm/amdgpu: Implement get_local_mem_info") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2018-01-09Merge branch 'drm-next-4.16' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie
into drm-next Last few updates for 4.16: - Misc fixes for amdgpu - Enable swapout for reserved BOs during allocation for ttm - Misc cleanups for ttm * 'drm-next-4.16' of git://people.freedesktop.org/~agd5f/linux: (24 commits) drm/amdgpu: Correct the IB size of bo update mapping. drm/ttm: enable swapout for reserved BOs during allocation drm/ttm: add new function to check if bo is allowable to evict or swapout drm/ttm: use an operation ctx for ttm_tt_bind drm/ttm: use an operation ctx for ttm_tt_populate in ttm_bo_driver (v2) drm/ttm: use an operation ctx for ttm_mem_global_alloc_page drm/ttm: use an operation ctx for ttm_mem_global_alloc drm/ttm: call ttm_bo_swapout directly when ttm shrink drm/vmwgfx: remove the default io_mem_pfn set drm/virtio: remove the default io_mem_pfn set drm/radeon: remove the default io_mem_pfn set drm/qxl: remove the default io_mem_pfn set drm/nouveau: remove the default io_mem_pfn set drm/mgag200: remove the default io_mem_pfn set drm/cirrus: remove the default io_mem_pfn set drm/bochs: remove the default io_mem_pfn set drm/ast: remove the default io_mem_pfn set drm/ttm: add ttm_bo_io_mem_pfn to check io_mem_pfn drm/amdgpu: fix VM faults with per VM BOs drm/ttm: drop the spin in delayed delete if the trylock doesn't work ...
2017-12-30drm/amdgpu: Correct the IB size of bo update mapping.Emily Deng
The amdgpu_vm_frag_ptes will call amdgpu_vm_update_ptes, and for buffer object that has shadow buffer, need twice commands. Signed-off-by: Emily Deng <Emily.Deng@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-28drm/ttm: use an operation ctx for ttm_tt_bindRoger He
forward the operation context to ttm_tt_bind as well, and the ultimate goal is swapout enablement for reserved BOs. v2: use common term rather than amd specific Reviewed-by: Thomas Hellström <thellstrom@vmware.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chuming Zhou <david1.zhou@amd.com> Signed-off-by: Roger He <Hongbo.He@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-28drm/ttm: use an operation ctx for ttm_tt_populate in ttm_bo_driver (v2)Roger He
forward the operation context to ttm_tt_populate as well, and the ultimate goal is swapout enablement for reserved BOs. v2: squash in fix for vboxvideo Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Roger He <Hongbo.He@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-27drm/amdgpu: fix VM faults with per VM BOsChristian König
There was a small window between unreserve and second reserve where the freshly allocated BO could have been evicted without the VM noticing it. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-27drm/amd/pp: Get and save CZ/ST smu versionRex Zhu
The smu firmware is loaded by the sbios on APUs, so query it from the smu and save the smu fw version info that is reported to userspace. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-27drm/amdgpu: drop client_id from VMChristian König
Use the fence context from the scheduler entity. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-27drm/amdgpu: rename vm_id to vmidChristian König
sed -i "s/vm_id/vmid/g" drivers/gpu/drm/amd/amdgpu/*.c sed -i "s/vm_id/vmid/g" drivers/gpu/drm/amd/amdgpu/*.h Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-27drm/amdgpu: separate VMID and PASID handlingChristian König
Move both into the new files amdgpu_ids.[ch]. No functional change. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-20drm/amdgpu: fix test for shadow page tablesChristian König
They don't work 100% correctly at the moment. Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-20drm/amd/pp: Get and save Rv smu versionRex Zhu
The smu firmware is loaded by the sbios on APUs, so query it from the smu and save the smu fw version info that is reported to userspace. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-10-21 06:49:59 +0000