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path: root/drivers/dma/hsu
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2015-07-16dmaengine: hsu: remove excessive lockAndy Shevchenko
All hardware accesses are done under virtual channel lock. That's why specific channel lock is excessive and can be removed safely. This has been tested on Intel Medfield and Merrifield. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-06-02dmaengine: hsu: Fix memory leak when stopping a running transferPeter Ujfalusi
The vd->node is removed from the lists when the transfer started so the vchan_get_all_descriptors() will not find it. This results memory leak. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> [andy: fix the typo to prevent a compilation error] Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-04-22dmaengine: hsu: don't prompt for hsu_core partVinod Koul
HSU_DMA is selected by the HSU_DMA_PCI driver, this should be user selected so remove the user prompt for this Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2015-03-26dmaengine: hsu: move memory allocation to GFP_NOWAITAndy Shevchenko
The GFP_ATOMIC is too strict, and DMAEngine documentation make an advice to use GFP_NOWAIT. This patch does the conversion. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-03-26dmaengine: hsu: remove redundant pieces of codeAndy Shevchenko
There are few places where the implemented pieces of code are not needed, i.e.: - direction can't be wrong in hsu_dma_chan_start() - desc->active set to 0 by kzalloc - DMAEngine is NULL-aware when call ->device_alloc_chan_resources() Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-03-26dmaengine: hsu: add Intel Tangier PCI IDAndy Shevchenko
Intel Tangier is known to have the HSU DMA IP as PCI device 00:05.0. The patch adds the ID as found on Intel Edison board to the PCI device table. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-03-07dmaengine: append hsu DMA driverAndy Shevchenko
The HSU DMA is developed to support High Speed UART controllers found in particular on Intel MID platforms such as Intel Medfield. The existing implementation is tighten to the drivers/tty/serial/mfd.c driver and has a lot of disadvantages. Besides that we would like to get rid of the old HS UART driver in regarding to extending the 8250 which supports generic DMAEngine API. That's why the current driver has been developed. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>