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path: root/drivers/clk/tegra/clk-tegra30.c
AgeCommit message (Expand)Author
2013-04-04clk: tegra: move from a lock bit idx to a lock maskPeter De Schrijver
2013-04-04clk: tegra: Add PLL post divider tablePeter De Schrijver
2013-04-04clk: tegra: Refactor PLL programming codePeter De Schrijver
2013-04-04clk: tegra: defer application of init tableStephen Warren
2013-04-04clk: tegra: Fix cdev1 and cdev2 IDsPrashant Gaikwad
2013-04-04clk: tegra: Make gr2d and gr3d clocks children of pll_cThierry Reding
2013-03-04clk: Tegra: Remove duplicate smp_twd clockPrashant Gaikwad
2013-02-13clk: tegra: initialise parent of uart clocksLaxman Dewangan
2013-02-13clk: tegra: fix driver to match DT bindingStephen Warren
2013-02-12clk: tegra: local arrays should be staticPeter De Schrijver
2013-02-12clk: tegra: Add missing spinlock for hclk and pclkPeter De Schrijver
2013-02-12clk: tegra: fix wrong clock index between se to sata_coldJoseph Lo
2013-01-28clk: tegra30: remove unused TEGRA_CLK_DUPLICATE()sPrashant Gaikwad
2013-01-28clk: tegra: add clock support for Tegra30Prashant Gaikwad