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path: root/drivers/clk/tegra/clk-tegra210.c
AgeCommit message (Expand)Author
2016-04-28clk: tegra: Add sor_safe clockThierry Reding
2016-04-28clk: tegra: dpaux and dpaux1 are fixed factor clocksThierry Reding
2016-04-28clk: tegra: Add dpaux1 clockThierry Reding
2016-04-28clk: tegra: Add interface to enable hardware control of SATA/XUSB PLLsAndrew Bresticker
2016-02-02clk: tegra: Fix sparse warnings for functions not declared as staticJon Hunter
2016-02-02clk: tegra: Fix sparse warning for pll_mJon Hunter
2016-02-02clk: tegra: Use definition for pll_u override bitJon Hunter
2016-02-02clk: tegra: Fix warning caused by pll_u failing to lockJon Hunter
2016-02-02clk: tegra: Fix clock sources for Tegra210 EMCJon Hunter
2016-02-02clk: tegra: Add the APB2APE audio clock on Tegra210Jon Hunter
2016-02-02clk: tegra: Fix pllx dyn step calculationRhyland Klein
2016-02-02clk: tegra: Fix naming of MISC registersRhyland Klein
2016-01-25clk: tegra: Remove improper flags for lock_enableRhyland Klein
2015-12-17clk: tegra: Add support for Tegra210 clocksRhyland Klein