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path: root/drivers/clk/sunxi/clk-mod0.c
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2016-02-11clk: sunxi: Remove clk_register_clkdev callsMaxime Ripard
Now that our protection code doesn't use the global name lookup anymore, we can remove the clkdev registrations. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-01-27clk: sunxi: factors: Consolidate get_factors parameters into a structChen-Yu Tsai
The .get_factors callback of factors_clk has 6 parameters. To extend factors_clk in any way that requires adding parameters to .get_factors would make that list even longer, not to mention changing all the function declarations. Do this once now and consolidate all the parameters into a struct. Also drop the space before function pointer arguments, since checkpatch complains. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-01-27clk: sunxi: factors: Make struct clk_factors_config table constChen-Yu Tsai
struct clk_factors_config contains shifts/widths for the factors of the factors clk. This is used to read out the factors from the register value. In no case is it written to, so make it const. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-07-20clk: sunxi: Include clk.h and remove unused clkdev.h includesStephen Boyd
This clock provider uses the consumer API, so include clk.h explicitly. Also remove clkdev.h in files that aren't using it and include slab.h when clkdev.h was being used to implicitly include it. Cc: Chen-Yu Tsai <wens@csie.org> Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-06-16drivers/clk: convert sunxi/clk-mod0.c to use builtin_platform_driverPaul Gortmaker
This driver builds based on obj-y and hence will not ever be modular. Change it to use the non-modular registration so that it won't suffer a compile fail once a header move places the modular registration within the module.h file. Cc: "Emilio López" <emilio@elopez.com.ar> Cc: Mike Turquette <mturquette@linaro.org> Cc: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: linux-clk@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
2015-01-19clk: sunxi: Add mod0 and mmc module clock support for A80Chen-Yu Tsai
The module 0 style clocks, or storage module clocks as named in the official SDK, are almost the same as the module 0 clocks on earlier Allwinner SoCs. The only difference is wider mux register bits. As with earlier Allwinner SoCs, mmc module clocks are a special case of mod0 clocks, with phase controls for 2 child clocks, output and sample. This patch adds support for both. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-14clk: sunxi: Add a common setup function for mmc module clocksChen-Yu Tsai
The only difference between module clocks on different platforms is the width of the mux register bits and the valid values, which are passed in through struct factors_data. The phase clocks parts are identical. This patch generalizes the setup function, so most of the code can be reused when adding sun9i support, which has a wider mux register. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-14clk: sunxi: Rework MMC phase clocksMaxime Ripard
Instead of having three different clocks for the main MMC clock and the two phase sub-clocks, which involved having three different drivers sharing the same register, rework it to have the same single driver registering three different clocks. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Mike Turquette <mturquette@linaro.org>
2015-01-06clk: sunxi: Make the mod0 clk driver also a platform driverHans de Goede
With the prcm in sun6i (and some later SoCs) some mod0 clocks are instantiated through the mfd framework, and as such do not work with of_clk_declare, since they do not have registers assigned to them yet at of_clk_declare init time. Silence the error on not finding registers in the of_clk_declare mod0 clk setup method, and also register mod0-clk support as a platform driver to work properly with mfd instantiated mod0 clocks. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-12-21clk: sunxi: Give sunxi_factors_register a registers parameterHans de Goede
Before this commit sunxi_factors_register uses of_iomap(node, 0) to get the clk registers. The sun6i prcm has factor clocks, for which we want to use sunxi_factors_register, but of_iomap(node, 0) does not work for the prcm factor clocks, because the prcm uses the mfd framework, so the registers are not part of the dt-node, instead they are added to the platform_device, as platform_device resources. This commit makes getting the registers the callers duty, so that sunxi_factors_register can be used with mfd instantiated platform device too. While at it also add error checking to the of_iomap calls. This commit also drops the __init function from sunxi_factors_register since platform driver probe functions are not __init. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-10-21clk: sunxi: make factors clock mux mask configurableChen-Yu Tsai
Some of the factors-style clocks on the A80 have different widths for the mux values in the registers. Add a .muxmask field to clk_factors_config to make it configurable. Passing a bitmask instead of a width parameter will allow reuse in case we support table-based muxes in the future. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-09-27clk: sunxi: mod0: Introduce MMC proper phase handlingMaxime Ripard
The MMC clock we thought we had until now are actually not one but three different clocks. The main one is unchanged, and will have three outputs: - The clock fed into the MMC - a sample and output clocks, to deal with when should we output/sample data to/from the MMC bus The phase control we had are actually controlling the two latter clocks, but the main MMC one is unchanged. We can adjust the phase with a 3 bits value, from 0 to 7, 0 meaning a 180 phase shift, and the other values being the number of periods from the MMC parent clock to outphase the clock of. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
2014-09-27clk: sunxi: Move mbus to mod0 fileMaxime Ripard
Move the MBUS clock to the module clocks file. It's pretty trivial, but still requires to enable the clocks to make sure it won't get disabled. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
2014-09-27clk: sunxi: Move mod0 clock to a file of its ownMaxime Ripard
Since we know have the ability to declare factors clock outside of clk-sunxi, create a new mod0 driver to deal with the mod0 clocks. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com>